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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2018-09-21 08:26:30 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-09-28 09:11:08 -0400
commit6b983aca28bbd4ac18fe42fe2b2dc14a9ce21e3b (patch)
tree8221c9e0e055ddfaa3ed1ee15e44897dc9a63021
parenteb757fff08b8c57c22643c65add0dc1a570d1342 (diff)
usb: renesas_usbhs: rcar3: Use OTG mode for R-Car D3
Since R-Car D3 can use OTG mode, this patch changes the UGCTRL2 value to UGCTRL2_USB0SEL_OTG and UGCTRL2_VBUSSEL like other R-Car Gen3 SoCs. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/usb/renesas_usbhs/rcar3.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c
index 50e5fb55c8a0..aa3820448286 100644
--- a/drivers/usb/renesas_usbhs/rcar3.c
+++ b/drivers/usb/renesas_usbhs/rcar3.c
@@ -77,7 +77,8 @@ static int usbhs_rcar3_power_and_pll_ctrl(struct platform_device *pdev,
77 77
78 if (enable) { 78 if (enable) {
79 usbhs_write32(priv, UGCTRL, 0); /* release PLLRESET */ 79 usbhs_write32(priv, UGCTRL, 0); /* release PLLRESET */
80 usbhs_rcar3_set_ugctrl2(priv, UGCTRL2_USB0SEL_HSUSB); 80 usbhs_rcar3_set_ugctrl2(priv,
81 UGCTRL2_USB0SEL_OTG | UGCTRL2_VBUSSEL);
81 82
82 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM); 83 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
83 do { 84 do {