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authorFrode Isaksen <fisaksen@baylibre.com>2017-02-23 13:01:58 -0500
committerMark Brown <broonie@kernel.org>2017-03-15 15:35:39 -0400
commit6b3a631e7f8eca75a987ed760898d28fb3628143 (patch)
tree25fca4f838523eb829c5313c6c88ffcead168026
parent3e2e1258443ea97e40dfb4a3cf15108d17939066 (diff)
spi: davinci: use rx buffer as dummy tx buffer
When doing rx-only transfer, the transfer will fail if the number of SG entries exceeds 20. This happens because the eDMA DMA engine is limited to 20 SG entries in one transaction, and when the DMA transcation is resumed (which takes > 150us), rx errors occurs because the slave is still transmitting. Fix this by using the rx buffer as the dummy tx buffer, so that resuming the rx transcation happens at the same time as resuming the tx transcation. Signed-off-by: Frode Isaksen <fisaksen@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-davinci.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index 1e24395a04f2..ca122165a3c6 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -655,6 +655,12 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
655 if (!rxdesc) 655 if (!rxdesc)
656 goto err_desc; 656 goto err_desc;
657 657
658 if (!t->tx_buf) {
659 /* use rx buffer as dummy tx buffer */
660 t->tx_sg.sgl = t->rx_sg.sgl;
661 t->tx_sg.nents = t->rx_sg.nents;
662 }
663
658 txdesc = dmaengine_prep_slave_sg(dspi->dma_tx, 664 txdesc = dmaengine_prep_slave_sg(dspi->dma_tx,
659 t->tx_sg.sgl, t->tx_sg.nents, DMA_MEM_TO_DEV, 665 t->tx_sg.sgl, t->tx_sg.nents, DMA_MEM_TO_DEV,
660 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 666 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
@@ -957,7 +963,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
957 master->bus_num = pdev->id; 963 master->bus_num = pdev->id;
958 master->num_chipselect = pdata->num_chipselect; 964 master->num_chipselect = pdata->num_chipselect;
959 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); 965 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
960 master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX); 966 master->flags = SPI_MASTER_MUST_RX;
961 master->setup = davinci_spi_setup; 967 master->setup = davinci_spi_setup;
962 master->cleanup = davinci_spi_cleanup; 968 master->cleanup = davinci_spi_cleanup;
963 master->can_dma = davinci_spi_can_dma; 969 master->can_dma = davinci_spi_can_dma;