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authorAndreas Färber <afaerber@suse.de>2017-05-13 10:33:34 -0400
committerKevin Hilman <khilman@baylibre.com>2017-05-17 13:34:16 -0400
commit6a573c4e0f41c3e7c8717cc9e1b338ae1a82be17 (patch)
tree207bcfd9e22d27f5e4b62378bf7644b2c8e37262
parent67fe352fa6e0f45fbf84db8f0df7ba072aee8432 (diff)
arm64: dts: meson-gxl: Fix node order
Sort nodes referenced by label alphabetically. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl.dtsi72
1 files changed, 36 insertions, 36 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index d8e096dff10a..3efad5f0bca4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -193,6 +193,42 @@
193 }; 193 };
194}; 194};
195 195
196&hdmi_tx {
197 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
198 resets = <&reset RESET_HDMITX_CAPB3>,
199 <&reset RESET_HDMI_SYSTEM_RESET>,
200 <&reset RESET_HDMI_TX>;
201 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
202 clocks = <&clkc CLKID_HDMI_PCLK>,
203 <&clkc CLKID_CLK81>,
204 <&clkc CLKID_GCLK_VENCI_INT0>;
205 clock-names = "isfr", "iahb", "venci";
206};
207
208&hiubus {
209 clkc: clock-controller@0 {
210 compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
211 #clock-cells = <1>;
212 reg = <0x0 0x0 0x0 0x3db>;
213 };
214};
215
216&i2c_A {
217 clocks = <&clkc CLKID_I2C>;
218};
219
220&i2c_AO {
221 clocks = <&clkc CLKID_AO_I2C>;
222};
223
224&i2c_B {
225 clocks = <&clkc CLKID_I2C>;
226};
227
228&i2c_C {
229 clocks = <&clkc CLKID_I2C>;
230};
231
196&periphs { 232&periphs {
197 pinctrl_periphs: pinctrl@4b0 { 233 pinctrl_periphs: pinctrl@4b0 {
198 compatible = "amlogic,meson-gxl-periphs-pinctrl"; 234 compatible = "amlogic,meson-gxl-periphs-pinctrl";
@@ -501,30 +537,6 @@
501 }; 537 };
502}; 538};
503 539
504&hiubus {
505 clkc: clock-controller@0 {
506 compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
507 #clock-cells = <1>;
508 reg = <0x0 0x0 0x0 0x3db>;
509 };
510};
511
512&i2c_A {
513 clocks = <&clkc CLKID_I2C>;
514};
515
516&i2c_AO {
517 clocks = <&clkc CLKID_AO_I2C>;
518};
519
520&i2c_B {
521 clocks = <&clkc CLKID_I2C>;
522};
523
524&i2c_C {
525 clocks = <&clkc CLKID_I2C>;
526};
527
528&saradc { 540&saradc {
529 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; 541 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
530 clocks = <&xtal>, 542 clocks = <&xtal>,
@@ -563,15 +575,3 @@
563&vpu { 575&vpu {
564 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; 576 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
565}; 577};
566
567&hdmi_tx {
568 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
569 resets = <&reset RESET_HDMITX_CAPB3>,
570 <&reset RESET_HDMI_SYSTEM_RESET>,
571 <&reset RESET_HDMI_TX>;
572 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
573 clocks = <&clkc CLKID_HDMI_PCLK>,
574 <&clkc CLKID_CLK81>,
575 <&clkc CLKID_GCLK_VENCI_INT0>;
576 clock-names = "isfr", "iahb", "venci";
577};