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authorVivek Gautam <vivek.gautam@codeaurora.org>2018-12-13 04:05:07 -0500
committerJoerg Roedel <jroedel@suse.de>2018-12-17 04:16:36 -0500
commit69d24c6ed67c1e15f76284fccd62feffe77c8d38 (patch)
treef1d797281364196c68da2e4c5cd6550b6212e5c8
parent89cddc563743cb1e0068867ac97013b2a5bf86aa (diff)
dt-bindings: arm-smmu: Add binding doc for Qcom smmu-500
Qcom's implementation of arm,mmu-500 works well with current arm-smmu driver implementation. Adding a soc specific compatible along with arm,mmu-500 makes the bindings future safe. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
-rw-r--r--Documentation/devicetree/bindings/iommu/arm,smmu.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index a6504b37cc21..3133f3ba7567 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -27,6 +27,10 @@ conditions.
27 "qcom,msm8996-smmu-v2", "qcom,smmu-v2", 27 "qcom,msm8996-smmu-v2", "qcom,smmu-v2",
28 "qcom,sdm845-smmu-v2", "qcom,smmu-v2". 28 "qcom,sdm845-smmu-v2", "qcom,smmu-v2".
29 29
30 Qcom SoCs implementing "arm,mmu-500" must also include,
31 as below, SoC-specific compatibles:
32 "qcom,sdm845-smmu-500", "arm,mmu-500"
33
30- reg : Base address and size of the SMMU. 34- reg : Base address and size of the SMMU.
31 35
32- #global-interrupts : The number of global interrupts exposed by the 36- #global-interrupts : The number of global interrupts exposed by the