diff options
author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2017-08-14 06:26:34 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-23 19:07:18 -0400 |
commit | 69a6beab085264cdcdb9e3160b1a2ae61b2efde1 (patch) | |
tree | 81f4d9557dfb789c8be371a25cfae600c33ac835 | |
parent | 7157c69a99510c2234fc0b6001f21776085fda73 (diff) |
clk: msm8996-gcc: add missing smmu clks
This patch adds missing LPASS smmu clks which are required by the audio driver.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r-- | drivers/clk/qcom/gcc-msm8996.c | 28 | ||||
-rw-r--r-- | include/dt-bindings/clock/qcom,gcc-msm8996.h | 2 |
2 files changed, 30 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c index 8abc200d4fd3..7ddec886fcd3 100644 --- a/drivers/clk/qcom/gcc-msm8996.c +++ b/drivers/clk/qcom/gcc-msm8996.c | |||
@@ -2730,6 +2730,32 @@ static struct clk_fixed_factor ufs_rx_cfg_clk_src = { | |||
2730 | }, | 2730 | }, |
2731 | }; | 2731 | }; |
2732 | 2732 | ||
2733 | static struct clk_branch gcc_hlos1_vote_lpass_core_smmu_clk = { | ||
2734 | .halt_reg = 0x7d010, | ||
2735 | .halt_check = BRANCH_HALT_VOTED, | ||
2736 | .clkr = { | ||
2737 | .enable_reg = 0x7d010, | ||
2738 | .enable_mask = BIT(0), | ||
2739 | .hw.init = &(struct clk_init_data){ | ||
2740 | .name = "hlos1_vote_lpass_core_smmu_clk", | ||
2741 | .ops = &clk_branch2_ops, | ||
2742 | }, | ||
2743 | }, | ||
2744 | }; | ||
2745 | |||
2746 | static struct clk_branch gcc_hlos1_vote_lpass_adsp_smmu_clk = { | ||
2747 | .halt_reg = 0x7d014, | ||
2748 | .halt_check = BRANCH_HALT_VOTED, | ||
2749 | .clkr = { | ||
2750 | .enable_reg = 0x7d014, | ||
2751 | .enable_mask = BIT(0), | ||
2752 | .hw.init = &(struct clk_init_data){ | ||
2753 | .name = "hlos1_vote_lpass_adsp_smmu_clk", | ||
2754 | .ops = &clk_branch2_ops, | ||
2755 | }, | ||
2756 | }, | ||
2757 | }; | ||
2758 | |||
2733 | static struct clk_branch gcc_ufs_rx_cfg_clk = { | 2759 | static struct clk_branch gcc_ufs_rx_cfg_clk = { |
2734 | .halt_reg = 0x75014, | 2760 | .halt_reg = 0x75014, |
2735 | .clkr = { | 2761 | .clkr = { |
@@ -3307,6 +3333,8 @@ static struct clk_regmap *gcc_msm8996_clocks[] = { | |||
3307 | [GCC_UFS_AHB_CLK] = &gcc_ufs_ahb_clk.clkr, | 3333 | [GCC_UFS_AHB_CLK] = &gcc_ufs_ahb_clk.clkr, |
3308 | [GCC_UFS_TX_CFG_CLK] = &gcc_ufs_tx_cfg_clk.clkr, | 3334 | [GCC_UFS_TX_CFG_CLK] = &gcc_ufs_tx_cfg_clk.clkr, |
3309 | [GCC_UFS_RX_CFG_CLK] = &gcc_ufs_rx_cfg_clk.clkr, | 3335 | [GCC_UFS_RX_CFG_CLK] = &gcc_ufs_rx_cfg_clk.clkr, |
3336 | [GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK] = &gcc_hlos1_vote_lpass_core_smmu_clk.clkr, | ||
3337 | [GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK] = &gcc_hlos1_vote_lpass_adsp_smmu_clk.clkr, | ||
3310 | [GCC_UFS_TX_SYMBOL_0_CLK] = &gcc_ufs_tx_symbol_0_clk.clkr, | 3338 | [GCC_UFS_TX_SYMBOL_0_CLK] = &gcc_ufs_tx_symbol_0_clk.clkr, |
3311 | [GCC_UFS_RX_SYMBOL_0_CLK] = &gcc_ufs_rx_symbol_0_clk.clkr, | 3339 | [GCC_UFS_RX_SYMBOL_0_CLK] = &gcc_ufs_rx_symbol_0_clk.clkr, |
3312 | [GCC_UFS_RX_SYMBOL_1_CLK] = &gcc_ufs_rx_symbol_1_clk.clkr, | 3340 | [GCC_UFS_RX_SYMBOL_1_CLK] = &gcc_ufs_rx_symbol_1_clk.clkr, |
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8996.h b/include/dt-bindings/clock/qcom,gcc-msm8996.h index 1f5c42254798..75b07cf5eed0 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8996.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8996.h | |||
@@ -233,6 +233,8 @@ | |||
233 | #define GCC_PCIE_CLKREF_CLK 216 | 233 | #define GCC_PCIE_CLKREF_CLK 216 |
234 | #define GCC_RX2_USB2_CLKREF_CLK 217 | 234 | #define GCC_RX2_USB2_CLKREF_CLK 217 |
235 | #define GCC_RX1_USB2_CLKREF_CLK 218 | 235 | #define GCC_RX1_USB2_CLKREF_CLK 218 |
236 | #define GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK 219 | ||
237 | #define GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK 220 | ||
236 | 238 | ||
237 | #define GCC_SYSTEM_NOC_BCR 0 | 239 | #define GCC_SYSTEM_NOC_BCR 0 |
238 | #define GCC_CONFIG_NOC_BCR 1 | 240 | #define GCC_CONFIG_NOC_BCR 1 |