litmus-rt-ext-res.git - LITMUS^RT with extended reservations for Forbidden Zones paper @ RTAS'20

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author	Nikola Pajkovsky <npajkovsky@suse.cz>	2016-11-15 03:47:49 -0500
committer	Thomas Gleixner <tglx@linutronix.de>	2017-02-04 03:27:06 -0500
commit	68dee8e2f2cacc54d038394e70d22411dee89da2 (patch)
tree	2eff12a4a567f3a7988180f1d8db46c4c84442a7
parent	566cf877a1fcb6d6dc0126b076aad062054c2637 (diff)

x86/pci-calgary: Fix iommu_free() comparison of unsigned expression >= 0

commit 8fd524b355da ("x86: Kill bad_dma_address variable") has killed bad_dma_address variable and used instead of macro DMA_ERROR_CODE which is always zero. Since dma_addr is unsigned, the statement dma_addr >= DMA_ERROR_CODE is always true, and not needed. arch/x86/kernel/pci-calgary_64.c: In function ‘iommu_free’: arch/x86/kernel/pci-calgary_64.c:299:2: warning: comparison of unsigned expression >= 0 is always true [-Wtype-limits] if (unlikely((dma_addr >= DMA_ERROR_CODE) && (dma_addr < badend))) { Fixes: 8fd524b355da ("x86: Kill bad_dma_address variable") Signed-off-by: Nikola Pajkovsky <npajkovsky@suse.cz> Cc: iommu@lists.linux-foundation.org Cc: Jon Mason <jdmason@kudzu.us> Cc: Muli Ben-Yehuda <mulix@mulix.org> Link: http://lkml.kernel.org/r/7612c0f9dd7c1290407dbf8e809def922006920b.1479161177.git.npajkovsky@suse.cz Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

Diffstat

-rw-r--r--

arch/x86/kernel/pci-calgary_64.c

1 files changed, 1 insertions, 1 deletions


diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index 5d400ba1349d..d47517941bbc 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c
@@ -296,7 +296,7 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
296		296
297	/* were we called with bad_dma_address? */	297	/* were we called with bad_dma_address? */
298	badend = DMA_ERROR_CODE + (EMERGENCY_PAGES * PAGE_SIZE);	298	badend = DMA_ERROR_CODE + (EMERGENCY_PAGES * PAGE_SIZE);
299	if (unlikely((dma_addr >= DMA_ERROR_CODE) && (dma_addr < badend))) {	299	if (unlikely(dma_addr < badend)) {
300	WARN(1, KERN_ERR "Calgary: driver tried unmapping bad DMA "	300	WARN(1, KERN_ERR "Calgary: driver tried unmapping bad DMA "
301	"address 0x%Lx\n", dma_addr);	301	"address 0x%Lx\n", dma_addr);
302	return;	302	return;

/* * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. * * Copyright (C) 2005 James Chapman (ds1337 core) * Copyright (C) 2006 David Brownell * Copyright (C) 2009 Matthias Fuchs (rx8025 support) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/module.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/i2c.h> #include <linux/string.h> #include <linux/rtc.h> #include <linux/bcd.h> /* We can't determine type by probing, but if we expect pre-Linux code * to have set the chip up as a clock (turning on the oscillator and * setting the date and time), Linux can ignore the non-clock features. * That's a natural job for a factory or repair bench. */ enum ds_type { ds_1307, ds_1337, ds_1338, ds_1339, ds_1340, ds_1388, ds_3231, m41t00, rx_8025, // rs5c372 too? different address... }; /* RTC registers don't differ much, except for the century flag */ #define DS1307_REG_SECS 0x00 /* 00-59 */ # define DS1307_BIT_CH 0x80 # define DS1340_BIT_nEOSC 0x80 #define DS1307_REG_MIN 0x01 /* 00-59 */ #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ #define DS1307_REG_WDAY 0x03 /* 01-07 */ #define DS1307_REG_MDAY 0x04 /* 01-31 */ #define DS1307_REG_MONTH 0x05 /* 01-12 */ # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ #define DS1307_REG_YEAR 0x06 /* 00-99 */ /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) * start at 7, and they differ a LOT. Only control and status matter for * basic RTC date and time functionality; be careful using them. */ #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ # define DS1307_BIT_OUT 0x80 # define DS1338_BIT_OSF 0x20 # define DS1307_BIT_SQWE 0x10 # define DS1307_BIT_RS1 0x02 # define DS1307_BIT_RS0 0x01 #define DS1337_REG_CONTROL 0x0e # define DS1337_BIT_nEOSC 0x80 # define DS1339_BIT_BBSQI 0x20 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */ # define DS1337_BIT_RS2 0x10 # define DS1337_BIT_RS1 0x08 # define DS1337_BIT_INTCN 0x04 # define DS1337_BIT_A2IE 0x02 # define DS1337_BIT_A1IE 0x01 #define DS1340_REG_CONTROL 0x07 # define DS1340_BIT_OUT 0x80 # define DS1340_BIT_FT 0x40 # define DS1340_BIT_CALIB_SIGN 0x20 # define DS1340_M_CALIBRATION 0x1f #define DS1340_REG_FLAG 0x09 # define DS1340_BIT_OSF 0x80 #define DS1337_REG_STATUS 0x0f # define DS1337_BIT_OSF 0x80 # define DS1337_BIT_A2I 0x02 # define DS1337_BIT_A1I 0x01 #define DS1339_REG_ALARM1_SECS 0x07 #define DS1339_REG_TRICKLE 0x10 #define RX8025_REG_CTRL1 0x0e # define RX8025_BIT_2412 0x20 #define RX8025_REG_CTRL2 0x0f # define RX8025_BIT_PON 0x10 # define RX8025_BIT_VDET 0x40 # define RX8025_BIT_XST 0x20 struct ds1307 { u8 offset; /* register's offset */ u8 regs[11]; enum ds_type type; unsigned long flags; #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ #define HAS_ALARM 1 /* bit 1 == irq claimed */ struct i2c_client *client; struct rtc_device *rtc; struct work_struct work; s32 (*read_block_data)(const struct i2c_client *client, u8 command, u8 length, u8 *values); s32 (*write_block_data)(const struct i2c_client *client, u8 command, u8 length, const u8 *values); }; struct chip_desc { unsigned nvram56:1; unsigned alarm:1; }; static const struct chip_desc chips[] = { [ds_1307] = { .nvram56 = 1, }, [ds_1337] = { .alarm = 1, }, [ds_1338] = { .nvram56 = 1, }, [ds_1339] = { .alarm = 1, }, [ds_1340] = { }, [ds_3231] = { .alarm = 1, }, [m41t00] = { }, [rx_8025] = { }, }; static const struct i2c_device_id ds1307_id[] = { { "ds1307", ds_1307 }, { "ds1337", ds_1337 }, { "ds1338", ds_1338 }, { "ds1339", ds_1339 }, { "ds1388", ds_1388 }, { "ds1340", ds_1340 }, { "ds3231", ds_3231 }, { "m41t00", m41t00 }, { "rx8025", rx_8025 }, { } }; MODULE_DEVICE_TABLE(i2c, ds1307_id); /*----------------------------------------------------------------------*/ #define BLOCK_DATA_MAX_TRIES 10 static s32 ds1307_read_block_data_once(const struct i2c_client *client, u8 command, u8 length, u8 *values) { s32 i, data; for (i = 0; i < length; i++) { data = i2c_smbus_read_byte_data(client, command + i); if (data < 0) return data; values[i] = data; } return i; } static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command, u8 length, u8 *values) { u8 oldvalues[I2C_SMBUS_BLOCK_MAX]; s32 ret; int tries = 0; dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length); ret = ds1307_read_block_data_once(client, command, length, values); if (ret < 0) return ret; do { if (++tries > BLOCK_DATA_MAX_TRIES) { dev_err(&client->dev, "ds1307_read_block_data failed\n"); return -EIO; } memcpy(oldvalues, values, length); ret = ds1307_read_block_data_once(client, command, length, values); if (ret < 0) return ret; } while (memcmp(oldvalues, values, length)); return length; } static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command, u8 length, const u8 *values) { u8 currvalues[I2C_SMBUS_BLOCK_MAX]; int tries = 0; dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length); do { s32 i, ret; if (++tries > BLOCK_DATA_MAX_TRIES) { dev_err(&client->dev, "ds1307_write_block_data failed\n"); return -EIO; } for (i = 0; i < length; i++) { ret = i2c_smbus_write_byte_data(client, command + i, values[i]); if (ret < 0) return ret; } ret = ds1307_read_block_data_once(client, command, length, currvalues); if (ret < 0) return ret; } while (memcmp(currvalues, values, length)); return length; } /*----------------------------------------------------------------------*/ /* * The IRQ logic includes a "real" handler running in IRQ context just * long enough to schedule this workqueue entry. We need a task context * to talk to the RTC, since I2C I/O calls require that; and disable the * IRQ until we clear its status on the chip, so that this handler can * work with any type of triggering (not just falling edge). * * The ds1337 and ds1339 both have two alarms, but we only use the first * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm * signal; ds1339 chips have only one alarm signal. */ static void ds1307_work(struct work_struct *work) { struct ds1307 *ds1307; struct i2c_client *client; struct mutex *lock; int stat, control; ds1307 = container_of(work, struct ds1307, work); client = ds1307->client; lock = &ds1307->rtc->ops_lock; mutex_lock(lock); stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); if (stat < 0) goto out; if (stat & DS1337_BIT_A1I) { stat &= ~DS1337_BIT_A1I; i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); if (control < 0) goto out; control &= ~DS1337_BIT_A1IE; i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); rtc_update_irq(ds1307->rtc, 1


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