diff options
author | Sebastian Reichel <sebastian.reichel@collabora.co.uk> | 2017-08-21 10:54:01 -0400 |
---|---|---|
committer | Lee Jones <lee.jones@linaro.org> | 2017-08-22 03:44:37 -0400 |
commit | 67dfabe3a01be6b0cc4c0056aa546f0279ed6279 (patch) | |
tree | be41ae10620c5a27b6b384dcd25854e0b4617ab8 | |
parent | 5771a8c08880cdca3bfb4a3fc6d309d6bba20877 (diff) |
mfd: da9052: Add register details for TSI
Add register details an channels definition for using the TSI
registers in the hwmon driver.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r-- | include/linux/mfd/da9052/da9052.h | 6 | ||||
-rw-r--r-- | include/linux/mfd/da9052/reg.h | 11 |
2 files changed, 16 insertions, 1 deletions
diff --git a/include/linux/mfd/da9052/da9052.h b/include/linux/mfd/da9052/da9052.h index ce9230af09c2..ae5b663836d0 100644 --- a/include/linux/mfd/da9052/da9052.h +++ b/include/linux/mfd/da9052/da9052.h | |||
@@ -45,6 +45,12 @@ | |||
45 | #define DA9052_ADC_TJUNC 8 | 45 | #define DA9052_ADC_TJUNC 8 |
46 | #define DA9052_ADC_VBBAT 9 | 46 | #define DA9052_ADC_VBBAT 9 |
47 | 47 | ||
48 | /* TSI channel has its own 4 channel mux */ | ||
49 | #define DA9052_ADC_TSI_XP 70 | ||
50 | #define DA9052_ADC_TSI_XN 71 | ||
51 | #define DA9052_ADC_TSI_YP 72 | ||
52 | #define DA9052_ADC_TSI_YN 73 | ||
53 | |||
48 | #define DA9052_IRQ_DCIN 0 | 54 | #define DA9052_IRQ_DCIN 0 |
49 | #define DA9052_IRQ_VBUS 1 | 55 | #define DA9052_IRQ_VBUS 1 |
50 | #define DA9052_IRQ_DCINREM 2 | 56 | #define DA9052_IRQ_DCINREM 2 |
diff --git a/include/linux/mfd/da9052/reg.h b/include/linux/mfd/da9052/reg.h index 5010f978725c..76780ea8849c 100644 --- a/include/linux/mfd/da9052/reg.h +++ b/include/linux/mfd/da9052/reg.h | |||
@@ -690,7 +690,10 @@ | |||
690 | /* TSI CONTROL REGISTER B BITS */ | 690 | /* TSI CONTROL REGISTER B BITS */ |
691 | #define DA9052_TSICONTB_ADCREF 0X80 | 691 | #define DA9052_TSICONTB_ADCREF 0X80 |
692 | #define DA9052_TSICONTB_TSIMAN 0X40 | 692 | #define DA9052_TSICONTB_TSIMAN 0X40 |
693 | #define DA9052_TSICONTB_TSIMUX 0X30 | 693 | #define DA9052_TSICONTB_TSIMUX_XP 0X00 |
694 | #define DA9052_TSICONTB_TSIMUX_YP 0X10 | ||
695 | #define DA9052_TSICONTB_TSIMUX_XN 0X20 | ||
696 | #define DA9052_TSICONTB_TSIMUX_YN 0X30 | ||
694 | #define DA9052_TSICONTB_TSISEL3 0X08 | 697 | #define DA9052_TSICONTB_TSISEL3 0X08 |
695 | #define DA9052_TSICONTB_TSISEL2 0X04 | 698 | #define DA9052_TSICONTB_TSISEL2 0X04 |
696 | #define DA9052_TSICONTB_TSISEL1 0X02 | 699 | #define DA9052_TSICONTB_TSISEL1 0X02 |
@@ -705,8 +708,14 @@ | |||
705 | /* TSI CO-ORDINATE LSB RESULT REGISTER BITS */ | 708 | /* TSI CO-ORDINATE LSB RESULT REGISTER BITS */ |
706 | #define DA9052_TSILSB_PENDOWN 0X40 | 709 | #define DA9052_TSILSB_PENDOWN 0X40 |
707 | #define DA9052_TSILSB_TSIZL 0X30 | 710 | #define DA9052_TSILSB_TSIZL 0X30 |
711 | #define DA9052_TSILSB_TSIZL_SHIFT 4 | ||
712 | #define DA9052_TSILSB_TSIZL_BITS 2 | ||
708 | #define DA9052_TSILSB_TSIYL 0X0C | 713 | #define DA9052_TSILSB_TSIYL 0X0C |
714 | #define DA9052_TSILSB_TSIYL_SHIFT 2 | ||
715 | #define DA9052_TSILSB_TSIYL_BITS 2 | ||
709 | #define DA9052_TSILSB_TSIXL 0X03 | 716 | #define DA9052_TSILSB_TSIXL 0X03 |
717 | #define DA9052_TSILSB_TSIXL_SHIFT 0 | ||
718 | #define DA9052_TSILSB_TSIXL_BITS 2 | ||
710 | 719 | ||
711 | /* TSI Z MEASUREMENT MSB RESULT REGISTER BIT */ | 720 | /* TSI Z MEASUREMENT MSB RESULT REGISTER BIT */ |
712 | #define DA9052_TSIZMSB_TSIZM 0XFF | 721 | #define DA9052_TSIZMSB_TSIZM 0XFF |