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authorChristian König <christian.koenig@amd.com>2019-07-30 05:17:03 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-07-31 02:26:09 -0400
commit67d0859e2758ef992fd32499747ce4b1038a63c0 (patch)
tree140cdd0ac457f2e39cbb12bf82a03cc35b4c01c3
parentf0bc1ee473fefd4d9f2ace9fad1cefdc0b7f6fdd (diff)
drm/amdgpu: fix error handling in amdgpu_cs_process_fence_dep
We always need to drop the ctx reference and should check for errors first and then dereference the fence pointer. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c26
1 files changed, 12 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index e069de8b54e6..4e4094f842e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1044,29 +1044,27 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
1044 return r; 1044 return r;
1045 } 1045 }
1046 1046
1047 fence = amdgpu_ctx_get_fence(ctx, entity, 1047 fence = amdgpu_ctx_get_fence(ctx, entity, deps[i].handle);
1048 deps[i].handle); 1048 amdgpu_ctx_put(ctx);
1049
1050 if (IS_ERR(fence))
1051 return PTR_ERR(fence);
1052 else if (!fence)
1053 continue;
1049 1054
1050 if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) { 1055 if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
1051 struct drm_sched_fence *s_fence = to_drm_sched_fence(fence); 1056 struct drm_sched_fence *s_fence;
1052 struct dma_fence *old = fence; 1057 struct dma_fence *old = fence;
1053 1058
1059 s_fence = to_drm_sched_fence(fence);
1054 fence = dma_fence_get(&s_fence->scheduled); 1060 fence = dma_fence_get(&s_fence->scheduled);
1055 dma_fence_put(old); 1061 dma_fence_put(old);
1056 } 1062 }
1057 1063
1058 if (IS_ERR(fence)) { 1064 r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);
1059 r = PTR_ERR(fence); 1065 dma_fence_put(fence);
1060 amdgpu_ctx_put(ctx); 1066 if (r)
1061 return r; 1067 return r;
1062 } else if (fence) {
1063 r = amdgpu_sync_fence(p->adev, &p->job->sync, fence,
1064 true);
1065 dma_fence_put(fence);
1066 amdgpu_ctx_put(ctx);
1067 if (r)
1068 return r;
1069 }
1070 } 1068 }
1071 return 0; 1069 return 0;
1072} 1070}