diff options
author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-11-03 00:07:34 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-08 12:09:52 -0500 |
commit | 6745a2ceaac6d4dd3ddac460dc149275b0ae7fc0 (patch) | |
tree | ebf70ca9ace544fd4a57363274dab0251e6114ea | |
parent | b3dc685e2ff485fac50e6c3fb05e89a11300c3aa (diff) |
drm/i915/bdw: Broadwell also has the "power down well"
Just like Haswell, but with the small twist that the panel fitter for pipe A is
now also in the always-on power well.
v2: Use the new HAS_POWER_WELL macro.
v3: Rebase on top of intel_using_power_well patches.
v4: This time actually update the PFIT check correctly so that the
pipe A pfit is in the always-on domain.
v5: Rebase on top of the VGA power domain addition.
v6: Rebase on top of the new power domain infrastructure. Also pimp the commit
message a bit while at it.
v7: Use IS_BROADWELL instead of IS_GEN8 (Ville).
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 5 |
2 files changed, 8 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 153011a6b885..d9d6db263ab2 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -117,6 +117,10 @@ enum intel_display_power_domain { | |||
117 | #define HSW_ALWAYS_ON_POWER_DOMAINS ( \ | 117 | #define HSW_ALWAYS_ON_POWER_DOMAINS ( \ |
118 | BIT(POWER_DOMAIN_PIPE_A) | \ | 118 | BIT(POWER_DOMAIN_PIPE_A) | \ |
119 | BIT(POWER_DOMAIN_TRANSCODER_EDP)) | 119 | BIT(POWER_DOMAIN_TRANSCODER_EDP)) |
120 | #define BDW_ALWAYS_ON_POWER_DOMAINS ( \ | ||
121 | BIT(POWER_DOMAIN_PIPE_A) | \ | ||
122 | BIT(POWER_DOMAIN_TRANSCODER_EDP) | \ | ||
123 | BIT(POWER_DOMAIN_PIPE_A_PANEL_FITTER)) | ||
120 | 124 | ||
121 | enum hpd_pin { | 125 | enum hpd_pin { |
122 | HPD_NONE = 0, | 126 | HPD_NONE = 0, |
@@ -1804,7 +1808,7 @@ struct drm_i915_file_private { | |||
1804 | #define HAS_IPS(dev) (IS_ULT(dev)) | 1808 | #define HAS_IPS(dev) (IS_ULT(dev)) |
1805 | 1809 | ||
1806 | #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) | 1810 | #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) |
1807 | #define HAS_POWER_WELL(dev) (IS_HASWELL(dev)) | 1811 | #define HAS_POWER_WELL(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
1808 | #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) | 1812 | #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) |
1809 | #define HAS_PSR(dev) (IS_HASWELL(dev)) | 1813 | #define HAS_PSR(dev) (IS_HASWELL(dev)) |
1810 | 1814 | ||
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 281e68dca607..b9496abd76dc 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -5520,7 +5520,9 @@ static bool is_always_on_power_domain(struct drm_device *dev, | |||
5520 | 5520 | ||
5521 | BUG_ON(BIT(domain) & ~POWER_DOMAIN_MASK); | 5521 | BUG_ON(BIT(domain) & ~POWER_DOMAIN_MASK); |
5522 | 5522 | ||
5523 | if (IS_HASWELL(dev)) { | 5523 | if (IS_BROADWELL(dev)) { |
5524 | always_on_domains = BDW_ALWAYS_ON_POWER_DOMAINS; | ||
5525 | } else if (IS_HASWELL(dev)) { | ||
5524 | always_on_domains = HSW_ALWAYS_ON_POWER_DOMAINS; | 5526 | always_on_domains = HSW_ALWAYS_ON_POWER_DOMAINS; |
5525 | } else { | 5527 | } else { |
5526 | WARN_ON(1); | 5528 | WARN_ON(1); |
@@ -6006,4 +6008,3 @@ void intel_pm_init(struct drm_device *dev) | |||
6006 | INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, | 6008 | INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work, |
6007 | intel_gen6_powersave_work); | 6009 | intel_gen6_powersave_work); |
6008 | } | 6010 | } |
6009 | |||