diff options
| author | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2017-09-12 11:42:42 -0400 |
|---|---|---|
| committer | Radim Krčmář <rkrcmar@redhat.com> | 2017-09-14 11:05:13 -0400 |
| commit | 67034bb9dd5ecc0171bdacfbd31ebf7c2634df98 (patch) | |
| tree | c9d34283e272a3244cf42c900eb226bb1aa35e01 | |
| parent | b2a05feff274e007abd7cda0d2cdae7fdf5cbb0a (diff) | |
KVM: SVM: Add irqchip_split() checks before enabling AVIC
SVM AVIC hardware accelerates guest write to APIC_EOI register
(for edge-trigger interrupt), which means it does not trap to KVM.
So, only enable SVM AVIC only in split irqchip mode.
(e.g. launching qemu w/ option '-machine kernel_irqchip=split').
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Fixes: 44a95dae1d22 ("KVM: x86: Detect and Initialize AVIC support")
[Removed pr_debug - Radim.]
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
| -rw-r--r-- | arch/x86/kvm/svm.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 76f559f5a3dd..0e68f0b3cbf7 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c | |||
| @@ -1200,7 +1200,6 @@ static void avic_init_vmcb(struct vcpu_svm *svm) | |||
| 1200 | vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK; | 1200 | vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK; |
| 1201 | vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID_COUNT; | 1201 | vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID_COUNT; |
| 1202 | vmcb->control.int_ctl |= AVIC_ENABLE_MASK; | 1202 | vmcb->control.int_ctl |= AVIC_ENABLE_MASK; |
| 1203 | svm->vcpu.arch.apicv_active = true; | ||
| 1204 | } | 1203 | } |
| 1205 | 1204 | ||
| 1206 | static void init_vmcb(struct vcpu_svm *svm) | 1205 | static void init_vmcb(struct vcpu_svm *svm) |
| @@ -1316,7 +1315,7 @@ static void init_vmcb(struct vcpu_svm *svm) | |||
| 1316 | set_intercept(svm, INTERCEPT_PAUSE); | 1315 | set_intercept(svm, INTERCEPT_PAUSE); |
| 1317 | } | 1316 | } |
| 1318 | 1317 | ||
| 1319 | if (avic) | 1318 | if (kvm_vcpu_apicv_active(&svm->vcpu)) |
| 1320 | avic_init_vmcb(svm); | 1319 | avic_init_vmcb(svm); |
| 1321 | 1320 | ||
| 1322 | /* | 1321 | /* |
| @@ -1604,7 +1603,7 @@ static int avic_init_vcpu(struct vcpu_svm *svm) | |||
| 1604 | { | 1603 | { |
| 1605 | int ret; | 1604 | int ret; |
| 1606 | 1605 | ||
| 1607 | if (!avic) | 1606 | if (!kvm_vcpu_apicv_active(&svm->vcpu)) |
| 1608 | return 0; | 1607 | return 0; |
| 1609 | 1608 | ||
| 1610 | ret = avic_init_backing_page(&svm->vcpu); | 1609 | ret = avic_init_backing_page(&svm->vcpu); |
| @@ -4409,7 +4408,7 @@ static void svm_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set) | |||
| 4409 | 4408 | ||
| 4410 | static bool svm_get_enable_apicv(struct kvm_vcpu *vcpu) | 4409 | static bool svm_get_enable_apicv(struct kvm_vcpu *vcpu) |
| 4411 | { | 4410 | { |
| 4412 | return avic; | 4411 | return avic && irqchip_split(vcpu->kvm); |
| 4413 | } | 4412 | } |
| 4414 | 4413 | ||
| 4415 | static void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr) | 4414 | static void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr) |
| @@ -4426,7 +4425,7 @@ static void svm_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu) | |||
| 4426 | struct vcpu_svm *svm = to_svm(vcpu); | 4425 | struct vcpu_svm *svm = to_svm(vcpu); |
| 4427 | struct vmcb *vmcb = svm->vmcb; | 4426 | struct vmcb *vmcb = svm->vmcb; |
| 4428 | 4427 | ||
| 4429 | if (!avic) | 4428 | if (!kvm_vcpu_apicv_active(&svm->vcpu)) |
| 4430 | return; | 4429 | return; |
| 4431 | 4430 | ||
| 4432 | vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK; | 4431 | vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK; |
