diff options
author | Philippe CORNU <philippe.cornu@st.com> | 2018-02-04 16:36:24 -0500 |
---|---|---|
committer | Andrzej Hajda <a.hajda@samsung.com> | 2018-03-05 08:08:16 -0500 |
commit | 669b710e5e30328bc41de88aaab5422913a39074 (patch) | |
tree | 447442d5a4a29f8cc90fd54bd1d0ac03a88a42c9 | |
parent | 5fcdc9d9816266c575ef21586327ba04d7db5c2c (diff) |
drm/bridge/synopsys: dsi: readl_poll_timeout return value clean up
The readl_poll_timeout() return value is 0 in case of success
so it is better to detect errors without taking care of the
return value sign.
Signed-off-by: Philippe Cornu <philippe.cornu@st.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180204213624.18288-1-philippe.cornu@st.com
-rw-r--r-- | drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index 7bac101c285c..226171a3ece1 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | |||
@@ -342,7 +342,7 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) | |||
342 | ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, | 342 | ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, |
343 | val, !(val & GEN_CMD_FULL), 1000, | 343 | val, !(val & GEN_CMD_FULL), 1000, |
344 | CMD_PKT_STATUS_TIMEOUT_US); | 344 | CMD_PKT_STATUS_TIMEOUT_US); |
345 | if (ret < 0) { | 345 | if (ret) { |
346 | dev_err(dsi->dev, "failed to get available command FIFO\n"); | 346 | dev_err(dsi->dev, "failed to get available command FIFO\n"); |
347 | return ret; | 347 | return ret; |
348 | } | 348 | } |
@@ -353,7 +353,7 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) | |||
353 | ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, | 353 | ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, |
354 | val, (val & mask) == mask, | 354 | val, (val & mask) == mask, |
355 | 1000, CMD_PKT_STATUS_TIMEOUT_US); | 355 | 1000, CMD_PKT_STATUS_TIMEOUT_US); |
356 | if (ret < 0) { | 356 | if (ret) { |
357 | dev_err(dsi->dev, "failed to write command FIFO\n"); | 357 | dev_err(dsi->dev, "failed to write command FIFO\n"); |
358 | return ret; | 358 | return ret; |
359 | } | 359 | } |
@@ -385,7 +385,7 @@ static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi, | |||
385 | ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, | 385 | ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, |
386 | val, !(val & GEN_PLD_W_FULL), 1000, | 386 | val, !(val & GEN_PLD_W_FULL), 1000, |
387 | CMD_PKT_STATUS_TIMEOUT_US); | 387 | CMD_PKT_STATUS_TIMEOUT_US); |
388 | if (ret < 0) { | 388 | if (ret) { |
389 | dev_err(dsi->dev, | 389 | dev_err(dsi->dev, |
390 | "failed to get available write payload FIFO\n"); | 390 | "failed to get available write payload FIFO\n"); |
391 | return ret; | 391 | return ret; |
@@ -721,13 +721,13 @@ static void dw_mipi_dsi_dphy_enable(struct dw_mipi_dsi *dsi) | |||
721 | 721 | ||
722 | ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val, | 722 | ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val, |
723 | val & PHY_LOCK, 1000, PHY_STATUS_TIMEOUT_US); | 723 | val & PHY_LOCK, 1000, PHY_STATUS_TIMEOUT_US); |
724 | if (ret < 0) | 724 | if (ret) |
725 | DRM_DEBUG_DRIVER("failed to wait phy lock state\n"); | 725 | DRM_DEBUG_DRIVER("failed to wait phy lock state\n"); |
726 | 726 | ||
727 | ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, | 727 | ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, |
728 | val, val & PHY_STOP_STATE_CLK_LANE, 1000, | 728 | val, val & PHY_STOP_STATE_CLK_LANE, 1000, |
729 | PHY_STATUS_TIMEOUT_US); | 729 | PHY_STATUS_TIMEOUT_US); |
730 | if (ret < 0) | 730 | if (ret) |
731 | DRM_DEBUG_DRIVER("failed to wait phy clk lane stop state\n"); | 731 | DRM_DEBUG_DRIVER("failed to wait phy clk lane stop state\n"); |
732 | } | 732 | } |
733 | 733 | ||