drm/i915/vlv: Add drpc debugfs support for valleyview

Many of the fields from Gen6 have gone away for vlv. Strip all those
fields that are not relevent and try to update fields that we care
about. This patch give information about current RP & RC status and
individual Wells.

v2: Move Render & Media Well status to separate lines (Ville)

Signed-off-by: Deepak S <deepak.s@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 49 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 95c92c8e55b3..b2b46c52294c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1178,6 +1178,50 @@ static int ironlake_drpc_info(struct seq_file *m)
         return 0;
 }
 
+static int vlv_drpc_info(struct seq_file *m)
+{
+
+        struct drm_info_node *node = (struct drm_info_node *) m->private;
+        struct drm_device *dev = node->minor->dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        u32 rpmodectl1, rcctl1;
+        unsigned fw_rendercount = 0, fw_mediacount = 0;
+
+        rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
+        rcctl1 = I915_READ(GEN6_RC_CONTROL);
+
+        seq_printf(m, "Video Turbo Mode: %s\n",
+                   yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
+        seq_printf(m, "Turbo enabled: %s\n",
+                   yesno(rpmodectl1 & GEN6_RP_ENABLE));
+        seq_printf(m, "HW control enabled: %s\n",
+                   yesno(rpmodectl1 & GEN6_RP_ENABLE));
+        seq_printf(m, "SW control enabled: %s\n",
+                   yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
+                          GEN6_RP_MEDIA_SW_MODE));
+        seq_printf(m, "RC6 Enabled: %s\n",
+                   yesno(rcctl1 & (GEN7_RC_CTL_TO_MODE |
+                                        GEN6_RC_CTL_EI_MODE(1))));
+        seq_printf(m, "Render Power Well: %s\n",
+                        (I915_READ(VLV_GTLC_PW_STATUS) &
+                                VLV_GTLC_PW_RENDER_STATUS_MASK) ? "Up" : "Down");
+        seq_printf(m, "Media Power Well: %s\n",
+                        (I915_READ(VLV_GTLC_PW_STATUS) &
+                                VLV_GTLC_PW_MEDIA_STATUS_MASK) ? "Up" : "Down");
+
+        spin_lock_irq(&dev_priv->uncore.lock);
+        fw_rendercount = dev_priv->uncore.fw_rendercount;
+        fw_mediacount = dev_priv->uncore.fw_mediacount;
+        spin_unlock_irq(&dev_priv->uncore.lock);
+
+        seq_printf(m, "Forcewake Render Count = %u\n", fw_rendercount);
+        seq_printf(m, "Forcewake Media Count = %u\n", fw_mediacount);
+
+
+        return 0;
+}
+
+
 static int gen6_drpc_info(struct seq_file *m)
 {
 
@@ -1283,7 +1327,9 @@ static int i915_drpc_info(struct seq_file *m, void *unused)
         struct drm_info_node *node = (struct drm_info_node *) m->private;
         struct drm_device *dev = node->minor->dev;
 
-        if (IS_GEN6(dev) || IS_GEN7(dev))
+        if (IS_VALLEYVIEW(dev))
+                return vlv_drpc_info(m);
+        else if (IS_GEN6(dev) || IS_GEN7(dev))
                 return gen6_drpc_info(m);
         else
                 return ironlake_drpc_info(m);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a699efd4ac13..76126e0ae609 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4822,6 +4822,8 @@
 #define  FORCEWAKE_ACK                          0x130090
 #define  VLV_GTLC_WAKE_CTRL                     0x130090
 #define  VLV_GTLC_PW_STATUS                     0x130094
+#define VLV_GTLC_PW_RENDER_STATUS_MASK          0x80
+#define VLV_GTLC_PW_MEDIA_STATUS_MASK           0x20
 #define  FORCEWAKE_MT                           0xa188 /* multi-threaded */
 #define   FORCEWAKE_KERNEL                      0x1
 #define   FORCEWAKE_USER                        0x2