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authorLinus Torvalds <torvalds@linux-foundation.org>2016-07-27 17:19:25 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-07-27 17:19:25 -0400
commit66304207cd341045df34195b4a8d422075bff513 (patch)
tree14c51758f26f9f1b040a17acfe57e820b231fe3a
parent7ae0ae4a022b72f33d23ab6e858163d4b37400a5 (diff)
parent175c7080f2747b96e4b5352e4c38ddf9a0eacfdb (diff)
Merge branch 'i2c/for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang: "Here is the I2C pull request for 4.8: - the core and i801 driver gained support for SMBus Host Notify - core support for more than one address in DT - i2c_add_adapter() has now better error messages. We can remove all error messages from drivers calling it as a next step. - bigger updates to rk3x driver to support rk3399 SoC - the at24 eeprom driver got refactored and can now read special variants with unique serials or fixed MAC addresses. The rest is regular driver updates and bugfixes" * 'i2c/for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (66 commits) i2c: i801: use IS_ENABLED() instead of checking for built-in or module Documentation: i2c: slave: give proper example for pm usage Documentation: i2c: slave: describe buffer problems a bit better i2c: bcm2835: Don't complain on -EPROBE_DEFER from getting our clock i2c: i2c-smbus: drop useless stubs i2c: efm32: fix a failure path in efm32_i2c_probe() Revert "i2c: core: Cleanup I2C ACPI namespace" Revert "i2c: core: Add function for finding the bus speed from ACPI" i2c: Update the description of I2C_SMBUS i2c: i2c-smbus: fix i2c_handle_smbus_host_notify documentation eeprom: at24: tweak the loop_until_timeout() macro eeprom: at24: add support for at24mac series eeprom: at24: support reading the serial number for 24csxx eeprom: at24: platform_data: use BIT() macro eeprom: at24: split at24_eeprom_write() into specialized functions eeprom: at24: split at24_eeprom_read() into specialized functions eeprom: at24: hide the read/write loop behind a macro eeprom: at24: call read/write functions via function pointers eeprom: at24: coding style fixes eeprom: at24: move at24_read() below at24_eeprom_write() ...
Diffstat
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-rk3x.txt16
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c.txt7
-rw-r--r--Documentation/i2c/slave-interface19
-rw-r--r--Documentation/i2c/smbus-protocol6
-rw-r--r--drivers/char/ipmi/ipmi_ssif.c6
-rw-r--r--drivers/hwmon/lm90.c6
-rw-r--r--drivers/i2c/Kconfig4
-rw-r--r--drivers/i2c/busses/Kconfig11
-rw-r--r--drivers/i2c/busses/i2c-bcm2835.c3
-rw-r--r--drivers/i2c/busses/i2c-brcmstb.c3
-rw-r--r--drivers/i2c/busses/i2c-designware-core.c2
-rw-r--r--drivers/i2c/busses/i2c-designware-core.h1
-rw-r--r--drivers/i2c/busses/i2c-designware-pcidrv.c143
-rw-r--r--drivers/i2c/busses/i2c-efm32.c2
-rw-r--r--drivers/i2c/busses/i2c-elektor.c14
-rw-r--r--drivers/i2c/busses/i2c-i801.c152
-rw-r--r--drivers/i2c/busses/i2c-jz4780.c4
-rw-r--r--drivers/i2c/busses/i2c-pca-isa.c15
-rw-r--r--drivers/i2c/busses/i2c-qup.c155
-rw-r--r--drivers/i2c/busses/i2c-rk3x.c498
-rw-r--r--drivers/i2c/busses/i2c-robotfuzz-osif.c2
-rw-r--r--drivers/i2c/busses/i2c-versatile.c46
-rw-r--r--drivers/i2c/busses/i2c-xlp9xx.c13
-rw-r--r--drivers/i2c/i2c-core.c165
-rw-r--r--drivers/i2c/i2c-dev.c7
-rw-r--r--drivers/i2c/i2c-smbus.c112
-rw-r--r--drivers/misc/eeprom/at24.c498
-rw-r--r--include/linux/i2c-smbus.h29
-rw-r--r--include/linux/i2c.h15
-rw-r--r--include/linux/platform_data/at24.h11
-rw-r--r--include/uapi/linux/i2c.h1
31 files changed, 1416 insertions, 550 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index 0b4a85fe2d86..bbc5a1ed5fa1 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -6,10 +6,20 @@ RK3xxx SoCs.
6Required properties : 6Required properties :
7 7
8 - reg : Offset and length of the register set for the device 8 - reg : Offset and length of the register set for the device
9 - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c", 9 - compatible: should be one of the following:
10 "rockchip,rk3228-i2c" or "rockchip,rk3288-i2c". 10 - "rockchip,rk3066-i2c": for rk3066
11 - "rockchip,rk3188-i2c": for rk3188
12 - "rockchip,rk3228-i2c": for rk3228
13 - "rockchip,rk3288-i2c": for rk3288
14 - "rockchip,rk3399-i2c": for rk3399
11 - interrupts : interrupt number 15 - interrupts : interrupt number
12 - clocks : parent clock 16 - clocks: See ../clock/clock-bindings.txt
17 - For older hardware (rk3066, rk3188, rk3228, rk3288):
18 - There is one clock that's used both to derive the functional clock
19 for the device and as the bus clock.
20 - For newer hardware (rk3399): specified by name
21 - "i2c": This is used to derive the functional clock.
22 - "pclk": This is the bus clock.
13 23
14Required on RK3066, RK3188 : 24Required on RK3066, RK3188 :
15 25
diff --git a/Documentation/devicetree/bindings/i2c/i2c.txt b/Documentation/devicetree/bindings/i2c/i2c.txt
index c8d977ed847f..f31b2ad1552b 100644
--- a/Documentation/devicetree/bindings/i2c/i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c.txt
@@ -62,6 +62,13 @@ wants to support one of the below features, it should adapt the bindings below.
62- wakeup-source 62- wakeup-source
63 device can be used as a wakeup source. 63 device can be used as a wakeup source.
64 64
65- reg
66 I2C slave addresses
67
68- reg-names
69 Names of map programmable addresses.
70 It can contain any map needing another address than default one.
71
65Binding may contain optional "interrupts" property, describing interrupts 72Binding may contain optional "interrupts" property, describing interrupts
66used by the device. I2C core will assign "irq" interrupt (or the very first 73used by the device. I2C core will assign "irq" interrupt (or the very first
67interrupt if not using interrupt names) as primary interrupt for the slave. 74interrupt if not using interrupt names) as primary interrupt for the slave.
diff --git a/Documentation/i2c/slave-interface b/Documentation/i2c/slave-interface
index 61ed05cd9531..80807adb8ded 100644
--- a/Documentation/i2c/slave-interface
+++ b/Documentation/i2c/slave-interface
@@ -139,9 +139,9 @@ If you want to add slave support to the bus driver:
139* implement calls to register/unregister the slave and add those to the 139* implement calls to register/unregister the slave and add those to the
140 struct i2c_algorithm. When registering, you probably need to set the i2c 140 struct i2c_algorithm. When registering, you probably need to set the i2c
141 slave address and enable slave specific interrupts. If you use runtime pm, you 141 slave address and enable slave specific interrupts. If you use runtime pm, you
142 should use pm_runtime_forbid() because your device usually needs to be powered 142 should use pm_runtime_get_sync() because your device usually needs to be
143 on always to be able to detect its slave address. When unregistering, do the 143 powered on always to be able to detect its slave address. When unregistering,
144 inverse of the above. 144 do the inverse of the above.
145 145
146* Catch the slave interrupts and send appropriate i2c_slave_events to the backend. 146* Catch the slave interrupts and send appropriate i2c_slave_events to the backend.
147 147
@@ -173,13 +173,14 @@ During development of this API, the question of using buffers instead of just
173bytes came up. Such an extension might be possible, usefulness is unclear at 173bytes came up. Such an extension might be possible, usefulness is unclear at
174this time of writing. Some points to keep in mind when using buffers: 174this time of writing. Some points to keep in mind when using buffers:
175 175
176* Buffers should be opt-in and slave drivers will always have to support 176* Buffers should be opt-in and backend drivers will always have to support
177 byte-based transactions as the ultimate fallback because this is how the 177 byte-based transactions as the ultimate fallback anyhow because this is how
178 majority of HW works. 178 the majority of HW works.
179 179
180* For backends simulating hardware registers, buffers are not helpful because 180* For backends simulating hardware registers, buffers are largely not helpful
181 on writes an action should be immediately triggered. For reads, the data in 181 because after each byte written an action should be immediately triggered.
182 the buffer might get stale. 182 For reads, the data kept in the buffer might get stale if the backend just
183 updated a register because of internal processing.
183 184
184* A master can send STOP at any time. For partially transferred buffers, this 185* A master can send STOP at any time. For partially transferred buffers, this
185 means additional code to handle this exception. Such code tends to be 186 means additional code to handle this exception. Such code tends to be
diff --git a/Documentation/i2c/smbus-protocol b/Documentation/i2c/smbus-protocol
index 6012b12b3510..14d4ec1be245 100644
--- a/Documentation/i2c/smbus-protocol
+++ b/Documentation/i2c/smbus-protocol
@@ -199,6 +199,12 @@ alerting device's address.
199 199
200[S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] 200[S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
201 201
202This is implemented in the following way in the Linux kernel:
203* I2C bus drivers which support SMBus Host Notify should call
204 i2c_setup_smbus_host_notify() to setup SMBus Host Notify support.
205* I2C drivers for devices which can trigger SMBus Host Notify should implement
206 the optional alert() callback.
207
202 208
203Packet Error Checking (PEC) 209Packet Error Checking (PEC)
204=========================== 210===========================
diff --git a/drivers/char/ipmi/ipmi_ssif.c b/drivers/char/ipmi/ipmi_ssif.c
index 097c86898608..5673ffff00be 100644
--- a/drivers/char/ipmi/ipmi_ssif.c
+++ b/drivers/char/ipmi/ipmi_ssif.c
@@ -568,12 +568,16 @@ static void retry_timeout(unsigned long data)
568} 568}
569 569
570 570
571static void ssif_alert(struct i2c_client *client, unsigned int data) 571static void ssif_alert(struct i2c_client *client, enum i2c_alert_protocol type,
572 unsigned int data)
572{ 573{
573 struct ssif_info *ssif_info = i2c_get_clientdata(client); 574 struct ssif_info *ssif_info = i2c_get_clientdata(client);
574 unsigned long oflags, *flags; 575 unsigned long oflags, *flags;
575 bool do_get = false; 576 bool do_get = false;
576 577
578 if (type != I2C_PROTOCOL_SMBUS_ALERT)
579 return;
580
577 ssif_inc_stat(ssif_info, alerts); 581 ssif_inc_stat(ssif_info, alerts);
578 582
579 flags = ipmi_ssif_lock_cond(ssif_info, &oflags); 583 flags = ipmi_ssif_lock_cond(ssif_info, &oflags);
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index f51e758ba529..1e8237478b2f 100644
--- a/drivers/hwmon/lm90.c
+++ b/drivers/hwmon/lm90.c
@@ -1719,10 +1719,14 @@ static int lm90_probe(struct i2c_client *client,
1719 return 0; 1719 return 0;
1720} 1720}
1721 1721
1722static void lm90_alert(struct i2c_client *client, unsigned int flag) 1722static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1723 unsigned int flag)
1723{ 1724{
1724 u16 alarms; 1725 u16 alarms;
1725 1726
1727 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1728 return;
1729
1726 if (lm90_is_tripped(client, &alarms)) { 1730 if (lm90_is_tripped(client, &alarms)) {
1727 /* 1731 /*
1728 * Disable ALERT# output, because these chips don't implement 1732 * Disable ALERT# output, because these chips don't implement
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 78fbee463628..d223650a97e4 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -88,8 +88,8 @@ config I2C_SMBUS
88 tristate "SMBus-specific protocols" if !I2C_HELPER_AUTO 88 tristate "SMBus-specific protocols" if !I2C_HELPER_AUTO
89 help 89 help
90 Say Y here if you want support for SMBus extensions to the I2C 90 Say Y here if you want support for SMBus extensions to the I2C
91 specification. At the moment, the only supported extension is 91 specification. At the moment, two extensions are supported:
92 the SMBus alert protocol. 92 the SMBus Alert protocol and the SMBus Host Notify protocol.
93 93
94 This support is also available as a module. If so, the module 94 This support is also available as a module. If so, the module
95 will be called i2c-smbus. 95 will be called i2c-smbus.
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index f167021b8c21..5c3993b26129 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -91,6 +91,7 @@ config I2C_I801
91 tristate "Intel 82801 (ICH/PCH)" 91 tristate "Intel 82801 (ICH/PCH)"
92 depends on PCI 92 depends on PCI
93 select CHECK_SIGNATURE if X86 && DMI 93 select CHECK_SIGNATURE if X86 && DMI
94 select I2C_SMBUS
94 help 95 help
95 If you say yes to this option, support will be included for the Intel 96 If you say yes to this option, support will be included for the Intel
96 801 family of mainboard I2C interfaces. Specifically, the following 97 801 family of mainboard I2C interfaces. Specifically, the following
@@ -397,7 +398,7 @@ config I2C_BCM_KONA
397 398
398config I2C_BRCMSTB 399config I2C_BRCMSTB
399 tristate "BRCM Settop I2C controller" 400 tristate "BRCM Settop I2C controller"
400 depends on ARCH_BRCMSTB || COMPILE_TEST 401 depends on ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST
401 default y 402 default y
402 help 403 help
403 If you say yes to this option, support will be included for the 404 If you say yes to this option, support will be included for the
@@ -490,7 +491,9 @@ config I2C_DESIGNWARE_PCI
490 491
491config I2C_DESIGNWARE_BAYTRAIL 492config I2C_DESIGNWARE_BAYTRAIL
492 bool "Intel Baytrail I2C semaphore support" 493 bool "Intel Baytrail I2C semaphore support"
493 depends on I2C_DESIGNWARE_PLATFORM && IOSF_MBI=y && ACPI 494 depends on ACPI
495 depends on (I2C_DESIGNWARE_PLATFORM=m && IOSF_MBI) || \
496 (I2C_DESIGNWARE_PLATFORM=y && IOSF_MBI=y)
494 help 497 help
495 This driver enables managed host access to the PMIC I2C bus on select 498 This driver enables managed host access to the PMIC I2C bus on select
496 Intel BayTrail platforms using the X-Powers AXP288 PMIC. It allows 499 Intel BayTrail platforms using the X-Powers AXP288 PMIC. It allows
@@ -635,7 +638,7 @@ config I2C_LPC2K
635 638
636config I2C_MESON 639config I2C_MESON
637 tristate "Amlogic Meson I2C controller" 640 tristate "Amlogic Meson I2C controller"
638 depends on ARCH_MESON 641 depends on ARCH_MESON || COMPILE_TEST
639 help 642 help
640 If you say yes to this option, support will be included for the 643 If you say yes to this option, support will be included for the
641 I2C interface on the Amlogic Meson family of SoCs. 644 I2C interface on the Amlogic Meson family of SoCs.
@@ -924,7 +927,7 @@ config I2C_UNIPHIER_F
924 927
925config I2C_VERSATILE 928config I2C_VERSATILE
926 tristate "ARM Versatile/Realview I2C bus support" 929 tristate "ARM Versatile/Realview I2C bus support"
927 depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS 930 depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS || COMPILE_TEST
928 select I2C_ALGOBIT 931 select I2C_ALGOBIT
929 help 932 help
930 Say yes if you want to support the I2C serial bus on ARMs Versatile 933 Say yes if you want to support the I2C serial bus on ARMs Versatile
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 818b051d25e6..d4f3239b5686 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -253,7 +253,8 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
253 253
254 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL); 254 i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
255 if (IS_ERR(i2c_dev->clk)) { 255 if (IS_ERR(i2c_dev->clk)) {
256 dev_err(&pdev->dev, "Could not get clock\n"); 256 if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER)
257 dev_err(&pdev->dev, "Could not get clock\n");
257 return PTR_ERR(i2c_dev->clk); 258 return PTR_ERR(i2c_dev->clk);
258 } 259 }
259 260
diff --git a/drivers/i2c/busses/i2c-brcmstb.c b/drivers/i2c/busses/i2c-brcmstb.c
index 6a8cfc1344b2..3f5a4d71d3bf 100644
--- a/drivers/i2c/busses/i2c-brcmstb.c
+++ b/drivers/i2c/busses/i2c-brcmstb.c
@@ -343,10 +343,9 @@ static int brcmstb_i2c_xfer_bsc_data(struct brcmstb_i2c_dev *dev,
343 struct bsc_regs *pi2creg = dev->bsc_regmap; 343 struct bsc_regs *pi2creg = dev->bsc_regmap;
344 int no_ack = pmsg->flags & I2C_M_IGNORE_NAK; 344 int no_ack = pmsg->flags & I2C_M_IGNORE_NAK;
345 int data_regsz = brcmstb_i2c_get_data_regsz(dev); 345 int data_regsz = brcmstb_i2c_get_data_regsz(dev);
346 int xfersz = brcmstb_i2c_get_xfersz(dev);
347 346
348 /* see if the transaction needs to check NACK conditions */ 347 /* see if the transaction needs to check NACK conditions */
349 if (no_ack || len <= xfersz) { 348 if (no_ack) {
350 cmd = (pmsg->flags & I2C_M_RD) ? CMD_RD_NOACK 349 cmd = (pmsg->flags & I2C_M_RD) ? CMD_RD_NOACK
351 : CMD_WR_NOACK; 350 : CMD_WR_NOACK;
352 pi2creg->ctlhi_reg |= BSC_CTLHI_REG_IGNORE_ACK_MASK; 351 pi2creg->ctlhi_reg |= BSC_CTLHI_REG_IGNORE_ACK_MASK;
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 99b54be6ba73..c6922b806fb7 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -663,7 +663,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
663 i2c_dw_xfer_init(dev); 663 i2c_dw_xfer_init(dev);
664 664
665 /* wait for tx to complete */ 665 /* wait for tx to complete */
666 if (!wait_for_completion_timeout(&dev->cmd_complete, HZ)) { 666 if (!wait_for_completion_timeout(&dev->cmd_complete, adap->timeout)) {
667 dev_err(dev->dev, "controller timed out\n"); 667 dev_err(dev->dev, "controller timed out\n");
668 /* i2c_dw_init implicitly disables the adapter */ 668 /* i2c_dw_init implicitly disables the adapter */
669 i2c_dw_init(dev); 669 i2c_dw_init(dev);
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index cd409e7fbc71..38493a7142ad 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -26,6 +26,7 @@
26#define DW_IC_CON_MASTER 0x1 26#define DW_IC_CON_MASTER 0x1
27#define DW_IC_CON_SPEED_STD 0x2 27#define DW_IC_CON_SPEED_STD 0x2
28#define DW_IC_CON_SPEED_FAST 0x4 28#define DW_IC_CON_SPEED_FAST 0x4
29#define DW_IC_CON_SPEED_MASK 0x6
29#define DW_IC_CON_10BITADDR_MASTER 0x10 30#define DW_IC_CON_10BITADDR_MASTER 0x10
30#define DW_IC_CON_RESTART_EN 0x20 31#define DW_IC_CON_RESTART_EN 0x20
31#define DW_IC_CON_SLAVE_DISABLE 0x40 32#define DW_IC_CON_SLAVE_DISABLE 0x40
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 7368be000c96..96f8230cd2d3 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2006 Texas Instruments. 6 * Copyright (C) 2006 Texas Instruments.
7 * Copyright (C) 2007 MontaVista Software Inc. 7 * Copyright (C) 2007 MontaVista Software Inc.
8 * Copyright (C) 2009 Provigent Ltd. 8 * Copyright (C) 2009 Provigent Ltd.
9 * Copyright (C) 2011, 2015 Intel Corporation. 9 * Copyright (C) 2011, 2015, 2016 Intel Corporation.
10 * 10 *
11 * ---------------------------------------------------------------------------- 11 * ----------------------------------------------------------------------------
12 * 12 *
@@ -23,31 +23,27 @@
23 * 23 *
24 */ 24 */
25 25
26#include <linux/kernel.h> 26#include <linux/acpi.h>
27#include <linux/module.h>
28#include <linux/delay.h> 27#include <linux/delay.h>
29#include <linux/i2c.h>
30#include <linux/errno.h>
31#include <linux/sched.h>
32#include <linux/err.h> 28#include <linux/err.h>
29#include <linux/errno.h>
30#include <linux/i2c.h>
33#include <linux/interrupt.h> 31#include <linux/interrupt.h>
34#include <linux/io.h> 32#include <linux/io.h>
35#include <linux/slab.h> 33#include <linux/kernel.h>
34#include <linux/module.h>
36#include <linux/pci.h> 35#include <linux/pci.h>
37#include <linux/pm_runtime.h> 36#include <linux/pm_runtime.h>
38#include <linux/acpi.h> 37#include <linux/sched.h>
38#include <linux/slab.h>
39
39#include "i2c-designware-core.h" 40#include "i2c-designware-core.h"
40 41
41#define DRIVER_NAME "i2c-designware-pci" 42#define DRIVER_NAME "i2c-designware-pci"
42 43
43enum dw_pci_ctl_id_t { 44enum dw_pci_ctl_id_t {
44 medfield_0, 45 medfield,
45 medfield_1, 46 merrifield,
46 medfield_2,
47 medfield_3,
48 medfield_4,
49 medfield_5,
50
51 baytrail, 47 baytrail,
52 haswell, 48 haswell,
53}; 49};
@@ -68,6 +64,7 @@ struct dw_pci_controller {
68 u32 clk_khz; 64 u32 clk_khz;
69 u32 functionality; 65 u32 functionality;
70 struct dw_scl_sda_cfg *scl_sda_cfg; 66 struct dw_scl_sda_cfg *scl_sda_cfg;
67 int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
71}; 68};
72 69
73#define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ 70#define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \
@@ -80,6 +77,14 @@ struct dw_pci_controller {
80 I2C_FUNC_SMBUS_WORD_DATA | \ 77 I2C_FUNC_SMBUS_WORD_DATA | \
81 I2C_FUNC_SMBUS_I2C_BLOCK) 78 I2C_FUNC_SMBUS_I2C_BLOCK)
82 79
80/* Merrifield HCNT/LCNT/SDA hold time */
81static struct dw_scl_sda_cfg mrfld_config = {
82 .ss_hcnt = 0x2f8,
83 .fs_hcnt = 0x87,
84 .ss_lcnt = 0x37b,
85 .fs_lcnt = 0x10a,
86};
87
83/* BayTrail HCNT/LCNT/SDA hold time */ 88/* BayTrail HCNT/LCNT/SDA hold time */
84static struct dw_scl_sda_cfg byt_config = { 89static struct dw_scl_sda_cfg byt_config = {
85 .ss_hcnt = 0x200, 90 .ss_hcnt = 0x200,
@@ -98,48 +103,60 @@ static struct dw_scl_sda_cfg hsw_config = {
98 .sda_hold = 0x9, 103 .sda_hold = 0x9,
99}; 104};
100 105
106static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
107{
108 switch (pdev->device) {
109 case 0x0817:
110 c->bus_cfg &= ~DW_IC_CON_SPEED_MASK;
111 c->bus_cfg |= DW_IC_CON_SPEED_STD;
112 case 0x0818:
113 case 0x0819:
114 c->bus_num = pdev->device - 0x817 + 3;
115 return 0;
116 case 0x082C:
117 case 0x082D:
118 case 0x082E:
119 c->bus_num = pdev->device - 0x82C + 0;
120 return 0;
121 }
122 return -ENODEV;
123}
124
125static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
126{
127 /*
128 * On Intel Merrifield the user visible i2c busses are enumerated
129 * [1..7]. So, we add 1 to shift the default range. Besides that the
130 * first PCI slot provides 4 functions, that's why we have to add 0 to
131 * the first slot and 4 to the next one.
132 */
133 switch (PCI_SLOT(pdev->devfn)) {
134 case 8:
135 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1;
136 return 0;
137 case 9:
138 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1;
139 return 0;
140 }
141 return -ENODEV;
142}
143
101static struct dw_pci_controller dw_pci_controllers[] = { 144static struct dw_pci_controller dw_pci_controllers[] = {
102 [medfield_0] = { 145 [medfield] = {
103 .bus_num = 0, 146 .bus_num = -1,
104 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
105 .tx_fifo_depth = 32,
106 .rx_fifo_depth = 32,
107 .clk_khz = 25000,
108 },
109 [medfield_1] = {
110 .bus_num = 1,
111 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
112 .tx_fifo_depth = 32,
113 .rx_fifo_depth = 32,
114 .clk_khz = 25000,
115 },
116 [medfield_2] = {
117 .bus_num = 2,
118 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
119 .tx_fifo_depth = 32,
120 .rx_fifo_depth = 32,
121 .clk_khz = 25000,
122 },
123 [medfield_3] = {
124 .bus_num = 3,
125 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
126 .tx_fifo_depth = 32,
127 .rx_fifo_depth = 32,
128 .clk_khz = 25000,
129 },
130 [medfield_4] = {
131 .bus_num = 4,
132 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 147 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
133 .tx_fifo_depth = 32, 148 .tx_fifo_depth = 32,
134 .rx_fifo_depth = 32, 149 .rx_fifo_depth = 32,
135 .clk_khz = 25000, 150 .clk_khz = 25000,
151 .setup = mfld_setup,
136 }, 152 },
137 [medfield_5] = { 153 [merrifield] = {
138 .bus_num = 5, 154 .bus_num = -1,
139 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 155 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
140 .tx_fifo_depth = 32, 156 .tx_fifo_depth = 64,
141 .rx_fifo_depth = 32, 157 .rx_fifo_depth = 64,
142 .clk_khz = 25000, 158 .scl_sda_cfg = &mrfld_config,
159 .setup = mrfld_setup,
143 }, 160 },
144 [baytrail] = { 161 [baytrail] = {
145 .bus_num = -1, 162 .bus_num = -1,
@@ -190,7 +207,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
190 struct dw_i2c_dev *dev; 207 struct dw_i2c_dev *dev;
191 struct i2c_adapter *adap; 208 struct i2c_adapter *adap;
192 int r; 209 int r;
193 struct dw_pci_controller *controller; 210 struct dw_pci_controller *controller;
194 struct dw_scl_sda_cfg *cfg; 211 struct dw_scl_sda_cfg *cfg;
195 212
196 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) { 213 if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
@@ -224,6 +241,13 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
224 dev->base = pcim_iomap_table(pdev)[0]; 241 dev->base = pcim_iomap_table(pdev)[0];
225 dev->dev = &pdev->dev; 242 dev->dev = &pdev->dev;
226 dev->irq = pdev->irq; 243 dev->irq = pdev->irq;
244
245 if (controller->setup) {
246 r = controller->setup(pdev, controller);
247 if (r)
248 return r;
249 }
250
227 dev->functionality = controller->functionality | 251 dev->functionality = controller->functionality |
228 DW_DEFAULT_FUNCTIONALITY; 252 DW_DEFAULT_FUNCTIONALITY;
229 253
@@ -276,12 +300,15 @@ MODULE_ALIAS("i2c_designware-pci");
276 300
277static const struct pci_device_id i2_designware_pci_ids[] = { 301static const struct pci_device_id i2_designware_pci_ids[] = {
278 /* Medfield */ 302 /* Medfield */
279 { PCI_VDEVICE(INTEL, 0x0817), medfield_3 }, 303 { PCI_VDEVICE(INTEL, 0x0817), medfield },
280 { PCI_VDEVICE(INTEL, 0x0818), medfield_4 }, 304 { PCI_VDEVICE(INTEL, 0x0818), medfield },
281 { PCI_VDEVICE(INTEL, 0x0819), medfield_5 }, 305 { PCI_VDEVICE(INTEL, 0x0819), medfield },
282 { PCI_VDEVICE(INTEL, 0x082C), medfield_0 }, 306 { PCI_VDEVICE(INTEL, 0x082C), medfield },
283 { PCI_VDEVICE(INTEL, 0x082D), medfield_1 }, 307 { PCI_VDEVICE(INTEL, 0x082D), medfield },
284 { PCI_VDEVICE(INTEL, 0x082E), medfield_2 }, 308 { PCI_VDEVICE(INTEL, 0x082E), medfield },
309 /* Merrifield */
310 { PCI_VDEVICE(INTEL, 0x1195), merrifield },
311 { PCI_VDEVICE(INTEL, 0x1196), merrifield },
285 /* Baytrail */ 312 /* Baytrail */
286 { PCI_VDEVICE(INTEL, 0x0F41), baytrail }, 313 { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
287 { PCI_VDEVICE(INTEL, 0x0F42), baytrail }, 314 { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
diff --git a/drivers/i2c/busses/i2c-efm32.c b/drivers/i2c/busses/i2c-efm32.c
index 8eff62738877..e253598d764c 100644
--- a/drivers/i2c/busses/i2c-efm32.c
+++ b/drivers/i2c/busses/i2c-efm32.c
@@ -433,7 +433,7 @@ static int efm32_i2c_probe(struct platform_device *pdev)
433 ret = request_irq(ddata->irq, efm32_i2c_irq, 0, DRIVER_NAME, ddata); 433 ret = request_irq(ddata->irq, efm32_i2c_irq, 0, DRIVER_NAME, ddata);
434 if (ret < 0) { 434 if (ret < 0) {
435 dev_err(&pdev->dev, "failed to request irq (%d)\n", ret); 435 dev_err(&pdev->dev, "failed to request irq (%d)\n", ret);
436 return ret; 436 goto err_disable_clk;
437 } 437 }
438 438
439 ret = i2c_add_adapter(&ddata->adapter); 439 ret = i2c_add_adapter(&ddata->adapter);
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index 92e8c0ce1625..8af62fb3fe41 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -319,16 +319,6 @@ static struct isa_driver i2c_elektor_driver = {
319 }, 319 },
320}; 320};
321 321
322static int __init i2c_pcfisa_init(void)
323{
324 return isa_register_driver(&i2c_elektor_driver, 1);
325}
326
327static void __exit i2c_pcfisa_exit(void)
328{
329 isa_unregister_driver(&i2c_elektor_driver);
330}
331
332MODULE_AUTHOR("Hans Berglund <hb@spacetec.no>"); 322MODULE_AUTHOR("Hans Berglund <hb@spacetec.no>");
333MODULE_DESCRIPTION("I2C-Bus adapter routines for PCF8584 ISA bus adapter"); 323MODULE_DESCRIPTION("I2C-Bus adapter routines for PCF8584 ISA bus adapter");
334MODULE_LICENSE("GPL"); 324MODULE_LICENSE("GPL");
@@ -338,6 +328,4 @@ module_param(irq, int, 0);
338module_param(clock, int, 0); 328module_param(clock, int, 0);
339module_param(own, int, 0); 329module_param(own, int, 0);
340module_param(mmapped, int, 0); 330module_param(mmapped, int, 0);
341 331module_isa_driver(i2c_elektor_driver, 1);
342module_init(i2c_pcfisa_init);
343module_exit(i2c_pcfisa_exit);
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 4a60ad214747..5ef9b733d153 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -72,6 +72,7 @@
72 * Block process call transaction no 72 * Block process call transaction no
73 * I2C block read transaction yes (doesn't use the block buffer) 73 * I2C block read transaction yes (doesn't use the block buffer)
74 * Slave mode no 74 * Slave mode no
75 * SMBus Host Notify yes
75 * Interrupt processing yes 76 * Interrupt processing yes
76 * 77 *
77 * See the file Documentation/i2c/busses/i2c-i801 for details. 78 * See the file Documentation/i2c/busses/i2c-i801 for details.
@@ -86,6 +87,7 @@
86#include <linux/ioport.h> 87#include <linux/ioport.h>
87#include <linux/init.h> 88#include <linux/init.h>
88#include <linux/i2c.h> 89#include <linux/i2c.h>
90#include <linux/i2c-smbus.h>
89#include <linux/acpi.h> 91#include <linux/acpi.h>
90#include <linux/io.h> 92#include <linux/io.h>
91#include <linux/dmi.h> 93#include <linux/dmi.h>
@@ -96,8 +98,7 @@
96#include <linux/platform_data/itco_wdt.h> 98#include <linux/platform_data/itco_wdt.h>
97#include <linux/pm_runtime.h> 99#include <linux/pm_runtime.h>
98 100
99#if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ 101#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
100 defined CONFIG_DMI
101#include <linux/gpio.h> 102#include <linux/gpio.h>
102#include <linux/i2c-mux-gpio.h> 103#include <linux/i2c-mux-gpio.h>
103#endif 104#endif
@@ -113,6 +114,10 @@
113#define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */ 114#define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */
114#define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */ 115#define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */
115#define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */ 116#define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */
117#define SMBSLVSTS(p) (16 + (p)->smba) /* ICH3 and later */
118#define SMBSLVCMD(p) (17 + (p)->smba) /* ICH3 and later */
119#define SMBNTFDADD(p) (20 + (p)->smba) /* ICH3 and later */
120#define SMBNTFDDAT(p) (22 + (p)->smba) /* ICH3 and later */
116 121
117/* PCI Address Constants */ 122/* PCI Address Constants */
118#define SMBBAR 4 123#define SMBBAR 4
@@ -144,6 +149,10 @@
144/* TCO configuration bits for TCOCTL */ 149/* TCO configuration bits for TCOCTL */
145#define TCOCTL_EN 0x0100 150#define TCOCTL_EN 0x0100
146 151
152/* Auxiliary status register bits, ICH4+ only */
153#define SMBAUXSTS_CRCE 1
154#define SMBAUXSTS_STCO 2
155
147/* Auxiliary control register bits, ICH4+ only */ 156/* Auxiliary control register bits, ICH4+ only */
148#define SMBAUXCTL_CRC 1 157#define SMBAUXCTL_CRC 1
149#define SMBAUXCTL_E32B 2 158#define SMBAUXCTL_E32B 2
@@ -177,6 +186,12 @@
177#define SMBHSTSTS_INTR 0x02 186#define SMBHSTSTS_INTR 0x02
178#define SMBHSTSTS_HOST_BUSY 0x01 187#define SMBHSTSTS_HOST_BUSY 0x01
179 188
189/* Host Notify Status registers bits */
190#define SMBSLVSTS_HST_NTFY_STS 1
191
192/* Host Notify Command registers bits */
193#define SMBSLVCMD_HST_NTFY_INTREN 0x01
194
180#define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \ 195#define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
181 SMBHSTSTS_DEV_ERR) 196 SMBHSTSTS_DEV_ERR)
182 197
@@ -239,8 +254,7 @@ struct i801_priv {
239 int len; 254 int len;
240 u8 *data; 255 u8 *data;
241 256
242#if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ 257#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
243 defined CONFIG_DMI
244 const struct i801_mux_config *mux_drvdata; 258 const struct i801_mux_config *mux_drvdata;
245 struct platform_device *mux_pdev; 259 struct platform_device *mux_pdev;
246#endif 260#endif
@@ -252,13 +266,17 @@ struct i801_priv {
252 */ 266 */
253 bool acpi_reserved; 267 bool acpi_reserved;
254 struct mutex acpi_lock; 268 struct mutex acpi_lock;
269 struct smbus_host_notify *host_notify;
255}; 270};
256 271
272#define SMBHSTNTFY_SIZE 8
273
257#define FEATURE_SMBUS_PEC (1 << 0) 274#define FEATURE_SMBUS_PEC (1 << 0)
258#define FEATURE_BLOCK_BUFFER (1 << 1) 275#define FEATURE_BLOCK_BUFFER (1 << 1)
259#define FEATURE_BLOCK_PROC (1 << 2) 276#define FEATURE_BLOCK_PROC (1 << 2)
260#define FEATURE_I2C_BLOCK_READ (1 << 3) 277#define FEATURE_I2C_BLOCK_READ (1 << 3)
261#define FEATURE_IRQ (1 << 4) 278#define FEATURE_IRQ (1 << 4)
279#define FEATURE_HOST_NOTIFY (1 << 5)
262/* Not really a feature, but it's convenient to handle it as such */ 280/* Not really a feature, but it's convenient to handle it as such */
263#define FEATURE_IDF (1 << 15) 281#define FEATURE_IDF (1 << 15)
264#define FEATURE_TCO (1 << 16) 282#define FEATURE_TCO (1 << 16)
@@ -269,6 +287,7 @@ static const char *i801_feature_names[] = {
269 "Block process call", 287 "Block process call",
270 "I2C block read", 288 "I2C block read",
271 "Interrupt", 289 "Interrupt",
290 "SMBus Host Notify",
272}; 291};
273 292
274static unsigned int disable_features; 293static unsigned int disable_features;
@@ -277,7 +296,8 @@ MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n"
277 "\t\t 0x01 disable SMBus PEC\n" 296 "\t\t 0x01 disable SMBus PEC\n"
278 "\t\t 0x02 disable the block buffer\n" 297 "\t\t 0x02 disable the block buffer\n"
279 "\t\t 0x08 disable the I2C block read functionality\n" 298 "\t\t 0x08 disable the I2C block read functionality\n"
280 "\t\t 0x10 don't use interrupts "); 299 "\t\t 0x10 don't use interrupts\n"
300 "\t\t 0x20 disable SMBus Host Notify ");
281 301
282/* Make sure the SMBus host is ready to start transmitting. 302/* Make sure the SMBus host is ready to start transmitting.
283 Return 0 if it is, -EBUSY if it is not. */ 303 Return 0 if it is, -EBUSY if it is not. */
@@ -305,6 +325,29 @@ static int i801_check_pre(struct i801_priv *priv)
305 } 325 }
306 } 326 }
307 327
328 /*
329 * Clear CRC status if needed.
330 * During normal operation, i801_check_post() takes care
331 * of it after every operation. We do it here only in case
332 * the hardware was already in this state when the driver
333 * started.
334 */
335 if (priv->features & FEATURE_SMBUS_PEC) {
336 status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
337 if (status) {
338 dev_dbg(&priv->pci_dev->dev,
339 "Clearing aux status flags (%02x)\n", status);
340 outb_p(status, SMBAUXSTS(priv));
341 status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
342 if (status) {
343 dev_err(&priv->pci_dev->dev,
344 "Failed clearing aux status flags (%02x)\n",
345 status);
346 return -EBUSY;
347 }
348 }
349 }
350
308 return 0; 351 return 0;
309} 352}
310 353
@@ -348,8 +391,30 @@ static int i801_check_post(struct i801_priv *priv, int status)
348 dev_err(&priv->pci_dev->dev, "Transaction failed\n"); 391 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
349 } 392 }
350 if (status & SMBHSTSTS_DEV_ERR) { 393 if (status & SMBHSTSTS_DEV_ERR) {
351 result = -ENXIO; 394 /*
352 dev_dbg(&priv->pci_dev->dev, "No response\n"); 395 * This may be a PEC error, check and clear it.
396 *
397 * AUXSTS is handled differently from HSTSTS.
398 * For HSTSTS, i801_isr() or i801_wait_intr()
399 * has already cleared the error bits in hardware,
400 * and we are passed a copy of the original value
401 * in "status".
402 * For AUXSTS, the hardware register is left
403 * for us to handle here.
404 * This is asymmetric, slightly iffy, but safe,
405 * since all this code is serialized and the CRCE
406 * bit is harmless as long as it's cleared before
407 * the next operation.
408 */
409 if ((priv->features & FEATURE_SMBUS_PEC) &&
410 (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) {
411 outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv));
412 result = -EBADMSG;
413 dev_dbg(&priv->pci_dev->dev, "PEC error\n");
414 } else {
415 result = -ENXIO;
416 dev_dbg(&priv->pci_dev->dev, "No response\n");
417 }
353 } 418 }
354 if (status & SMBHSTSTS_BUS_ERR) { 419 if (status & SMBHSTSTS_BUS_ERR) {
355 result = -EAGAIN; 420 result = -EAGAIN;
@@ -511,8 +576,23 @@ static void i801_isr_byte_done(struct i801_priv *priv)
511 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); 576 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
512} 577}
513 578
579static irqreturn_t i801_host_notify_isr(struct i801_priv *priv)
580{
581 unsigned short addr;
582 unsigned int data;
583
584 addr = inb_p(SMBNTFDADD(priv)) >> 1;
585 data = inw_p(SMBNTFDDAT(priv));
586
587 i2c_handle_smbus_host_notify(priv->host_notify, addr, data);
588
589 /* clear Host Notify bit and return */
590 outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
591 return IRQ_HANDLED;
592}
593
514/* 594/*
515 * There are two kinds of interrupts: 595 * There are three kinds of interrupts:
516 * 596 *
517 * 1) i801 signals transaction completion with one of these interrupts: 597 * 1) i801 signals transaction completion with one of these interrupts:
518 * INTR - Success 598 * INTR - Success
@@ -524,6 +604,8 @@ static void i801_isr_byte_done(struct i801_priv *priv)
524 * 604 *
525 * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt 605 * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
526 * occurs for each byte of a byte-by-byte to prepare the next byte. 606 * occurs for each byte of a byte-by-byte to prepare the next byte.
607 *
608 * 3) Host Notify interrupts
527 */ 609 */
528static irqreturn_t i801_isr(int irq, void *dev_id) 610static irqreturn_t i801_isr(int irq, void *dev_id)
529{ 611{
@@ -536,6 +618,12 @@ static irqreturn_t i801_isr(int irq, void *dev_id)
536 if (!(pcists & SMBPCISTS_INTS)) 618 if (!(pcists & SMBPCISTS_INTS))
537 return IRQ_NONE; 619 return IRQ_NONE;
538 620
621 if (priv->features & FEATURE_HOST_NOTIFY) {
622 status = inb_p(SMBSLVSTS(priv));
623 if (status & SMBSLVSTS_HST_NTFY_STS)
624 return i801_host_notify_isr(priv);
625 }
626
539 status = inb_p(SMBHSTSTS(priv)); 627 status = inb_p(SMBHSTSTS(priv));
540 if (status & SMBHSTSTS_BYTE_DONE) 628 if (status & SMBHSTSTS_BYTE_DONE)
541 i801_isr_byte_done(priv); 629 i801_isr_byte_done(priv);
@@ -547,7 +635,7 @@ static irqreturn_t i801_isr(int irq, void *dev_id)
547 status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS; 635 status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
548 if (status) { 636 if (status) {
549 outb_p(status, SMBHSTSTS(priv)); 637 outb_p(status, SMBHSTSTS(priv));
550 priv->status |= status; 638 priv->status = status;
551 wake_up(&priv->waitq); 639 wake_up(&priv->waitq);
552 } 640 }
553 641
@@ -847,7 +935,28 @@ static u32 i801_func(struct i2c_adapter *adapter)
847 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | 935 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
848 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | 936 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
849 ((priv->features & FEATURE_I2C_BLOCK_READ) ? 937 ((priv->features & FEATURE_I2C_BLOCK_READ) ?
850 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0); 938 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) |
939 ((priv->features & FEATURE_HOST_NOTIFY) ?
940 I2C_FUNC_SMBUS_HOST_NOTIFY : 0);
941}
942
943static int i801_enable_host_notify(struct i2c_adapter *adapter)
944{
945 struct i801_priv *priv = i2c_get_adapdata(adapter);
946
947 if (!(priv->features & FEATURE_HOST_NOTIFY))
948 return -ENOTSUPP;
949
950 if (!priv->host_notify)
951 priv->host_notify = i2c_setup_smbus_host_notify(adapter);
952 if (!priv->host_notify)
953 return -ENOMEM;
954
955 outb_p(SMBSLVCMD_HST_NTFY_INTREN, SMBSLVCMD(priv));
956 /* clear Host Notify bit to allow a new notification */
957 outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
958
959 return 0;
851} 960}
852 961
853static const struct i2c_algorithm smbus_algorithm = { 962static const struct i2c_algorithm smbus_algorithm = {
@@ -1022,8 +1131,7 @@ static void __init input_apanel_init(void) {}
1022static void i801_probe_optional_slaves(struct i801_priv *priv) {} 1131static void i801_probe_optional_slaves(struct i801_priv *priv) {}
1023#endif /* CONFIG_X86 && CONFIG_DMI */ 1132#endif /* CONFIG_X86 && CONFIG_DMI */
1024 1133
1025#if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \ 1134#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
1026 defined CONFIG_DMI
1027static struct i801_mux_config i801_mux_config_asus_z8_d12 = { 1135static struct i801_mux_config i801_mux_config_asus_z8_d12 = {
1028 .gpio_chip = "gpio_ich", 1136 .gpio_chip = "gpio_ich",
1029 .values = { 0x02, 0x03 }, 1137 .values = { 0x02, 0x03 },
@@ -1379,6 +1487,7 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
1379 priv->features |= FEATURE_SMBUS_PEC; 1487 priv->features |= FEATURE_SMBUS_PEC;
1380 priv->features |= FEATURE_BLOCK_BUFFER; 1488 priv->features |= FEATURE_BLOCK_BUFFER;
1381 priv->features |= FEATURE_TCO; 1489 priv->features |= FEATURE_TCO;
1490 priv->features |= FEATURE_HOST_NOTIFY;
1382 break; 1491 break;
1383 1492
1384 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0: 1493 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
@@ -1398,6 +1507,8 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
1398 priv->features |= FEATURE_BLOCK_BUFFER; 1507 priv->features |= FEATURE_BLOCK_BUFFER;
1399 /* fall through */ 1508 /* fall through */
1400 case PCI_DEVICE_ID_INTEL_82801CA_3: 1509 case PCI_DEVICE_ID_INTEL_82801CA_3:
1510 priv->features |= FEATURE_HOST_NOTIFY;
1511 /* fall through */
1401 case PCI_DEVICE_ID_INTEL_82801BA_2: 1512 case PCI_DEVICE_ID_INTEL_82801BA_2:
1402 case PCI_DEVICE_ID_INTEL_82801AB_3: 1513 case PCI_DEVICE_ID_INTEL_82801AB_3:
1403 case PCI_DEVICE_ID_INTEL_82801AA_3: 1514 case PCI_DEVICE_ID_INTEL_82801AA_3:
@@ -1507,6 +1618,15 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
1507 return err; 1618 return err;
1508 } 1619 }
1509 1620
1621 /*
1622 * Enable Host Notify for chips that supports it.
1623 * It is done after i2c_add_adapter() so that we are sure the work queue
1624 * is not used if i2c_add_adapter() fails.
1625 */
1626 err = i801_enable_host_notify(&priv->adapter);
1627 if (err && err != -ENOTSUPP)
1628 dev_warn(&dev->dev, "Unable to enable SMBus Host Notify\n");
1629
1510 i801_probe_optional_slaves(priv); 1630 i801_probe_optional_slaves(priv);
1511 /* We ignore errors - multiplexing is optional */ 1631 /* We ignore errors - multiplexing is optional */
1512 i801_add_mux(priv); 1632 i801_add_mux(priv);
@@ -1553,6 +1673,14 @@ static int i801_suspend(struct device *dev)
1553 1673
1554static int i801_resume(struct device *dev) 1674static int i801_resume(struct device *dev)
1555{ 1675{
1676 struct pci_dev *pci_dev = to_pci_dev(dev);
1677 struct i801_priv *priv = pci_get_drvdata(pci_dev);
1678 int err;
1679
1680 err = i801_enable_host_notify(&priv->adapter);
1681 if (err && err != -ENOTSUPP)
1682 dev_warn(dev, "Unable to enable SMBus Host Notify\n");
1683
1556 return 0; 1684 return 0;
1557} 1685}
1558#endif 1686#endif
diff --git a/drivers/i2c/busses/i2c-jz4780.c b/drivers/i2c/busses/i2c-jz4780.c
index ba14a863b451..cd9872594fe2 100644
--- a/drivers/i2c/busses/i2c-jz4780.c
+++ b/drivers/i2c/busses/i2c-jz4780.c
@@ -791,10 +791,6 @@ static int jz4780_i2c_probe(struct platform_device *pdev)
791 791
792 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0); 792 jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0);
793 793
794 i2c->cmd = 0;
795 memset(i2c->cmd_buf, 0, BUFSIZE);
796 memset(i2c->data_buf, 0, BUFSIZE);
797
798 i2c->irq = platform_get_irq(pdev, 0); 794 i2c->irq = platform_get_irq(pdev, 0);
799 ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0, 795 ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0,
800 dev_name(&pdev->dev), i2c); 796 dev_name(&pdev->dev), i2c);
diff --git a/drivers/i2c/busses/i2c-pca-isa.c b/drivers/i2c/busses/i2c-pca-isa.c
index e0eb4ca0102e..ba88f17f636c 100644
--- a/drivers/i2c/busses/i2c-pca-isa.c
+++ b/drivers/i2c/busses/i2c-pca-isa.c
@@ -193,23 +193,12 @@ static struct isa_driver pca_isa_driver = {
193 } 193 }
194}; 194};
195 195
196static int __init pca_isa_init(void)
197{
198 return isa_register_driver(&pca_isa_driver, 1);
199}
200
201static void __exit pca_isa_exit(void)
202{
203 isa_unregister_driver(&pca_isa_driver);
204}
205
206MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>"); 196MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>");
207MODULE_DESCRIPTION("ISA base PCA9564/PCA9665 driver"); 197MODULE_DESCRIPTION("ISA base PCA9564/PCA9665 driver");
208MODULE_LICENSE("GPL"); 198MODULE_LICENSE("GPL");
209 199
210module_param(base, ulong, 0); 200module_param(base, ulong, 0);
211MODULE_PARM_DESC(base, "I/O base address"); 201MODULE_PARM_DESC(base, "I/O base address");
212
213module_param(irq, int, 0); 202module_param(irq, int, 0);
214MODULE_PARM_DESC(irq, "IRQ"); 203MODULE_PARM_DESC(irq, "IRQ");
215module_param(clock, int, 0); 204module_param(clock, int, 0);
@@ -220,6 +209,4 @@ MODULE_PARM_DESC(clock, "Clock rate in hertz.\n\t\t"
220 "\t\t\t\tFast: 100100 - 400099\n" 209 "\t\t\t\tFast: 100100 - 400099\n"
221 "\t\t\t\tFast+: 400100 - 10000099\n" 210 "\t\t\t\tFast+: 400100 - 10000099\n"
222 "\t\t\t\tTurbo: Up to 1265800"); 211 "\t\t\t\tTurbo: Up to 1265800");
223 212module_isa_driver(pca_isa_driver, 1);
224module_init(pca_isa_init);
225module_exit(pca_isa_exit);
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 041050edd809..501bd15cb78e 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -213,14 +213,16 @@ static irqreturn_t qup_i2c_interrupt(int irq, void *dev)
213 bus_err &= I2C_STATUS_ERROR_MASK; 213 bus_err &= I2C_STATUS_ERROR_MASK;
214 qup_err &= QUP_STATUS_ERROR_FLAGS; 214 qup_err &= QUP_STATUS_ERROR_FLAGS;
215 215
216 if (qup_err) { 216 /* Clear the error bits in QUP_ERROR_FLAGS */
217 /* Clear Error interrupt */ 217 if (qup_err)
218 writel(qup_err, qup->base + QUP_ERROR_FLAGS); 218 writel(qup_err, qup->base + QUP_ERROR_FLAGS);
219 goto done;
220 }
221 219
222 if (bus_err) { 220 /* Clear the error bits in QUP_I2C_STATUS */
223 /* Clear Error interrupt */ 221 if (bus_err)
222 writel(bus_err, qup->base + QUP_I2C_STATUS);
223
224 /* Reset the QUP State in case of error */
225 if (qup_err || bus_err) {
224 writel(QUP_RESET_STATE, qup->base + QUP_STATE); 226 writel(QUP_RESET_STATE, qup->base + QUP_STATE);
225 goto done; 227 goto done;
226 } 228 }
@@ -310,6 +312,7 @@ static int qup_i2c_wait_ready(struct qup_i2c_dev *qup, int op, bool val,
310 u32 opflags; 312 u32 opflags;
311 u32 status; 313 u32 status;
312 u32 shift = __ffs(op); 314 u32 shift = __ffs(op);
315 int ret = 0;
313 316
314 len *= qup->one_byte_t; 317 len *= qup->one_byte_t;
315 /* timeout after a wait of twice the max time */ 318 /* timeout after a wait of twice the max time */
@@ -321,18 +324,28 @@ static int qup_i2c_wait_ready(struct qup_i2c_dev *qup, int op, bool val,
321 324
322 if (((opflags & op) >> shift) == val) { 325 if (((opflags & op) >> shift) == val) {
323 if ((op == QUP_OUT_NOT_EMPTY) && qup->is_last) { 326 if ((op == QUP_OUT_NOT_EMPTY) && qup->is_last) {
324 if (!(status & I2C_STATUS_BUS_ACTIVE)) 327 if (!(status & I2C_STATUS_BUS_ACTIVE)) {
325 return 0; 328 ret = 0;
329 goto done;
330 }
326 } else { 331 } else {
327 return 0; 332 ret = 0;
333 goto done;
328 } 334 }
329 } 335 }
330 336
331 if (time_after(jiffies, timeout)) 337 if (time_after(jiffies, timeout)) {
332 return -ETIMEDOUT; 338 ret = -ETIMEDOUT;
333 339 goto done;
340 }
334 usleep_range(len, len * 2); 341 usleep_range(len, len * 2);
335 } 342 }
343
344done:
345 if (qup->bus_err || qup->qup_err)
346 ret = (qup->bus_err & QUP_I2C_NACK_FLAG) ? -ENXIO : -EIO;
347
348 return ret;
336} 349}
337 350
338static void qup_i2c_set_write_mode_v2(struct qup_i2c_dev *qup, 351static void qup_i2c_set_write_mode_v2(struct qup_i2c_dev *qup,
@@ -585,8 +598,8 @@ static void qup_i2c_bam_cb(void *data)
585} 598}
586 599
587static int qup_sg_set_buf(struct scatterlist *sg, void *buf, 600static int qup_sg_set_buf(struct scatterlist *sg, void *buf,
588 struct qup_i2c_tag *tg, unsigned int buflen, 601 unsigned int buflen, struct qup_i2c_dev *qup,
589 struct qup_i2c_dev *qup, int map, int dir) 602 int dir)
590{ 603{
591 int ret; 604 int ret;
592 605
@@ -595,9 +608,6 @@ static int qup_sg_set_buf(struct scatterlist *sg, void *buf,
595 if (!ret) 608 if (!ret)
596 return -EINVAL; 609 return -EINVAL;
597 610
598 if (!map)
599 sg_dma_address(sg) = tg->addr + ((u8 *)buf - tg->start);
600
601 return 0; 611 return 0;
602} 612}
603 613
@@ -649,37 +659,37 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg,
649 u8 *tags; 659 u8 *tags;
650 660
651 while (idx < num) { 661 while (idx < num) {
652 blocks = (msg->len + limit) / limit;
653 rem = msg->len % limit;
654 tx_len = 0, len = 0, i = 0; 662 tx_len = 0, len = 0, i = 0;
655 663
656 qup->is_last = (idx == (num - 1)); 664 qup->is_last = (idx == (num - 1));
657 665
658 qup_i2c_set_blk_data(qup, msg); 666 qup_i2c_set_blk_data(qup, msg);
659 667
668 blocks = qup->blk.count;
669 rem = msg->len - (blocks - 1) * limit;
670
660 if (msg->flags & I2C_M_RD) { 671 if (msg->flags & I2C_M_RD) {
661 rx_nents += (blocks * 2) + 1; 672 rx_nents += (blocks * 2) + 1;
662 tx_nents += 1; 673 tx_nents += 1;
663 674
664 while (qup->blk.pos < blocks) { 675 while (qup->blk.pos < blocks) {
665 /* length set to '0' implies 256 bytes */ 676 tlen = (i == (blocks - 1)) ? rem : limit;
666 tlen = (i == (blocks - 1)) ? rem : 0;
667 tags = &qup->start_tag.start[off + len]; 677 tags = &qup->start_tag.start[off + len];
668 len += qup_i2c_set_tags(tags, qup, msg, 1); 678 len += qup_i2c_set_tags(tags, qup, msg, 1);
679 qup->blk.data_len -= tlen;
669 680
670 /* scratch buf to read the start and len tags */ 681 /* scratch buf to read the start and len tags */
671 ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++], 682 ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++],
672 &qup->brx.tag.start[0], 683 &qup->brx.tag.start[0],
673 &qup->brx.tag, 684 2, qup, DMA_FROM_DEVICE);
674 2, qup, 0, 0);
675 685
676 if (ret) 686 if (ret)
677 return ret; 687 return ret;
678 688
679 ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++], 689 ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++],
680 &msg->buf[limit * i], 690 &msg->buf[limit * i],
681 NULL, tlen, qup, 691 tlen, qup,
682 1, DMA_FROM_DEVICE); 692 DMA_FROM_DEVICE);
683 if (ret) 693 if (ret)
684 return ret; 694 return ret;
685 695
@@ -688,7 +698,7 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg,
688 } 698 }
689 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++], 699 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++],
690 &qup->start_tag.start[off], 700 &qup->start_tag.start[off],
691 &qup->start_tag, len, qup, 0, 0); 701 len, qup, DMA_TO_DEVICE);
692 if (ret) 702 if (ret)
693 return ret; 703 return ret;
694 704
@@ -696,30 +706,28 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg,
696 /* scratch buf to read the BAM EOT and FLUSH tags */ 706 /* scratch buf to read the BAM EOT and FLUSH tags */
697 ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++], 707 ret = qup_sg_set_buf(&qup->brx.sg[rx_buf++],
698 &qup->brx.tag.start[0], 708 &qup->brx.tag.start[0],
699 &qup->brx.tag, 2, 709 2, qup, DMA_FROM_DEVICE);
700 qup, 0, 0);
701 if (ret) 710 if (ret)
702 return ret; 711 return ret;
703 } else { 712 } else {
704 tx_nents += (blocks * 2); 713 tx_nents += (blocks * 2);
705 714
706 while (qup->blk.pos < blocks) { 715 while (qup->blk.pos < blocks) {
707 tlen = (i == (blocks - 1)) ? rem : 0; 716 tlen = (i == (blocks - 1)) ? rem : limit;
708 tags = &qup->start_tag.start[off + tx_len]; 717 tags = &qup->start_tag.start[off + tx_len];
709 len = qup_i2c_set_tags(tags, qup, msg, 1); 718 len = qup_i2c_set_tags(tags, qup, msg, 1);
719 qup->blk.data_len -= tlen;
710 720
711 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++], 721 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++],
712 tags, 722 tags, len,
713 &qup->start_tag, len, 723 qup, DMA_TO_DEVICE);
714 qup, 0, 0);
715 if (ret) 724 if (ret)
716 return ret; 725 return ret;
717 726
718 tx_len += len; 727 tx_len += len;
719 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++], 728 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++],
720 &msg->buf[limit * i], 729 &msg->buf[limit * i],
721 NULL, tlen, qup, 1, 730 tlen, qup, DMA_TO_DEVICE);
722 DMA_TO_DEVICE);
723 if (ret) 731 if (ret)
724 return ret; 732 return ret;
725 i++; 733 i++;
@@ -738,8 +746,7 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg,
738 QUP_BAM_FLUSH_STOP; 746 QUP_BAM_FLUSH_STOP;
739 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++], 747 ret = qup_sg_set_buf(&qup->btx.sg[tx_buf++],
740 &qup->btx.tag.start[0], 748 &qup->btx.tag.start[0],
741 &qup->btx.tag, len, 749 len, qup, DMA_TO_DEVICE);
742 qup, 0, 0);
743 if (ret) 750 if (ret)
744 return ret; 751 return ret;
745 tx_nents += 1; 752 tx_nents += 1;
@@ -801,39 +808,35 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg,
801 } 808 }
802 809
803 if (ret || qup->bus_err || qup->qup_err) { 810 if (ret || qup->bus_err || qup->qup_err) {
804 if (qup->bus_err & QUP_I2C_NACK_FLAG) { 811 if (qup_i2c_change_state(qup, QUP_RUN_STATE)) {
805 msg--; 812 dev_err(qup->dev, "change to run state timed out");
806 dev_err(qup->dev, "NACK from %x\n", msg->addr); 813 goto desc_err;
807 ret = -EIO; 814 }
808 815
809 if (qup_i2c_change_state(qup, QUP_RUN_STATE)) { 816 if (rx_nents)
810 dev_err(qup->dev, "change to run state timed out"); 817 writel(QUP_BAM_INPUT_EOT,
811 return ret; 818 qup->base + QUP_OUT_FIFO_BASE);
812 }
813 819
814 if (rx_nents) 820 writel(QUP_BAM_FLUSH_STOP, qup->base + QUP_OUT_FIFO_BASE);
815 writel(QUP_BAM_INPUT_EOT,
816 qup->base + QUP_OUT_FIFO_BASE);
817 821
818 writel(QUP_BAM_FLUSH_STOP, 822 qup_i2c_flush(qup);
819 qup->base + QUP_OUT_FIFO_BASE);
820 823
821 qup_i2c_flush(qup); 824 /* wait for remaining interrupts to occur */
825 if (!wait_for_completion_timeout(&qup->xfer, HZ))
826 dev_err(qup->dev, "flush timed out\n");
822 827
823 /* wait for remaining interrupts to occur */ 828 qup_i2c_rel_dma(qup);
824 if (!wait_for_completion_timeout(&qup->xfer, HZ))
825 dev_err(qup->dev, "flush timed out\n");
826 829
827 qup_i2c_rel_dma(qup); 830 ret = (qup->bus_err & QUP_I2C_NACK_FLAG) ? -ENXIO : -EIO;
828 }
829 } 831 }
830 832
833desc_err:
831 dma_unmap_sg(qup->dev, qup->btx.sg, tx_nents, DMA_TO_DEVICE); 834 dma_unmap_sg(qup->dev, qup->btx.sg, tx_nents, DMA_TO_DEVICE);
832 835
833 if (rx_nents) 836 if (rx_nents)
834 dma_unmap_sg(qup->dev, qup->brx.sg, rx_nents, 837 dma_unmap_sg(qup->dev, qup->brx.sg, rx_nents,
835 DMA_FROM_DEVICE); 838 DMA_FROM_DEVICE);
836desc_err: 839
837 return ret; 840 return ret;
838} 841}
839 842
@@ -849,9 +852,6 @@ static int qup_i2c_bam_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
849 if (ret) 852 if (ret)
850 goto out; 853 goto out;
851 854
852 qup->bus_err = 0;
853 qup->qup_err = 0;
854
855 writel(0, qup->base + QUP_MX_INPUT_CNT); 855 writel(0, qup->base + QUP_MX_INPUT_CNT);
856 writel(0, qup->base + QUP_MX_OUTPUT_CNT); 856 writel(0, qup->base + QUP_MX_OUTPUT_CNT);
857 857
@@ -889,12 +889,8 @@ static int qup_i2c_wait_for_complete(struct qup_i2c_dev *qup,
889 ret = -ETIMEDOUT; 889 ret = -ETIMEDOUT;
890 } 890 }
891 891
892 if (qup->bus_err || qup->qup_err) { 892 if (qup->bus_err || qup->qup_err)
893 if (qup->bus_err & QUP_I2C_NACK_FLAG) { 893 ret = (qup->bus_err & QUP_I2C_NACK_FLAG) ? -ENXIO : -EIO;
894 dev_err(qup->dev, "NACK from %x\n", msg->addr);
895 ret = -EIO;
896 }
897 }
898 894
899 return ret; 895 return ret;
900} 896}
@@ -1020,7 +1016,7 @@ static void qup_i2c_issue_read(struct qup_i2c_dev *qup, struct i2c_msg *msg)
1020{ 1016{
1021 u32 addr, len, val; 1017 u32 addr, len, val;
1022 1018
1023 addr = (msg->addr << 1) | 1; 1019 addr = i2c_8bit_addr_from_msg(msg);
1024 1020
1025 /* 0 is used to specify a length 256 (QUP_READ_LIMIT) */ 1021 /* 0 is used to specify a length 256 (QUP_READ_LIMIT) */
1026 len = (msg->len == QUP_READ_LIMIT) ? 0 : msg->len; 1022 len = (msg->len == QUP_READ_LIMIT) ? 0 : msg->len;
@@ -1186,6 +1182,9 @@ static int qup_i2c_xfer(struct i2c_adapter *adap,
1186 if (ret < 0) 1182 if (ret < 0)
1187 goto out; 1183 goto out;
1188 1184
1185 qup->bus_err = 0;
1186 qup->qup_err = 0;
1187
1189 writel(1, qup->base + QUP_SW_RESET); 1188 writel(1, qup->base + QUP_SW_RESET);
1190 ret = qup_i2c_poll_state(qup, QUP_RESET_STATE); 1189 ret = qup_i2c_poll_state(qup, QUP_RESET_STATE);
1191 if (ret) 1190 if (ret)
@@ -1235,6 +1234,9 @@ static int qup_i2c_xfer_v2(struct i2c_adapter *adap,
1235 struct qup_i2c_dev *qup = i2c_get_adapdata(adap); 1234 struct qup_i2c_dev *qup = i2c_get_adapdata(adap);
1236 int ret, len, idx = 0, use_dma = 0; 1235 int ret, len, idx = 0, use_dma = 0;
1237 1236
1237 qup->bus_err = 0;
1238 qup->qup_err = 0;
1239
1238 ret = pm_runtime_get_sync(qup->dev); 1240 ret = pm_runtime_get_sync(qup->dev);
1239 if (ret < 0) 1241 if (ret < 0)
1240 goto out; 1242 goto out;
@@ -1409,27 +1411,21 @@ static int qup_i2c_probe(struct platform_device *pdev)
1409 1411
1410 /* 2 tag bytes for each block + 5 for start, stop tags */ 1412 /* 2 tag bytes for each block + 5 for start, stop tags */
1411 size = blocks * 2 + 5; 1413 size = blocks * 2 + 5;
1412 qup->dpool = dma_pool_create("qup_i2c-dma-pool", &pdev->dev,
1413 size, 4, 0);
1414 1414
1415 qup->start_tag.start = dma_pool_alloc(qup->dpool, GFP_KERNEL, 1415 qup->start_tag.start = devm_kzalloc(&pdev->dev,
1416 &qup->start_tag.addr); 1416 size, GFP_KERNEL);
1417 if (!qup->start_tag.start) { 1417 if (!qup->start_tag.start) {
1418 ret = -ENOMEM; 1418 ret = -ENOMEM;
1419 goto fail_dma; 1419 goto fail_dma;
1420 } 1420 }
1421 1421
1422 qup->brx.tag.start = dma_pool_alloc(qup->dpool, 1422 qup->brx.tag.start = devm_kzalloc(&pdev->dev, 2, GFP_KERNEL);
1423 GFP_KERNEL,
1424 &qup->brx.tag.addr);
1425 if (!qup->brx.tag.start) { 1423 if (!qup->brx.tag.start) {
1426 ret = -ENOMEM; 1424 ret = -ENOMEM;
1427 goto fail_dma; 1425 goto fail_dma;
1428 } 1426 }
1429 1427
1430 qup->btx.tag.start = dma_pool_alloc(qup->dpool, 1428 qup->btx.tag.start = devm_kzalloc(&pdev->dev, 2, GFP_KERNEL);
1431 GFP_KERNEL,
1432 &qup->btx.tag.addr);
1433 if (!qup->btx.tag.start) { 1429 if (!qup->btx.tag.start) {
1434 ret = -ENOMEM; 1430 ret = -ENOMEM;
1435 goto fail_dma; 1431 goto fail_dma;
@@ -1568,13 +1564,6 @@ static int qup_i2c_remove(struct platform_device *pdev)
1568 struct qup_i2c_dev *qup = platform_get_drvdata(pdev); 1564 struct qup_i2c_dev *qup = platform_get_drvdata(pdev);
1569 1565
1570 if (qup->is_dma) { 1566 if (qup->is_dma) {
1571 dma_pool_free(qup->dpool, qup->start_tag.start,
1572 qup->start_tag.addr);
1573 dma_pool_free(qup->dpool, qup->brx.tag.start,
1574 qup->brx.tag.addr);
1575 dma_pool_free(qup->dpool, qup->btx.tag.start,
1576 qup->btx.tag.addr);
1577 dma_pool_destroy(qup->dpool);
1578 dma_release_channel(qup->btx.dma); 1567 dma_release_channel(qup->btx.dma);
1579 dma_release_channel(qup->brx.dma); 1568 dma_release_channel(qup->brx.dma);
1580 } 1569 }
diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
index 80bed02cd942..2bc8b01153d6 100644
--- a/drivers/i2c/busses/i2c-rk3x.c
+++ b/drivers/i2c/busses/i2c-rk3x.c
@@ -58,6 +58,12 @@ enum {
58#define REG_CON_LASTACK BIT(5) /* 1: send NACK after last received byte */ 58#define REG_CON_LASTACK BIT(5) /* 1: send NACK after last received byte */
59#define REG_CON_ACTACK BIT(6) /* 1: stop if NACK is received */ 59#define REG_CON_ACTACK BIT(6) /* 1: stop if NACK is received */
60 60
61#define REG_CON_TUNING_MASK GENMASK(15, 8)
62
63#define REG_CON_SDA_CFG(cfg) ((cfg) << 8)
64#define REG_CON_STA_CFG(cfg) ((cfg) << 12)
65#define REG_CON_STO_CFG(cfg) ((cfg) << 14)
66
61/* REG_MRXADDR bits */ 67/* REG_MRXADDR bits */
62#define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */ 68#define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */
63 69
@@ -75,6 +81,77 @@ enum {
75#define WAIT_TIMEOUT 1000 /* ms */ 81#define WAIT_TIMEOUT 1000 /* ms */
76#define DEFAULT_SCL_RATE (100 * 1000) /* Hz */ 82#define DEFAULT_SCL_RATE (100 * 1000) /* Hz */
77 83
84/**
85 * struct i2c_spec_values:
86 * @min_hold_start_ns: min hold time (repeated) START condition
87 * @min_low_ns: min LOW period of the SCL clock
88 * @min_high_ns: min HIGH period of the SCL cloc
89 * @min_setup_start_ns: min set-up time for a repeated START conditio
90 * @max_data_hold_ns: max data hold time
91 * @min_data_setup_ns: min data set-up time
92 * @min_setup_stop_ns: min set-up time for STOP condition
93 * @min_hold_buffer_ns: min bus free time between a STOP and
94 * START condition
95 */
96struct i2c_spec_values {
97 unsigned long min_hold_start_ns;
98 unsigned long min_low_ns;
99 unsigned long min_high_ns;
100 unsigned long min_setup_start_ns;
101 unsigned long max_data_hold_ns;
102 unsigned long min_data_setup_ns;
103 unsigned long min_setup_stop_ns;
104 unsigned long min_hold_buffer_ns;
105};
106
107static const struct i2c_spec_values standard_mode_spec = {
108 .min_hold_start_ns = 4000,
109 .min_low_ns = 4700,
110 .min_high_ns = 4000,
111 .min_setup_start_ns = 4700,
112 .max_data_hold_ns = 3450,
113 .min_data_setup_ns = 250,
114 .min_setup_stop_ns = 4000,
115 .min_hold_buffer_ns = 4700,
116};
117
118static const struct i2c_spec_values fast_mode_spec = {
119 .min_hold_start_ns = 600,
120 .min_low_ns = 1300,
121 .min_high_ns = 600,
122 .min_setup_start_ns = 600,
123 .max_data_hold_ns = 900,
124 .min_data_setup_ns = 100,
125 .min_setup_stop_ns = 600,
126 .min_hold_buffer_ns = 1300,
127};
128
129static const struct i2c_spec_values fast_mode_plus_spec = {
130 .min_hold_start_ns = 260,
131 .min_low_ns = 500,
132 .min_high_ns = 260,
133 .min_setup_start_ns = 260,
134 .max_data_hold_ns = 400,
135 .min_data_setup_ns = 50,
136 .min_setup_stop_ns = 260,
137 .min_hold_buffer_ns = 500,
138};
139
140/**
141 * struct rk3x_i2c_calced_timings:
142 * @div_low: Divider output for low
143 * @div_high: Divider output for high
144 * @tuning: Used to adjust setup/hold data time,
145 * setup/hold start time and setup stop time for
146 * v1's calc_timings, the tuning should all be 0
147 * for old hardware anyone using v0's calc_timings.
148 */
149struct rk3x_i2c_calced_timings {
150 unsigned long div_low;
151 unsigned long div_high;
152 unsigned int tuning;
153};
154
78enum rk3x_i2c_state { 155enum rk3x_i2c_state {
79 STATE_IDLE, 156 STATE_IDLE,
80 STATE_START, 157 STATE_START,
@@ -85,11 +162,35 @@ enum rk3x_i2c_state {
85 162
86/** 163/**
87 * @grf_offset: offset inside the grf regmap for setting the i2c type 164 * @grf_offset: offset inside the grf regmap for setting the i2c type
165 * @calc_timings: Callback function for i2c timing information calculated
88 */ 166 */
89struct rk3x_i2c_soc_data { 167struct rk3x_i2c_soc_data {
90 int grf_offset; 168 int grf_offset;
169 int (*calc_timings)(unsigned long, struct i2c_timings *,
170 struct rk3x_i2c_calced_timings *);
91}; 171};
92 172
173/**
174 * struct rk3x_i2c - private data of the controller
175 * @adap: corresponding I2C adapter
176 * @dev: device for this controller
177 * @soc_data: related soc data struct
178 * @regs: virtual memory area
179 * @clk: function clk for rk3399 or function & Bus clks for others
180 * @pclk: Bus clk for rk3399
181 * @clk_rate_nb: i2c clk rate change notify
182 * @t: I2C known timing information
183 * @lock: spinlock for the i2c bus
184 * @wait: the waitqueue to wait for i2c transfer
185 * @busy: the condition for the event to wait for
186 * @msg: current i2c message
187 * @addr: addr of i2c slave device
188 * @mode: mode of i2c transfer
189 * @is_last_msg: flag determines whether it is the last msg in this transfer
190 * @state: state of i2c transfer
191 * @processed: byte length which has been send or received
192 * @error: error code for i2c transfer
193 */
93struct rk3x_i2c { 194struct rk3x_i2c {
94 struct i2c_adapter adap; 195 struct i2c_adapter adap;
95 struct device *dev; 196 struct device *dev;
@@ -98,6 +199,7 @@ struct rk3x_i2c {
98 /* Hardware resources */ 199 /* Hardware resources */
99 void __iomem *regs; 200 void __iomem *regs;
100 struct clk *clk; 201 struct clk *clk;
202 struct clk *pclk;
101 struct notifier_block clk_rate_nb; 203 struct notifier_block clk_rate_nb;
102 204
103 /* Settings */ 205 /* Settings */
@@ -116,7 +218,7 @@ struct rk3x_i2c {
116 218
117 /* I2C state machine */ 219 /* I2C state machine */
118 enum rk3x_i2c_state state; 220 enum rk3x_i2c_state state;
119 unsigned int processed; /* sent/received bytes */ 221 unsigned int processed;
120 int error; 222 int error;
121}; 223};
122 224
@@ -142,13 +244,12 @@ static inline void rk3x_i2c_clean_ipd(struct rk3x_i2c *i2c)
142 */ 244 */
143static void rk3x_i2c_start(struct rk3x_i2c *i2c) 245static void rk3x_i2c_start(struct rk3x_i2c *i2c)
144{ 246{
145 u32 val; 247 u32 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK;
146 248
147 rk3x_i2c_clean_ipd(i2c);
148 i2c_writel(i2c, REG_INT_START, REG_IEN); 249 i2c_writel(i2c, REG_INT_START, REG_IEN);
149 250
150 /* enable adapter with correct mode, send START condition */ 251 /* enable adapter with correct mode, send START condition */
151 val = REG_CON_EN | REG_CON_MOD(i2c->mode) | REG_CON_START; 252 val |= REG_CON_EN | REG_CON_MOD(i2c->mode) | REG_CON_START;
152 253
153 /* if we want to react to NACK, set ACTACK bit */ 254 /* if we want to react to NACK, set ACTACK bit */
154 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) 255 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK))
@@ -189,7 +290,8 @@ static void rk3x_i2c_stop(struct rk3x_i2c *i2c, int error)
189 * get the intended effect by resetting its internal state 290 * get the intended effect by resetting its internal state
190 * and issuing an ordinary START. 291 * and issuing an ordinary START.
191 */ 292 */
192 i2c_writel(i2c, 0, REG_CON); 293 ctrl = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK;
294 i2c_writel(i2c, ctrl, REG_CON);
193 295
194 /* signal that we are finished with the current msg */ 296 /* signal that we are finished with the current msg */
195 wake_up(&i2c->wait); 297 wake_up(&i2c->wait);
@@ -431,26 +533,37 @@ out:
431} 533}
432 534
433/** 535/**
536 * Get timing values of I2C specification
537 *
538 * @speed: Desired SCL frequency
539 *
540 * Returns: Matched i2c spec values.
541 */
542static const struct i2c_spec_values *rk3x_i2c_get_spec(unsigned int speed)
543{
544 if (speed <= 100000)
545 return &standard_mode_spec;
546 else if (speed <= 400000)
547 return &fast_mode_spec;
548 else
549 return &fast_mode_plus_spec;
550}
551
552/**
434 * Calculate divider values for desired SCL frequency 553 * Calculate divider values for desired SCL frequency
435 * 554 *
436 * @clk_rate: I2C input clock rate 555 * @clk_rate: I2C input clock rate
437 * @t: Known I2C timing information. 556 * @t: Known I2C timing information
438 * @div_low: Divider output for low 557 * @t_calc: Caculated rk3x private timings that would be written into regs
439 * @div_high: Divider output for high
440 * 558 *
441 * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case 559 * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case
442 * a best-effort divider value is returned in divs. If the target rate is 560 * a best-effort divider value is returned in divs. If the target rate is
443 * too high, we silently use the highest possible rate. 561 * too high, we silently use the highest possible rate.
444 */ 562 */
445static int rk3x_i2c_calc_divs(unsigned long clk_rate, 563static int rk3x_i2c_v0_calc_timings(unsigned long clk_rate,
446 struct i2c_timings *t, 564 struct i2c_timings *t,
447 unsigned long *div_low, 565 struct rk3x_i2c_calced_timings *t_calc)
448 unsigned long *div_high)
449{ 566{
450 unsigned long spec_min_low_ns, spec_min_high_ns;
451 unsigned long spec_setup_start, spec_max_data_hold_ns;
452 unsigned long data_hold_buffer_ns;
453
454 unsigned long min_low_ns, min_high_ns; 567 unsigned long min_low_ns, min_high_ns;
455 unsigned long max_low_ns, min_total_ns; 568 unsigned long max_low_ns, min_total_ns;
456 569
@@ -462,6 +575,8 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate,
462 unsigned long min_div_for_hold, min_total_div; 575 unsigned long min_div_for_hold, min_total_div;
463 unsigned long extra_div, extra_low_div, ideal_low_div; 576 unsigned long extra_div, extra_low_div, ideal_low_div;
464 577
578 unsigned long data_hold_buffer_ns = 50;
579 const struct i2c_spec_values *spec;
465 int ret = 0; 580 int ret = 0;
466 581
467 /* Only support standard-mode and fast-mode */ 582 /* Only support standard-mode and fast-mode */
@@ -484,22 +599,8 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate,
484 * This is because the i2c host on Rockchip holds the data line 599 * This is because the i2c host on Rockchip holds the data line
485 * for half the low time. 600 * for half the low time.
486 */ 601 */
487 if (t->bus_freq_hz <= 100000) { 602 spec = rk3x_i2c_get_spec(t->bus_freq_hz);
488 /* Standard-mode */ 603 min_high_ns = t->scl_rise_ns + spec->min_high_ns;
489 spec_min_low_ns = 4700;
490 spec_setup_start = 4700;
491 spec_min_high_ns = 4000;
492 spec_max_data_hold_ns = 3450;
493 data_hold_buffer_ns = 50;
494 } else {
495 /* Fast-mode */
496 spec_min_low_ns = 1300;
497 spec_setup_start = 600;
498 spec_min_high_ns = 600;
499 spec_max_data_hold_ns = 900;
500 data_hold_buffer_ns = 50;
501 }
502 min_high_ns = t->scl_rise_ns + spec_min_high_ns;
503 604
504 /* 605 /*
505 * Timings for repeated start: 606 * Timings for repeated start:
@@ -509,14 +610,14 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate,
509 * We need to account for those rules in picking our "high" time so 610 * We need to account for those rules in picking our "high" time so
510 * we meet tSU;STA and tHD;STA times. 611 * we meet tSU;STA and tHD;STA times.
511 */ 612 */
512 min_high_ns = max(min_high_ns, 613 min_high_ns = max(min_high_ns, DIV_ROUND_UP(
513 DIV_ROUND_UP((t->scl_rise_ns + spec_setup_start) * 1000, 875)); 614 (t->scl_rise_ns + spec->min_setup_start_ns) * 1000, 875));
514 min_high_ns = max(min_high_ns, 615 min_high_ns = max(min_high_ns, DIV_ROUND_UP(
515 DIV_ROUND_UP((t->scl_rise_ns + spec_setup_start + 616 (t->scl_rise_ns + spec->min_setup_start_ns + t->sda_fall_ns +
516 t->sda_fall_ns + spec_min_high_ns), 2)); 617 spec->min_high_ns), 2));
517 618
518 min_low_ns = t->scl_fall_ns + spec_min_low_ns; 619 min_low_ns = t->scl_fall_ns + spec->min_low_ns;
519 max_low_ns = spec_max_data_hold_ns * 2 - data_hold_buffer_ns; 620 max_low_ns = spec->max_data_hold_ns * 2 - data_hold_buffer_ns;
520 min_total_ns = min_low_ns + min_high_ns; 621 min_total_ns = min_low_ns + min_high_ns;
521 622
522 /* Adjust to avoid overflow */ 623 /* Adjust to avoid overflow */
@@ -552,8 +653,8 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate,
552 * Time needed to meet hold requirements is important. 653 * Time needed to meet hold requirements is important.
553 * Just use that. 654 * Just use that.
554 */ 655 */
555 *div_low = min_low_div; 656 t_calc->div_low = min_low_div;
556 *div_high = min_high_div; 657 t_calc->div_high = min_high_div;
557 } else { 658 } else {
558 /* 659 /*
559 * We've got to distribute some time among the low and high 660 * We've got to distribute some time among the low and high
@@ -582,25 +683,186 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate,
582 683
583 /* Give low the "ideal" and give high whatever extra is left */ 684 /* Give low the "ideal" and give high whatever extra is left */
584 extra_low_div = ideal_low_div - min_low_div; 685 extra_low_div = ideal_low_div - min_low_div;
585 *div_low = ideal_low_div; 686 t_calc->div_low = ideal_low_div;
586 *div_high = min_high_div + (extra_div - extra_low_div); 687 t_calc->div_high = min_high_div + (extra_div - extra_low_div);
587 } 688 }
588 689
589 /* 690 /*
590 * Adjust to the fact that the hardware has an implicit "+1". 691 * Adjust to the fact that the hardware has an implicit "+1".
591 * NOTE: Above calculations always produce div_low > 0 and div_high > 0. 692 * NOTE: Above calculations always produce div_low > 0 and div_high > 0.
592 */ 693 */
593 *div_low = *div_low - 1; 694 t_calc->div_low--;
594 *div_high = *div_high - 1; 695 t_calc->div_high--;
696
697 /* Maximum divider supported by hw is 0xffff */
698 if (t_calc->div_low > 0xffff) {
699 t_calc->div_low = 0xffff;
700 ret = -EINVAL;
701 }
702
703 if (t_calc->div_high > 0xffff) {
704 t_calc->div_high = 0xffff;
705 ret = -EINVAL;
706 }
707
708 return ret;
709}
710
711/**
712 * Calculate timing values for desired SCL frequency
713 *
714 * @clk_rate: I2C input clock rate
715 * @t: Known I2C timing information
716 * @t_calc: Caculated rk3x private timings that would be written into regs
717 *
718 * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case
719 * a best-effort divider value is returned in divs. If the target rate is
720 * too high, we silently use the highest possible rate.
721 * The following formulas are v1's method to calculate timings.
722 *
723 * l = divl + 1;
724 * h = divh + 1;
725 * s = sda_update_config + 1;
726 * u = start_setup_config + 1;
727 * p = stop_setup_config + 1;
728 * T = Tclk_i2c;
729 *
730 * tHigh = 8 * h * T;
731 * tLow = 8 * l * T;
732 *
733 * tHD;sda = (l * s + 1) * T;
734 * tSU;sda = [(8 - s) * l + 1] * T;
735 * tI2C = 8 * (l + h) * T;
736 *
737 * tSU;sta = (8h * u + 1) * T;
738 * tHD;sta = [8h * (u + 1) - 1] * T;
739 * tSU;sto = (8h * p + 1) * T;
740 */
741static int rk3x_i2c_v1_calc_timings(unsigned long clk_rate,
742 struct i2c_timings *t,
743 struct rk3x_i2c_calced_timings *t_calc)
744{
745 unsigned long min_low_ns, min_high_ns, min_total_ns;
746 unsigned long min_setup_start_ns, min_setup_data_ns;
747 unsigned long min_setup_stop_ns, max_hold_data_ns;
748
749 unsigned long clk_rate_khz, scl_rate_khz;
750
751 unsigned long min_low_div, min_high_div;
752
753 unsigned long min_div_for_hold, min_total_div;
754 unsigned long extra_div, extra_low_div;
755 unsigned long sda_update_cfg, stp_sta_cfg, stp_sto_cfg;
756
757 const struct i2c_spec_values *spec;
758 int ret = 0;
759
760 /* Support standard-mode, fast-mode and fast-mode plus */
761 if (WARN_ON(t->bus_freq_hz > 1000000))
762 t->bus_freq_hz = 1000000;
763
764 /* prevent scl_rate_khz from becoming 0 */
765 if (WARN_ON(t->bus_freq_hz < 1000))
766 t->bus_freq_hz = 1000;
767
768 /*
769 * min_low_ns: The minimum number of ns we need to hold low to
770 * meet I2C specification, should include fall time.
771 * min_high_ns: The minimum number of ns we need to hold high to
772 * meet I2C specification, should include rise time.
773 */
774 spec = rk3x_i2c_get_spec(t->bus_freq_hz);
775
776 /* calculate min-divh and min-divl */
777 clk_rate_khz = DIV_ROUND_UP(clk_rate, 1000);
778 scl_rate_khz = t->bus_freq_hz / 1000;
779 min_total_div = DIV_ROUND_UP(clk_rate_khz, scl_rate_khz * 8);
780
781 min_high_ns = t->scl_rise_ns + spec->min_high_ns;
782 min_high_div = DIV_ROUND_UP(clk_rate_khz * min_high_ns, 8 * 1000000);
783
784 min_low_ns = t->scl_fall_ns + spec->min_low_ns;
785 min_low_div = DIV_ROUND_UP(clk_rate_khz * min_low_ns, 8 * 1000000);
786
787 /*
788 * Final divh and divl must be greater than 0, otherwise the
789 * hardware would not output the i2c clk.
790 */
791 min_high_div = (min_high_div < 1) ? 2 : min_high_div;
792 min_low_div = (min_low_div < 1) ? 2 : min_low_div;
793
794 /* These are the min dividers needed for min hold times. */
795 min_div_for_hold = (min_low_div + min_high_div);
796 min_total_ns = min_low_ns + min_high_ns;
797
798 /*
799 * This is the maximum divider so we don't go over the maximum.
800 * We don't round up here (we round down) since this is a maximum.
801 */
802 if (min_div_for_hold >= min_total_div) {
803 /*
804 * Time needed to meet hold requirements is important.
805 * Just use that.
806 */
807 t_calc->div_low = min_low_div;
808 t_calc->div_high = min_high_div;
809 } else {
810 /*
811 * We've got to distribute some time among the low and high
812 * so we don't run too fast.
813 * We'll try to split things up by the scale of min_low_div and
814 * min_high_div, biasing slightly towards having a higher div
815 * for low (spend more time low).
816 */
817 extra_div = min_total_div - min_div_for_hold;
818 extra_low_div = DIV_ROUND_UP(min_low_div * extra_div,
819 min_div_for_hold);
820
821 t_calc->div_low = min_low_div + extra_low_div;
822 t_calc->div_high = min_high_div + (extra_div - extra_low_div);
823 }
824
825 /*
826 * calculate sda data hold count by the rules, data_upd_st:3
827 * is a appropriate value to reduce calculated times.
828 */
829 for (sda_update_cfg = 3; sda_update_cfg > 0; sda_update_cfg--) {
830 max_hold_data_ns = DIV_ROUND_UP((sda_update_cfg
831 * (t_calc->div_low) + 1)
832 * 1000000, clk_rate_khz);
833 min_setup_data_ns = DIV_ROUND_UP(((8 - sda_update_cfg)
834 * (t_calc->div_low) + 1)
835 * 1000000, clk_rate_khz);
836 if ((max_hold_data_ns < spec->max_data_hold_ns) &&
837 (min_setup_data_ns > spec->min_data_setup_ns))
838 break;
839 }
840
841 /* calculate setup start config */
842 min_setup_start_ns = t->scl_rise_ns + spec->min_setup_start_ns;
843 stp_sta_cfg = DIV_ROUND_UP(clk_rate_khz * min_setup_start_ns
844 - 1000000, 8 * 1000000 * (t_calc->div_high));
845
846 /* calculate setup stop config */
847 min_setup_stop_ns = t->scl_rise_ns + spec->min_setup_stop_ns;
848 stp_sto_cfg = DIV_ROUND_UP(clk_rate_khz * min_setup_stop_ns
849 - 1000000, 8 * 1000000 * (t_calc->div_high));
850
851 t_calc->tuning = REG_CON_SDA_CFG(--sda_update_cfg) |
852 REG_CON_STA_CFG(--stp_sta_cfg) |
853 REG_CON_STO_CFG(--stp_sto_cfg);
854
855 t_calc->div_low--;
856 t_calc->div_high--;
595 857
596 /* Maximum divider supported by hw is 0xffff */ 858 /* Maximum divider supported by hw is 0xffff */
597 if (*div_low > 0xffff) { 859 if (t_calc->div_low > 0xffff) {
598 *div_low = 0xffff; 860 t_calc->div_low = 0xffff;
599 ret = -EINVAL; 861 ret = -EINVAL;
600 } 862 }
601 863
602 if (*div_high > 0xffff) { 864 if (t_calc->div_high > 0xffff) {
603 *div_high = 0xffff; 865 t_calc->div_high = 0xffff;
604 ret = -EINVAL; 866 ret = -EINVAL;
605 } 867 }
606 868
@@ -610,19 +872,31 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate,
610static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate) 872static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate)
611{ 873{
612 struct i2c_timings *t = &i2c->t; 874 struct i2c_timings *t = &i2c->t;
613 unsigned long div_low, div_high; 875 struct rk3x_i2c_calced_timings calc;
614 u64 t_low_ns, t_high_ns; 876 u64 t_low_ns, t_high_ns;
877 unsigned long flags;
878 u32 val;
615 int ret; 879 int ret;
616 880
617 ret = rk3x_i2c_calc_divs(clk_rate, t, &div_low, &div_high); 881 ret = i2c->soc_data->calc_timings(clk_rate, t, &calc);
618 WARN_ONCE(ret != 0, "Could not reach SCL freq %u", t->bus_freq_hz); 882 WARN_ONCE(ret != 0, "Could not reach SCL freq %u", t->bus_freq_hz);
619 883
620 clk_enable(i2c->clk); 884 clk_enable(i2c->pclk);
621 i2c_writel(i2c, (div_high << 16) | (div_low & 0xffff), REG_CLKDIV); 885
622 clk_disable(i2c->clk); 886 spin_lock_irqsave(&i2c->lock, flags);
887 val = i2c_readl(i2c, REG_CON);
888 val &= ~REG_CON_TUNING_MASK;
889 val |= calc.tuning;
890 i2c_writel(i2c, val, REG_CON);
891 i2c_writel(i2c, (calc.div_high << 16) | (calc.div_low & 0xffff),
892 REG_CLKDIV);
893 spin_unlock_irqrestore(&i2c->lock, flags);
894
895 clk_disable(i2c->pclk);
623 896
624 t_low_ns = div_u64(((u64)div_low + 1) * 8 * 1000000000, clk_rate); 897 t_low_ns = div_u64(((u64)calc.div_low + 1) * 8 * 1000000000, clk_rate);
625 t_high_ns = div_u64(((u64)div_high + 1) * 8 * 1000000000, clk_rate); 898 t_high_ns = div_u64(((u64)calc.div_high + 1) * 8 * 1000000000,
899 clk_rate);
626 dev_dbg(i2c->dev, 900 dev_dbg(i2c->dev,
627 "CLK %lukhz, Req %uns, Act low %lluns high %lluns\n", 901 "CLK %lukhz, Req %uns, Act low %lluns high %lluns\n",
628 clk_rate / 1000, 902 clk_rate / 1000,
@@ -652,12 +926,17 @@ static int rk3x_i2c_clk_notifier_cb(struct notifier_block *nb, unsigned long
652{ 926{
653 struct clk_notifier_data *ndata = data; 927 struct clk_notifier_data *ndata = data;
654 struct rk3x_i2c *i2c = container_of(nb, struct rk3x_i2c, clk_rate_nb); 928 struct rk3x_i2c *i2c = container_of(nb, struct rk3x_i2c, clk_rate_nb);
655 unsigned long div_low, div_high; 929 struct rk3x_i2c_calced_timings calc;
656 930
657 switch (event) { 931 switch (event) {
658 case PRE_RATE_CHANGE: 932 case PRE_RATE_CHANGE:
659 if (rk3x_i2c_calc_divs(ndata->new_rate, &i2c->t, 933 /*
660 &div_low, &div_high) != 0) 934 * Try the calculation (but don't store the result) ahead of
935 * time to see if we need to block the clock change. Timings
936 * shouldn't actually take effect until rk3x_i2c_adapt_div().
937 */
938 if (i2c->soc_data->calc_timings(ndata->new_rate, &i2c->t,
939 &calc) != 0)
661 return NOTIFY_STOP; 940 return NOTIFY_STOP;
662 941
663 /* scale up */ 942 /* scale up */
@@ -767,12 +1046,14 @@ static int rk3x_i2c_xfer(struct i2c_adapter *adap,
767{ 1046{
768 struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data; 1047 struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data;
769 unsigned long timeout, flags; 1048 unsigned long timeout, flags;
1049 u32 val;
770 int ret = 0; 1050 int ret = 0;
771 int i; 1051 int i;
772 1052
773 spin_lock_irqsave(&i2c->lock, flags); 1053 spin_lock_irqsave(&i2c->lock, flags);
774 1054
775 clk_enable(i2c->clk); 1055 clk_enable(i2c->clk);
1056 clk_enable(i2c->pclk);
776 1057
777 i2c->is_last_msg = false; 1058 i2c->is_last_msg = false;
778 1059
@@ -806,7 +1087,9 @@ static int rk3x_i2c_xfer(struct i2c_adapter *adap,
806 1087
807 /* Force a STOP condition without interrupt */ 1088 /* Force a STOP condition without interrupt */
808 i2c_writel(i2c, 0, REG_IEN); 1089 i2c_writel(i2c, 0, REG_IEN);
809 i2c_writel(i2c, REG_CON_EN | REG_CON_STOP, REG_CON); 1090 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK;
1091 val |= REG_CON_EN | REG_CON_STOP;
1092 i2c_writel(i2c, val, REG_CON);
810 1093
811 i2c->state = STATE_IDLE; 1094 i2c->state = STATE_IDLE;
812 1095
@@ -820,7 +1103,9 @@ static int rk3x_i2c_xfer(struct i2c_adapter *adap,
820 } 1103 }
821 } 1104 }
822 1105
1106 clk_disable(i2c->pclk);
823 clk_disable(i2c->clk); 1107 clk_disable(i2c->clk);
1108
824 spin_unlock_irqrestore(&i2c->lock, flags); 1109 spin_unlock_irqrestore(&i2c->lock, flags);
825 1110
826 return ret < 0 ? ret : num; 1111 return ret < 0 ? ret : num;
@@ -836,17 +1121,52 @@ static const struct i2c_algorithm rk3x_i2c_algorithm = {
836 .functionality = rk3x_i2c_func, 1121 .functionality = rk3x_i2c_func,
837}; 1122};
838 1123
839static struct rk3x_i2c_soc_data soc_data[3] = { 1124static const struct rk3x_i2c_soc_data rk3066_soc_data = {
840 { .grf_offset = 0x154 }, /* rk3066 */ 1125 .grf_offset = 0x154,
841 { .grf_offset = 0x0a4 }, /* rk3188 */ 1126 .calc_timings = rk3x_i2c_v0_calc_timings,
842 { .grf_offset = -1 }, /* no I2C switching needed */ 1127};
1128
1129static const struct rk3x_i2c_soc_data rk3188_soc_data = {
1130 .grf_offset = 0x0a4,
1131 .calc_timings = rk3x_i2c_v0_calc_timings,
1132};
1133
1134static const struct rk3x_i2c_soc_data rk3228_soc_data = {
1135 .grf_offset = -1,
1136 .calc_timings = rk3x_i2c_v0_calc_timings,
1137};
1138
1139static const struct rk3x_i2c_soc_data rk3288_soc_data = {
1140 .grf_offset = -1,
1141 .calc_timings = rk3x_i2c_v0_calc_timings,
1142};
1143
1144static const struct rk3x_i2c_soc_data rk3399_soc_data = {
1145 .grf_offset = -1,
1146 .calc_timings = rk3x_i2c_v1_calc_timings,
843}; 1147};
844 1148
845static const struct of_device_id rk3x_i2c_match[] = { 1149static const struct of_device_id rk3x_i2c_match[] = {
846 { .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] }, 1150 {
847 { .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] }, 1151 .compatible = "rockchip,rk3066-i2c",
848 { .compatible = "rockchip,rk3228-i2c", .data = (void *)&soc_data[2] }, 1152 .data = (void *)&rk3066_soc_data
849 { .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] }, 1153 },
1154 {
1155 .compatible = "rockchip,rk3188-i2c",
1156 .data = (void *)&rk3188_soc_data
1157 },
1158 {
1159 .compatible = "rockchip,rk3228-i2c",
1160 .data = (void *)&rk3228_soc_data
1161 },
1162 {
1163 .compatible = "rockchip,rk3288-i2c",
1164 .data = (void *)&rk3288_soc_data
1165 },
1166 {
1167 .compatible = "rockchip,rk3399-i2c",
1168 .data = (void *)&rk3399_soc_data
1169 },
850 {}, 1170 {},
851}; 1171};
852MODULE_DEVICE_TABLE(of, rk3x_i2c_match); 1172MODULE_DEVICE_TABLE(of, rk3x_i2c_match);
@@ -886,12 +1206,6 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
886 spin_lock_init(&i2c->lock); 1206 spin_lock_init(&i2c->lock);
887 init_waitqueue_head(&i2c->wait); 1207 init_waitqueue_head(&i2c->wait);
888 1208
889 i2c->clk = devm_clk_get(&pdev->dev, NULL);
890 if (IS_ERR(i2c->clk)) {
891 dev_err(&pdev->dev, "cannot get clock\n");
892 return PTR_ERR(i2c->clk);
893 }
894
895 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1209 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
896 i2c->regs = devm_ioremap_resource(&pdev->dev, mem); 1210 i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
897 if (IS_ERR(i2c->regs)) 1211 if (IS_ERR(i2c->regs))
@@ -945,17 +1259,44 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
945 1259
946 platform_set_drvdata(pdev, i2c); 1260 platform_set_drvdata(pdev, i2c);
947 1261
1262 if (i2c->soc_data->calc_timings == rk3x_i2c_v0_calc_timings) {
1263 /* Only one clock to use for bus clock and peripheral clock */
1264 i2c->clk = devm_clk_get(&pdev->dev, NULL);
1265 i2c->pclk = i2c->clk;
1266 } else {
1267 i2c->clk = devm_clk_get(&pdev->dev, "i2c");
1268 i2c->pclk = devm_clk_get(&pdev->dev, "pclk");
1269 }
1270
1271 if (IS_ERR(i2c->clk)) {
1272 ret = PTR_ERR(i2c->clk);
1273 if (ret != -EPROBE_DEFER)
1274 dev_err(&pdev->dev, "Can't get bus clk: %d\n", ret);
1275 return ret;
1276 }
1277 if (IS_ERR(i2c->pclk)) {
1278 ret = PTR_ERR(i2c->pclk);
1279 if (ret != -EPROBE_DEFER)
1280 dev_err(&pdev->dev, "Can't get periph clk: %d\n", ret);
1281 return ret;
1282 }
1283
948 ret = clk_prepare(i2c->clk); 1284 ret = clk_prepare(i2c->clk);
949 if (ret < 0) { 1285 if (ret < 0) {
950 dev_err(&pdev->dev, "Could not prepare clock\n"); 1286 dev_err(&pdev->dev, "Can't prepare bus clk: %d\n", ret);
951 return ret; 1287 return ret;
952 } 1288 }
1289 ret = clk_prepare(i2c->pclk);
1290 if (ret < 0) {
1291 dev_err(&pdev->dev, "Can't prepare periph clock: %d\n", ret);
1292 goto err_clk;
1293 }
953 1294
954 i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb; 1295 i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb;
955 ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb); 1296 ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb);
956 if (ret != 0) { 1297 if (ret != 0) {
957 dev_err(&pdev->dev, "Unable to register clock notifier\n"); 1298 dev_err(&pdev->dev, "Unable to register clock notifier\n");
958 goto err_clk; 1299 goto err_pclk;
959 } 1300 }
960 1301
961 clk_rate = clk_get_rate(i2c->clk); 1302 clk_rate = clk_get_rate(i2c->clk);
@@ -973,6 +1314,8 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
973 1314
974err_clk_notifier: 1315err_clk_notifier:
975 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); 1316 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb);
1317err_pclk:
1318 clk_unprepare(i2c->pclk);
976err_clk: 1319err_clk:
977 clk_unprepare(i2c->clk); 1320 clk_unprepare(i2c->clk);
978 return ret; 1321 return ret;
@@ -985,6 +1328,7 @@ static int rk3x_i2c_remove(struct platform_device *pdev)
985 i2c_del_adapter(&i2c->adap); 1328 i2c_del_adapter(&i2c->adap);
986 1329
987 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); 1330 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb);
1331 clk_unprepare(i2c->pclk);
988 clk_unprepare(i2c->clk); 1332 clk_unprepare(i2c->clk);
989 1333
990 return 0; 1334 return 0;
diff --git a/drivers/i2c/busses/i2c-robotfuzz-osif.c b/drivers/i2c/busses/i2c-robotfuzz-osif.c
index ced9c6a308d1..89d8b41b6668 100644
--- a/drivers/i2c/busses/i2c-robotfuzz-osif.c
+++ b/drivers/i2c/busses/i2c-robotfuzz-osif.c
@@ -125,7 +125,7 @@ static struct i2c_algorithm osif_algorithm = {
125#define USB_OSIF_VENDOR_ID 0x1964 125#define USB_OSIF_VENDOR_ID 0x1964
126#define USB_OSIF_PRODUCT_ID 0x0001 126#define USB_OSIF_PRODUCT_ID 0x0001
127 127
128static struct usb_device_id osif_table[] = { 128static const struct usb_device_id osif_table[] = {
129 { USB_DEVICE(USB_OSIF_VENDOR_ID, USB_OSIF_PRODUCT_ID) }, 129 { USB_DEVICE(USB_OSIF_VENDOR_ID, USB_OSIF_PRODUCT_ID) },
130 { } 130 { }
131}; 131};
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
index 240637f01d11..c73d2d22009e 100644
--- a/drivers/i2c/busses/i2c-versatile.c
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -70,28 +70,14 @@ static int i2c_versatile_probe(struct platform_device *dev)
70 struct resource *r; 70 struct resource *r;
71 int ret; 71 int ret;
72 72
73 i2c = devm_kzalloc(&dev->dev, sizeof(struct i2c_versatile), GFP_KERNEL);
74 if (!i2c)
75 return -ENOMEM;
76
73 r = platform_get_resource(dev, IORESOURCE_MEM, 0); 77 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
74 if (!r) { 78 i2c->base = devm_ioremap_resource(&dev->dev, r);
75 ret = -EINVAL; 79 if (IS_ERR(i2c->base))
76 goto err_out; 80 return PTR_ERR(i2c->base);
77 }
78
79 if (!request_mem_region(r->start, resource_size(r), "versatile-i2c")) {
80 ret = -EBUSY;
81 goto err_out;
82 }
83
84 i2c = kzalloc(sizeof(struct i2c_versatile), GFP_KERNEL);
85 if (!i2c) {
86 ret = -ENOMEM;
87 goto err_release;
88 }
89
90 i2c->base = ioremap(r->start, resource_size(r));
91 if (!i2c->base) {
92 ret = -ENOMEM;
93 goto err_free;
94 }
95 81
96 writel(SCL | SDA, i2c->base + I2C_CONTROLS); 82 writel(SCL | SDA, i2c->base + I2C_CONTROLS);
97 83
@@ -105,18 +91,12 @@ static int i2c_versatile_probe(struct platform_device *dev)
105 91
106 i2c->adap.nr = dev->id; 92 i2c->adap.nr = dev->id;
107 ret = i2c_bit_add_numbered_bus(&i2c->adap); 93 ret = i2c_bit_add_numbered_bus(&i2c->adap);
108 if (ret >= 0) { 94 if (ret < 0)
109 platform_set_drvdata(dev, i2c); 95 return ret;
110 return 0; 96
111 } 97 platform_set_drvdata(dev, i2c);
112 98
113 iounmap(i2c->base); 99 return 0;
114 err_free:
115 kfree(i2c);
116 err_release:
117 release_mem_region(r->start, resource_size(r));
118 err_out:
119 return ret;
120} 100}
121 101
122static int i2c_versatile_remove(struct platform_device *dev) 102static int i2c_versatile_remove(struct platform_device *dev)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
index c941418f06f5..55a7bef1b2e1 100644
--- a/drivers/i2c/busses/i2c-xlp9xx.c
+++ b/drivers/i2c/busses/i2c-xlp9xx.c
@@ -6,6 +6,7 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#include <linux/acpi.h>
9#include <linux/completion.h> 10#include <linux/completion.h>
10#include <linux/i2c.h> 11#include <linux/i2c.h>
11#include <linux/init.h> 12#include <linux/init.h>
@@ -341,11 +342,10 @@ static struct i2c_algorithm xlp9xx_i2c_algo = {
341static int xlp9xx_i2c_get_frequency(struct platform_device *pdev, 342static int xlp9xx_i2c_get_frequency(struct platform_device *pdev,
342 struct xlp9xx_i2c_dev *priv) 343 struct xlp9xx_i2c_dev *priv)
343{ 344{
344 struct device_node *np = pdev->dev.of_node;
345 u32 freq; 345 u32 freq;
346 int err; 346 int err;
347 347
348 err = of_property_read_u32(np, "clock-frequency", &freq); 348 err = device_property_read_u32(&pdev->dev, "clock-frequency", &freq);
349 if (err) { 349 if (err) {
350 freq = XLP9XX_I2C_DEFAULT_FREQ; 350 freq = XLP9XX_I2C_DEFAULT_FREQ;
351 dev_dbg(&pdev->dev, "using default frequency %u\n", freq); 351 dev_dbg(&pdev->dev, "using default frequency %u\n", freq);
@@ -429,12 +429,21 @@ static const struct of_device_id xlp9xx_i2c_of_match[] = {
429 { /* sentinel */ }, 429 { /* sentinel */ },
430}; 430};
431 431
432#ifdef CONFIG_ACPI
433static const struct acpi_device_id xlp9xx_i2c_acpi_ids[] = {
434 {"BRCM9007", 0},
435 {}
436};
437MODULE_DEVICE_TABLE(acpi, xlp9xx_i2c_acpi_ids);
438#endif
439
432static struct platform_driver xlp9xx_i2c_driver = { 440static struct platform_driver xlp9xx_i2c_driver = {
433 .probe = xlp9xx_i2c_probe, 441 .probe = xlp9xx_i2c_probe,
434 .remove = xlp9xx_i2c_remove, 442 .remove = xlp9xx_i2c_remove,
435 .driver = { 443 .driver = {
436 .name = "xlp9xx-i2c", 444 .name = "xlp9xx-i2c",
437 .of_match_table = xlp9xx_i2c_of_match, 445 .of_match_table = xlp9xx_i2c_of_match,
446 .acpi_match_table = ACPI_PTR(xlp9xx_i2c_acpi_ids),
438 }, 447 },
439}; 448};
440 449
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 74e5aeaf84f9..da3a02ef4a31 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -27,6 +27,8 @@
27 I2C slave support (c) 2014 by Wolfram Sang <wsa@sang-engineering.com> 27 I2C slave support (c) 2014 by Wolfram Sang <wsa@sang-engineering.com>
28 */ 28 */
29 29
30#define pr_fmt(fmt) "i2c-core: " fmt
31
30#include <dt-bindings/i2c/i2c.h> 32#include <dt-bindings/i2c/i2c.h>
31#include <asm/uaccess.h> 33#include <asm/uaccess.h>
32#include <linux/acpi.h> 34#include <linux/acpi.h>
@@ -493,7 +495,8 @@ acpi_i2c_space_handler(u32 function, acpi_physical_address command,
493 break; 495 break;
494 496
495 default: 497 default:
496 pr_info("protocol(0x%02x) is not supported.\n", accessor_type); 498 dev_warn(&adapter->dev, "protocol 0x%02x not supported for client 0x%02x\n",
499 accessor_type, client->addr);
497 ret = AE_BAD_PARAMETER; 500 ret = AE_BAD_PARAMETER;
498 goto err; 501 goto err;
499 } 502 }
@@ -759,6 +762,47 @@ int i2c_recover_bus(struct i2c_adapter *adap)
759} 762}
760EXPORT_SYMBOL_GPL(i2c_recover_bus); 763EXPORT_SYMBOL_GPL(i2c_recover_bus);
761 764
765static void i2c_init_recovery(struct i2c_adapter *adap)
766{
767 struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
768 char *err_str;
769
770 if (!bri)
771 return;
772
773 if (!bri->recover_bus) {
774 err_str = "no recover_bus() found";
775 goto err;
776 }
777
778 /* Generic GPIO recovery */
779 if (bri->recover_bus == i2c_generic_gpio_recovery) {
780 if (!gpio_is_valid(bri->scl_gpio)) {
781 err_str = "invalid SCL gpio";
782 goto err;
783 }
784
785 if (gpio_is_valid(bri->sda_gpio))
786 bri->get_sda = get_sda_gpio_value;
787 else
788 bri->get_sda = NULL;
789
790 bri->get_scl = get_scl_gpio_value;
791 bri->set_scl = set_scl_gpio_value;
792 } else if (bri->recover_bus == i2c_generic_scl_recovery) {
793 /* Generic SCL recovery */
794 if (!bri->set_scl || !bri->get_scl) {
795 err_str = "no {get|set}_scl() found";
796 goto err;
797 }
798 }
799
800 return;
801 err:
802 dev_err(&adap->dev, "Not using recovery: %s\n", err_str);
803 adap->bus_recovery_info = NULL;
804}
805
762static int i2c_device_probe(struct device *dev) 806static int i2c_device_probe(struct device *dev)
763{ 807{
764 struct i2c_client *client = i2c_verify_client(dev); 808 struct i2c_client *client = i2c_verify_client(dev);
@@ -1240,6 +1284,47 @@ struct i2c_client *i2c_new_dummy(struct i2c_adapter *adapter, u16 address)
1240} 1284}
1241EXPORT_SYMBOL_GPL(i2c_new_dummy); 1285EXPORT_SYMBOL_GPL(i2c_new_dummy);
1242 1286
1287/**
1288 * i2c_new_secondary_device - Helper to get the instantiated secondary address
1289 * and create the associated device
1290 * @client: Handle to the primary client
1291 * @name: Handle to specify which secondary address to get
1292 * @default_addr: Used as a fallback if no secondary address was specified
1293 * Context: can sleep
1294 *
1295 * I2C clients can be composed of multiple I2C slaves bound together in a single
1296 * component. The I2C client driver then binds to the master I2C slave and needs
1297 * to create I2C dummy clients to communicate with all the other slaves.
1298 *
1299 * This function creates and returns an I2C dummy client whose I2C address is
1300 * retrieved from the platform firmware based on the given slave name. If no
1301 * address is specified by the firmware default_addr is used.
1302 *
1303 * On DT-based platforms the address is retrieved from the "reg" property entry
1304 * cell whose "reg-names" value matches the slave name.
1305 *
1306 * This returns the new i2c client, which should be saved for later use with
1307 * i2c_unregister_device(); or NULL to indicate an error.
1308 */
1309struct i2c_client *i2c_new_secondary_device(struct i2c_client *client,
1310 const char *name,
1311 u16 default_addr)
1312{
1313 struct device_node *np = client->dev.of_node;
1314 u32 addr = default_addr;
1315 int i;
1316
1317 if (np) {
1318 i = of_property_match_string(np, "reg-names", name);
1319 if (i >= 0)
1320 of_property_read_u32_index(np, "reg", i, &addr);
1321 }
1322
1323 dev_dbg(&client->adapter->dev, "Address for %s : 0x%x\n", name, addr);
1324 return i2c_new_dummy(client->adapter, addr);
1325}
1326EXPORT_SYMBOL_GPL(i2c_new_secondary_device);
1327
1243/* ------------------------------------------------------------------------- */ 1328/* ------------------------------------------------------------------------- */
1244 1329
1245/* I2C bus adapters -- one roots each I2C or SMBUS segment */ 1330/* I2C bus adapters -- one roots each I2C or SMBUS segment */
@@ -1608,7 +1693,7 @@ static int __process_new_adapter(struct device_driver *d, void *data)
1608 1693
1609static int i2c_register_adapter(struct i2c_adapter *adap) 1694static int i2c_register_adapter(struct i2c_adapter *adap)
1610{ 1695{
1611 int res = 0; 1696 int res = -EINVAL;
1612 1697
1613 /* Can't register until after driver model init */ 1698 /* Can't register until after driver model init */
1614 if (WARN_ON(!is_registered)) { 1699 if (WARN_ON(!is_registered)) {
@@ -1617,15 +1702,12 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
1617 } 1702 }
1618 1703
1619 /* Sanity checks */ 1704 /* Sanity checks */
1620 if (unlikely(adap->name[0] == '\0')) { 1705 if (WARN(!adap->name[0], "i2c adapter has no name"))
1621 pr_err("i2c-core: Attempt to register an adapter with " 1706 goto out_list;
1622 "no name!\n"); 1707
1623 return -EINVAL; 1708 if (!adap->algo) {
1624 } 1709 pr_err("adapter '%s': no algo supplied!\n", adap->name);
1625 if (unlikely(!adap->algo)) { 1710 goto out_list;
1626 pr_err("i2c-core: Attempt to register adapter '%s' with "
1627 "no algo!\n", adap->name);
1628 return -EINVAL;
1629 } 1711 }
1630 1712
1631 if (!adap->lock_bus) { 1713 if (!adap->lock_bus) {
@@ -1647,8 +1729,10 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
1647 adap->dev.bus = &i2c_bus_type; 1729 adap->dev.bus = &i2c_bus_type;
1648 adap->dev.type = &i2c_adapter_type; 1730 adap->dev.type = &i2c_adapter_type;
1649 res = device_register(&adap->dev); 1731 res = device_register(&adap->dev);
1650 if (res) 1732 if (res) {
1733 pr_err("adapter '%s': can't register device (%d)\n", adap->name, res);
1651 goto out_list; 1734 goto out_list;
1735 }
1652 1736
1653 dev_dbg(&adap->dev, "adapter [%s] registered\n", adap->name); 1737 dev_dbg(&adap->dev, "adapter [%s] registered\n", adap->name);
1654 1738
@@ -1664,41 +1748,8 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
1664 "Failed to create compatibility class link\n"); 1748 "Failed to create compatibility class link\n");
1665#endif 1749#endif
1666 1750
1667 /* bus recovery specific initialization */ 1751 i2c_init_recovery(adap);
1668 if (adap->bus_recovery_info) {
1669 struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
1670
1671 if (!bri->recover_bus) {
1672 dev_err(&adap->dev, "No recover_bus() found, not using recovery\n");
1673 adap->bus_recovery_info = NULL;
1674 goto exit_recovery;
1675 }
1676
1677 /* Generic GPIO recovery */
1678 if (bri->recover_bus == i2c_generic_gpio_recovery) {
1679 if (!gpio_is_valid(bri->scl_gpio)) {
1680 dev_err(&adap->dev, "Invalid SCL gpio, not using recovery\n");
1681 adap->bus_recovery_info = NULL;
1682 goto exit_recovery;
1683 }
1684 1752
1685 if (gpio_is_valid(bri->sda_gpio))
1686 bri->get_sda = get_sda_gpio_value;
1687 else
1688 bri->get_sda = NULL;
1689
1690 bri->get_scl = get_scl_gpio_value;
1691 bri->set_scl = set_scl_gpio_value;
1692 } else if (bri->recover_bus == i2c_generic_scl_recovery) {
1693 /* Generic SCL recovery */
1694 if (!bri->set_scl || !bri->get_scl) {
1695 dev_err(&adap->dev, "No {get|set}_scl() found, not using recovery\n");
1696 adap->bus_recovery_info = NULL;
1697 }
1698 }
1699 }
1700
1701exit_recovery:
1702 /* create pre-declared device nodes */ 1753 /* create pre-declared device nodes */
1703 of_i2c_register_devices(adap); 1754 of_i2c_register_devices(adap);
1704 acpi_i2c_register_devices(adap); 1755 acpi_i2c_register_devices(adap);
@@ -1730,13 +1781,12 @@ out_list:
1730 */ 1781 */
1731static int __i2c_add_numbered_adapter(struct i2c_adapter *adap) 1782static int __i2c_add_numbered_adapter(struct i2c_adapter *adap)
1732{ 1783{
1733 int id; 1784 int id;
1734 1785
1735 mutex_lock(&core_lock); 1786 mutex_lock(&core_lock);
1736 id = idr_alloc(&i2c_adapter_idr, adap, adap->nr, adap->nr + 1, 1787 id = idr_alloc(&i2c_adapter_idr, adap, adap->nr, adap->nr + 1, GFP_KERNEL);
1737 GFP_KERNEL);
1738 mutex_unlock(&core_lock); 1788 mutex_unlock(&core_lock);
1739 if (id < 0) 1789 if (WARN(id < 0, "couldn't get idr"))
1740 return id == -ENOSPC ? -EBUSY : id; 1790 return id == -ENOSPC ? -EBUSY : id;
1741 1791
1742 return i2c_register_adapter(adap); 1792 return i2c_register_adapter(adap);
@@ -1773,7 +1823,7 @@ int i2c_add_adapter(struct i2c_adapter *adapter)
1773 id = idr_alloc(&i2c_adapter_idr, adapter, 1823 id = idr_alloc(&i2c_adapter_idr, adapter,
1774 __i2c_first_dynamic_bus_num, 0, GFP_KERNEL); 1824 __i2c_first_dynamic_bus_num, 0, GFP_KERNEL);
1775 mutex_unlock(&core_lock); 1825 mutex_unlock(&core_lock);
1776 if (id < 0) 1826 if (WARN(id < 0, "couldn't get idr"))
1777 return id; 1827 return id;
1778 1828
1779 adapter->nr = id; 1829 adapter->nr = id;
@@ -1871,8 +1921,7 @@ void i2c_del_adapter(struct i2c_adapter *adap)
1871 found = idr_find(&i2c_adapter_idr, adap->nr); 1921 found = idr_find(&i2c_adapter_idr, adap->nr);
1872 mutex_unlock(&core_lock); 1922 mutex_unlock(&core_lock);
1873 if (found != adap) { 1923 if (found != adap) {
1874 pr_debug("i2c-core: attempting to delete unregistered " 1924 pr_debug("attempting to delete unregistered adapter [%s]\n", adap->name);
1875 "adapter [%s]\n", adap->name);
1876 return; 1925 return;
1877 } 1926 }
1878 1927
@@ -2032,7 +2081,7 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver)
2032 if (res) 2081 if (res)
2033 return res; 2082 return res;
2034 2083
2035 pr_debug("i2c-core: driver [%s] registered\n", driver->driver.name); 2084 pr_debug("driver [%s] registered\n", driver->driver.name);
2036 2085
2037 INIT_LIST_HEAD(&driver->clients); 2086 INIT_LIST_HEAD(&driver->clients);
2038 /* Walk the adapters that are already present */ 2087 /* Walk the adapters that are already present */
@@ -2059,7 +2108,7 @@ void i2c_del_driver(struct i2c_driver *driver)
2059 i2c_for_each_dev(driver, __process_removed_driver); 2108 i2c_for_each_dev(driver, __process_removed_driver);
2060 2109
2061 driver_unregister(&driver->driver); 2110 driver_unregister(&driver->driver);
2062 pr_debug("i2c-core: driver [%s] unregistered\n", driver->driver.name); 2111 pr_debug("driver [%s] unregistered\n", driver->driver.name);
2063} 2112}
2064EXPORT_SYMBOL(i2c_del_driver); 2113EXPORT_SYMBOL(i2c_del_driver);
2065 2114
@@ -2150,8 +2199,8 @@ static int of_i2c_notify(struct notifier_block *nb, unsigned long action,
2150 put_device(&adap->dev); 2199 put_device(&adap->dev);
2151 2200
2152 if (IS_ERR(client)) { 2201 if (IS_ERR(client)) {
2153 pr_err("%s: failed to create for '%s'\n", 2202 dev_err(&adap->dev, "failed to create client for '%s'\n",
2154 __func__, rd->dn->full_name); 2203 rd->dn->full_name);
2155 return notifier_from_errno(PTR_ERR(client)); 2204 return notifier_from_errno(PTR_ERR(client));
2156 } 2205 }
2157 break; 2206 break;
@@ -2772,7 +2821,7 @@ static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg)
2772 cpec = i2c_smbus_msg_pec(cpec, msg); 2821 cpec = i2c_smbus_msg_pec(cpec, msg);
2773 2822
2774 if (rpec != cpec) { 2823 if (rpec != cpec) {
2775 pr_debug("i2c-core: Bad PEC 0x%02x vs. 0x%02x\n", 2824 pr_debug("Bad PEC 0x%02x vs. 0x%02x\n",
2776 rpec, cpec); 2825 rpec, cpec);
2777 return -EBADMSG; 2826 return -EBADMSG;
2778 } 2827 }
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 6ecfd76270f2..66f323fd3982 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -485,13 +485,8 @@ static int i2cdev_open(struct inode *inode, struct file *file)
485 unsigned int minor = iminor(inode); 485 unsigned int minor = iminor(inode);
486 struct i2c_client *client; 486 struct i2c_client *client;
487 struct i2c_adapter *adap; 487 struct i2c_adapter *adap;
488 struct i2c_dev *i2c_dev;
489
490 i2c_dev = i2c_dev_get_by_minor(minor);
491 if (!i2c_dev)
492 return -ENODEV;
493 488
494 adap = i2c_get_adapter(i2c_dev->adap->nr); 489 adap = i2c_get_adapter(minor);
495 if (!adap) 490 if (!adap)
496 return -ENODEV; 491 return -ENODEV;
497 492
diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c
index abb55d3e76f3..b0d2679c60d1 100644
--- a/drivers/i2c/i2c-smbus.c
+++ b/drivers/i2c/i2c-smbus.c
@@ -33,7 +33,8 @@ struct i2c_smbus_alert {
33 33
34struct alert_data { 34struct alert_data {
35 unsigned short addr; 35 unsigned short addr;
36 u8 flag:1; 36 enum i2c_alert_protocol type;
37 unsigned int data;
37}; 38};
38 39
39/* If this is the alerting device, notify its driver */ 40/* If this is the alerting device, notify its driver */
@@ -56,7 +57,7 @@ static int smbus_do_alert(struct device *dev, void *addrp)
56 if (client->dev.driver) { 57 if (client->dev.driver) {
57 driver = to_i2c_driver(client->dev.driver); 58 driver = to_i2c_driver(client->dev.driver);
58 if (driver->alert) 59 if (driver->alert)
59 driver->alert(client, data->flag); 60 driver->alert(client, data->type, data->data);
60 else 61 else
61 dev_warn(&client->dev, "no driver alert()!\n"); 62 dev_warn(&client->dev, "no driver alert()!\n");
62 } else 63 } else
@@ -96,8 +97,9 @@ static void smbus_alert(struct work_struct *work)
96 if (status < 0) 97 if (status < 0)
97 break; 98 break;
98 99
99 data.flag = status & 1; 100 data.data = status & 1;
100 data.addr = status >> 1; 101 data.addr = status >> 1;
102 data.type = I2C_PROTOCOL_SMBUS_ALERT;
101 103
102 if (data.addr == prev_addr) { 104 if (data.addr == prev_addr) {
103 dev_warn(&ara->dev, "Duplicate SMBALERT# from dev " 105 dev_warn(&ara->dev, "Duplicate SMBALERT# from dev "
@@ -105,7 +107,7 @@ static void smbus_alert(struct work_struct *work)
105 break; 107 break;
106 } 108 }
107 dev_dbg(&ara->dev, "SMBALERT# from dev 0x%02x, flag %d\n", 109 dev_dbg(&ara->dev, "SMBALERT# from dev 0x%02x, flag %d\n",
108 data.addr, data.flag); 110 data.addr, data.data);
109 111
110 /* Notify driver for the device which issued the alert */ 112 /* Notify driver for the device which issued the alert */
111 device_for_each_child(&ara->adapter->dev, &data, 113 device_for_each_child(&ara->adapter->dev, &data,
@@ -239,6 +241,108 @@ int i2c_handle_smbus_alert(struct i2c_client *ara)
239} 241}
240EXPORT_SYMBOL_GPL(i2c_handle_smbus_alert); 242EXPORT_SYMBOL_GPL(i2c_handle_smbus_alert);
241 243
244static void smbus_host_notify_work(struct work_struct *work)
245{
246 struct alert_data alert;
247 struct i2c_adapter *adapter;
248 unsigned long flags;
249 u16 payload;
250 u8 addr;
251 struct smbus_host_notify *data;
252
253 data = container_of(work, struct smbus_host_notify, work);
254
255 spin_lock_irqsave(&data->lock, flags);
256 payload = data->payload;
257 addr = data->addr;
258 adapter = data->adapter;
259
260 /* clear the pending bit and release the spinlock */
261 data->pending = false;
262 spin_unlock_irqrestore(&data->lock, flags);
263
264 if (!adapter || !addr)
265 return;
266
267 alert.type = I2C_PROTOCOL_SMBUS_HOST_NOTIFY;
268 alert.addr = addr;
269 alert.data = payload;
270
271 device_for_each_child(&adapter->dev, &alert, smbus_do_alert);
272}
273
274/**
275 * i2c_setup_smbus_host_notify - Allocate a new smbus_host_notify for the given
276 * I2C adapter.
277 * @adapter: the adapter we want to associate a Host Notify function
278 *
279 * Returns a struct smbus_host_notify pointer on success, and NULL on failure.
280 * The resulting smbus_host_notify must not be freed afterwards, it is a
281 * managed resource already.
282 */
283struct smbus_host_notify *i2c_setup_smbus_host_notify(struct i2c_adapter *adap)
284{
285 struct smbus_host_notify *host_notify;
286
287 host_notify = devm_kzalloc(&adap->dev, sizeof(struct smbus_host_notify),
288 GFP_KERNEL);
289 if (!host_notify)
290 return NULL;
291
292 host_notify->adapter = adap;
293
294 spin_lock_init(&host_notify->lock);
295 INIT_WORK(&host_notify->work, smbus_host_notify_work);
296
297 return host_notify;
298}
299EXPORT_SYMBOL_GPL(i2c_setup_smbus_host_notify);
300
301/**
302 * i2c_handle_smbus_host_notify - Forward a Host Notify event to the correct
303 * I2C client.
304 * @host_notify: the struct host_notify attached to the relevant adapter
305 * @addr: the I2C address of the notifying device
306 * @data: the payload of the notification
307 * Context: can't sleep
308 *
309 * Helper function to be called from an I2C bus driver's interrupt
310 * handler. It will schedule the Host Notify work, in turn calling the
311 * corresponding I2C device driver's alert function.
312 *
313 * host_notify should be a valid pointer previously returned by
314 * i2c_setup_smbus_host_notify().
315 */
316int i2c_handle_smbus_host_notify(struct smbus_host_notify *host_notify,
317 unsigned short addr, unsigned int data)
318{
319 unsigned long flags;
320 struct i2c_adapter *adapter;
321
322 if (!host_notify || !host_notify->adapter)
323 return -EINVAL;
324
325 adapter = host_notify->adapter;
326
327 spin_lock_irqsave(&host_notify->lock, flags);
328
329 if (host_notify->pending) {
330 spin_unlock_irqrestore(&host_notify->lock, flags);
331 dev_warn(&adapter->dev, "Host Notify already scheduled.\n");
332 return -EBUSY;
333 }
334
335 host_notify->payload = data;
336 host_notify->addr = addr;
337
338 /* Mark that there is a pending notification and release the lock */
339 host_notify->pending = true;
340 spin_unlock_irqrestore(&host_notify->lock, flags);
341
342 return schedule_work(&host_notify->work);
343}
344EXPORT_SYMBOL_GPL(i2c_handle_smbus_host_notify);
345
242module_i2c_driver(smbalert_driver); 346module_i2c_driver(smbalert_driver);
243 347
244MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>"); 348MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c
index 9ceb63b62be5..3cdf8e1ca0ad 100644
--- a/drivers/misc/eeprom/at24.c
+++ b/drivers/misc/eeprom/at24.c
@@ -58,6 +58,10 @@ struct at24_data {
58 int use_smbus; 58 int use_smbus;
59 int use_smbus_write; 59 int use_smbus_write;
60 60
61 ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t);
62 ssize_t (*write_func)(struct at24_data *,
63 const char *, unsigned int, size_t);
64
61 /* 65 /*
62 * Lock protects against activities from other Linux tasks, 66 * Lock protects against activities from other Linux tasks,
63 * but not from changes by other I2C masters. 67 * but not from changes by other I2C masters.
@@ -109,25 +113,63 @@ MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
109 ((1 << AT24_SIZE_FLAGS | (_flags)) \ 113 ((1 << AT24_SIZE_FLAGS | (_flags)) \
110 << AT24_SIZE_BYTELEN | ilog2(_len)) 114 << AT24_SIZE_BYTELEN | ilog2(_len))
111 115
116/*
117 * Both reads and writes fail if the previous write didn't complete yet. This
118 * macro loops a few times waiting at least long enough for one entire page
119 * write to work while making sure that at least one iteration is run before
120 * checking the break condition.
121 *
122 * It takes two parameters: a variable in which the future timeout in jiffies
123 * will be stored and a temporary variable holding the time of the last
124 * iteration of processing the request. Both should be unsigned integers
125 * holding at least 32 bits.
126 */
127#define loop_until_timeout(tout, op_time) \
128 for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \
129 op_time ? time_before(op_time, tout) : true; \
130 usleep_range(1000, 1500), op_time = jiffies)
131
112static const struct i2c_device_id at24_ids[] = { 132static const struct i2c_device_id at24_ids[] = {
113 /* needs 8 addresses as A0-A2 are ignored */ 133 /* needs 8 addresses as A0-A2 are ignored */
114 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) }, 134 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
115 /* old variants can't be handled with this generic entry! */ 135 /* old variants can't be handled with this generic entry! */
116 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) }, 136 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
117 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) }, 137 { "24cs01", AT24_DEVICE_MAGIC(16,
138 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
139 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
140 { "24cs02", AT24_DEVICE_MAGIC(16,
141 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
142 { "24mac402", AT24_DEVICE_MAGIC(48 / 8,
143 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
144 { "24mac602", AT24_DEVICE_MAGIC(64 / 8,
145 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
118 /* spd is a 24c02 in memory DIMMs */ 146 /* spd is a 24c02 in memory DIMMs */
119 { "spd", AT24_DEVICE_MAGIC(2048 / 8, 147 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
120 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, 148 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
121 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) }, 149 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
150 { "24cs04", AT24_DEVICE_MAGIC(16,
151 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
122 /* 24rf08 quirk is handled at i2c-core */ 152 /* 24rf08 quirk is handled at i2c-core */
123 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) }, 153 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
124 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) }, 154 { "24cs08", AT24_DEVICE_MAGIC(16,
125 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) }, 155 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
126 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) }, 156 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
127 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) }, 157 { "24cs16", AT24_DEVICE_MAGIC(16,
128 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) }, 158 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
129 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) }, 159 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
130 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) }, 160 { "24cs32", AT24_DEVICE_MAGIC(16,
161 AT24_FLAG_ADDR16 |
162 AT24_FLAG_SERIAL |
163 AT24_FLAG_READONLY) },
164 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
165 { "24cs64", AT24_DEVICE_MAGIC(16,
166 AT24_FLAG_ADDR16 |
167 AT24_FLAG_SERIAL |
168 AT24_FLAG_READONLY) },
169 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
170 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
171 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
172 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
131 { "at24", 0 }, 173 { "at24", 0 },
132 { /* END OF LIST */ } 174 { /* END OF LIST */ }
133}; 175};
@@ -145,9 +187,22 @@ MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
145 * This routine supports chips which consume multiple I2C addresses. It 187 * This routine supports chips which consume multiple I2C addresses. It
146 * computes the addressing information to be used for a given r/w request. 188 * computes the addressing information to be used for a given r/w request.
147 * Assumes that sanity checks for offset happened at sysfs-layer. 189 * Assumes that sanity checks for offset happened at sysfs-layer.
190 *
191 * Slave address and byte offset derive from the offset. Always
192 * set the byte address; on a multi-master board, another master
193 * may have changed the chip's "current" address pointer.
194 *
195 * REVISIT some multi-address chips don't rollover page reads to
196 * the next slave address, so we may need to truncate the count.
197 * Those chips might need another quirk flag.
198 *
199 * If the real hardware used four adjacent 24c02 chips and that
200 * were misconfigured as one 24c08, that would be a similar effect:
201 * one "eeprom" file not four, but larger reads would fail when
202 * they crossed certain pages.
148 */ 203 */
149static struct i2c_client *at24_translate_offset(struct at24_data *at24, 204static struct i2c_client *at24_translate_offset(struct at24_data *at24,
150 unsigned *offset) 205 unsigned int *offset)
151{ 206{
152 unsigned i; 207 unsigned i;
153 208
@@ -162,123 +217,168 @@ static struct i2c_client *at24_translate_offset(struct at24_data *at24,
162 return at24->client[i]; 217 return at24->client[i];
163} 218}
164 219
165static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf, 220static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf,
166 unsigned offset, size_t count) 221 unsigned int offset, size_t count)
167{ 222{
168 struct i2c_msg msg[2]; 223 unsigned long timeout, read_time;
169 u8 msgbuf[2];
170 struct i2c_client *client; 224 struct i2c_client *client;
225 int status;
226
227 client = at24_translate_offset(at24, &offset);
228
229 if (count > io_limit)
230 count = io_limit;
231
232 /* Smaller eeproms can work given some SMBus extension calls */
233 if (count > I2C_SMBUS_BLOCK_MAX)
234 count = I2C_SMBUS_BLOCK_MAX;
235
236 loop_until_timeout(timeout, read_time) {
237 status = i2c_smbus_read_i2c_block_data_or_emulated(client,
238 offset,
239 count, buf);
240
241 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
242 count, offset, status, jiffies);
243
244 if (status == count)
245 return count;
246 }
247
248 return -ETIMEDOUT;
249}
250
251static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf,
252 unsigned int offset, size_t count)
253{
171 unsigned long timeout, read_time; 254 unsigned long timeout, read_time;
255 struct i2c_client *client;
256 struct i2c_msg msg[2];
172 int status, i; 257 int status, i;
258 u8 msgbuf[2];
173 259
174 memset(msg, 0, sizeof(msg)); 260 memset(msg, 0, sizeof(msg));
175
176 /*
177 * REVISIT some multi-address chips don't rollover page reads to
178 * the next slave address, so we may need to truncate the count.
179 * Those chips might need another quirk flag.
180 *
181 * If the real hardware used four adjacent 24c02 chips and that
182 * were misconfigured as one 24c08, that would be a similar effect:
183 * one "eeprom" file not four, but larger reads would fail when
184 * they crossed certain pages.
185 */
186
187 /*
188 * Slave address and byte offset derive from the offset. Always
189 * set the byte address; on a multi-master board, another master
190 * may have changed the chip's "current" address pointer.
191 */
192 client = at24_translate_offset(at24, &offset); 261 client = at24_translate_offset(at24, &offset);
193 262
194 if (count > io_limit) 263 if (count > io_limit)
195 count = io_limit; 264 count = io_limit;
196 265
197 if (at24->use_smbus) {
198 /* Smaller eeproms can work given some SMBus extension calls */
199 if (count > I2C_SMBUS_BLOCK_MAX)
200 count = I2C_SMBUS_BLOCK_MAX;
201 } else {
202 /*
203 * When we have a better choice than SMBus calls, use a
204 * combined I2C message. Write address; then read up to
205 * io_limit data bytes. Note that read page rollover helps us
206 * here (unlike writes). msgbuf is u8 and will cast to our
207 * needs.
208 */
209 i = 0;
210 if (at24->chip.flags & AT24_FLAG_ADDR16)
211 msgbuf[i++] = offset >> 8;
212 msgbuf[i++] = offset;
213
214 msg[0].addr = client->addr;
215 msg[0].buf = msgbuf;
216 msg[0].len = i;
217
218 msg[1].addr = client->addr;
219 msg[1].flags = I2C_M_RD;
220 msg[1].buf = buf;
221 msg[1].len = count;
222 }
223
224 /* 266 /*
225 * Reads fail if the previous write didn't complete yet. We may 267 * When we have a better choice than SMBus calls, use a combined I2C
226 * loop a few times until this one succeeds, waiting at least 268 * message. Write address; then read up to io_limit data bytes. Note
227 * long enough for one entire page write to work. 269 * that read page rollover helps us here (unlike writes). msgbuf is
270 * u8 and will cast to our needs.
228 */ 271 */
229 timeout = jiffies + msecs_to_jiffies(write_timeout); 272 i = 0;
230 do { 273 if (at24->chip.flags & AT24_FLAG_ADDR16)
231 read_time = jiffies; 274 msgbuf[i++] = offset >> 8;
232 if (at24->use_smbus) { 275 msgbuf[i++] = offset;
233 status = i2c_smbus_read_i2c_block_data_or_emulated(client, offset, 276
234 count, buf); 277 msg[0].addr = client->addr;
235 } else { 278 msg[0].buf = msgbuf;
236 status = i2c_transfer(client->adapter, msg, 2); 279 msg[0].len = i;
237 if (status == 2) 280
238 status = count; 281 msg[1].addr = client->addr;
239 } 282 msg[1].flags = I2C_M_RD;
283 msg[1].buf = buf;
284 msg[1].len = count;
285
286 loop_until_timeout(timeout, read_time) {
287 status = i2c_transfer(client->adapter, msg, 2);
288 if (status == 2)
289 status = count;
290
240 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", 291 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
241 count, offset, status, jiffies); 292 count, offset, status, jiffies);
242 293
243 if (status == count) 294 if (status == count)
244 return count; 295 return count;
245 296 }
246 usleep_range(1000, 1500);
247 } while (time_before(read_time, timeout));
248 297
249 return -ETIMEDOUT; 298 return -ETIMEDOUT;
250} 299}
251 300
252static int at24_read(void *priv, unsigned int off, void *val, size_t count) 301static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf,
302 unsigned int offset, size_t count)
253{ 303{
254 struct at24_data *at24 = priv; 304 unsigned long timeout, read_time;
255 char *buf = val; 305 struct i2c_client *client;
306 struct i2c_msg msg[2];
307 u8 addrbuf[2];
308 int status;
256 309
257 if (unlikely(!count)) 310 client = at24_translate_offset(at24, &offset);
258 return count; 311
312 memset(msg, 0, sizeof(msg));
313 msg[0].addr = client->addr;
314 msg[0].buf = addrbuf;
259 315
260 /* 316 /*
261 * Read data from chip, protecting against concurrent updates 317 * The address pointer of the device is shared between the regular
262 * from this host, but not from other I2C masters. 318 * EEPROM array and the serial number block. The dummy write (part of
319 * the sequential read protocol) ensures the address pointer is reset
320 * to the desired position.
263 */ 321 */
264 mutex_lock(&at24->lock); 322 if (at24->chip.flags & AT24_FLAG_ADDR16) {
323 /*
324 * For 16 bit address pointers, the word address must contain
325 * a '10' sequence in bits 11 and 10 regardless of the
326 * intended position of the address pointer.
327 */
328 addrbuf[0] = 0x08;
329 addrbuf[1] = offset;
330 msg[0].len = 2;
331 } else {
332 /*
333 * Otherwise the word address must begin with a '10' sequence,
334 * regardless of the intended address.
335 */
336 addrbuf[0] = 0x80 + offset;
337 msg[0].len = 1;
338 }
265 339
266 while (count) { 340 msg[1].addr = client->addr;
267 int status; 341 msg[1].flags = I2C_M_RD;
342 msg[1].buf = buf;
343 msg[1].len = count;
268 344
269 status = at24_eeprom_read(at24, buf, off, count); 345 loop_until_timeout(timeout, read_time) {
270 if (status < 0) { 346 status = i2c_transfer(client->adapter, msg, 2);
271 mutex_unlock(&at24->lock); 347 if (status == 2)
272 return status; 348 return count;
273 }
274 buf += status;
275 off += status;
276 count -= status;
277 } 349 }
278 350
279 mutex_unlock(&at24->lock); 351 return -ETIMEDOUT;
352}
280 353
281 return 0; 354static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf,
355 unsigned int offset, size_t count)
356{
357 unsigned long timeout, read_time;
358 struct i2c_client *client;
359 struct i2c_msg msg[2];
360 u8 addrbuf[2];
361 int status;
362
363 client = at24_translate_offset(at24, &offset);
364
365 memset(msg, 0, sizeof(msg));
366 msg[0].addr = client->addr;
367 msg[0].buf = addrbuf;
368 addrbuf[0] = 0x90 + offset;
369 msg[0].len = 1;
370 msg[1].addr = client->addr;
371 msg[1].flags = I2C_M_RD;
372 msg[1].buf = buf;
373 msg[1].len = count;
374
375 loop_until_timeout(timeout, read_time) {
376 status = i2c_transfer(client->adapter, msg, 2);
377 if (status == 2)
378 return count;
379 }
380
381 return -ETIMEDOUT;
282} 382}
283 383
284/* 384/*
@@ -286,21 +386,15 @@ static int at24_read(void *priv, unsigned int off, void *val, size_t count)
286 * chip is normally write protected. But there are plenty of product 386 * chip is normally write protected. But there are plenty of product
287 * variants here, including OTP fuses and partial chip protect. 387 * variants here, including OTP fuses and partial chip protect.
288 * 388 *
289 * We only use page mode writes; the alternative is sloooow. This routine 389 * We only use page mode writes; the alternative is sloooow. These routines
290 * writes at most one page. 390 * write at most one page.
291 */ 391 */
292static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf, 392
293 unsigned offset, size_t count) 393static size_t at24_adjust_write_count(struct at24_data *at24,
394 unsigned int offset, size_t count)
294{ 395{
295 struct i2c_client *client;
296 struct i2c_msg msg;
297 ssize_t status = 0;
298 unsigned long timeout, write_time;
299 unsigned next_page; 396 unsigned next_page;
300 397
301 /* Get corresponding I2C address and adjust offset */
302 client = at24_translate_offset(at24, &offset);
303
304 /* write_max is at most a page */ 398 /* write_max is at most a page */
305 if (count > at24->write_max) 399 if (count > at24->write_max)
306 count = at24->write_max; 400 count = at24->write_max;
@@ -310,62 +404,132 @@ static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
310 if (offset + count > next_page) 404 if (offset + count > next_page)
311 count = next_page - offset; 405 count = next_page - offset;
312 406
313 /* If we'll use I2C calls for I/O, set up the message */ 407 return count;
314 if (!at24->use_smbus) { 408}
315 int i = 0;
316 409
317 msg.addr = client->addr; 410static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24,
318 msg.flags = 0; 411 const char *buf,
412 unsigned int offset, size_t count)
413{
414 unsigned long timeout, write_time;
415 struct i2c_client *client;
416 ssize_t status = 0;
319 417
320 /* msg.buf is u8 and casts will mask the values */ 418 client = at24_translate_offset(at24, &offset);
321 msg.buf = at24->writebuf; 419 count = at24_adjust_write_count(at24, offset, count);
322 if (at24->chip.flags & AT24_FLAG_ADDR16) 420
323 msg.buf[i++] = offset >> 8; 421 loop_until_timeout(timeout, write_time) {
422 status = i2c_smbus_write_i2c_block_data(client,
423 offset, count, buf);
424 if (status == 0)
425 status = count;
426
427 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
428 count, offset, status, jiffies);
324 429
325 msg.buf[i++] = offset; 430 if (status == count)
326 memcpy(&msg.buf[i], buf, count); 431 return count;
327 msg.len = i + count;
328 } 432 }
329 433
330 /* 434 return -ETIMEDOUT;
331 * Writes fail if the previous one didn't complete yet. We may 435}
332 * loop a few times until this one succeeds, waiting at least 436
333 * long enough for one entire page write to work. 437static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24,
334 */ 438 const char *buf,
335 timeout = jiffies + msecs_to_jiffies(write_timeout); 439 unsigned int offset, size_t count)
336 do { 440{
337 write_time = jiffies; 441 unsigned long timeout, write_time;
338 if (at24->use_smbus_write) { 442 struct i2c_client *client;
339 switch (at24->use_smbus_write) { 443 ssize_t status = 0;
340 case I2C_SMBUS_I2C_BLOCK_DATA: 444
341 status = i2c_smbus_write_i2c_block_data(client, 445 client = at24_translate_offset(at24, &offset);
342 offset, count, buf); 446
343 break; 447 loop_until_timeout(timeout, write_time) {
344 case I2C_SMBUS_BYTE_DATA: 448 status = i2c_smbus_write_byte_data(client, offset, buf[0]);
345 status = i2c_smbus_write_byte_data(client, 449 if (status == 0)
346 offset, buf[0]); 450 status = count;
347 break; 451
348 }
349
350 if (status == 0)
351 status = count;
352 } else {
353 status = i2c_transfer(client->adapter, &msg, 1);
354 if (status == 1)
355 status = count;
356 }
357 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", 452 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
358 count, offset, status, jiffies); 453 count, offset, status, jiffies);
359 454
360 if (status == count) 455 if (status == count)
361 return count; 456 return count;
457 }
458
459 return -ETIMEDOUT;
460}
461
462static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf,
463 unsigned int offset, size_t count)
464{
465 unsigned long timeout, write_time;
466 struct i2c_client *client;
467 struct i2c_msg msg;
468 ssize_t status = 0;
469 int i = 0;
470
471 client = at24_translate_offset(at24, &offset);
472 count = at24_adjust_write_count(at24, offset, count);
473
474 msg.addr = client->addr;
475 msg.flags = 0;
476
477 /* msg.buf is u8 and casts will mask the values */
478 msg.buf = at24->writebuf;
479 if (at24->chip.flags & AT24_FLAG_ADDR16)
480 msg.buf[i++] = offset >> 8;
362 481
363 usleep_range(1000, 1500); 482 msg.buf[i++] = offset;
364 } while (time_before(write_time, timeout)); 483 memcpy(&msg.buf[i], buf, count);
484 msg.len = i + count;
485
486 loop_until_timeout(timeout, write_time) {
487 status = i2c_transfer(client->adapter, &msg, 1);
488 if (status == 1)
489 status = count;
490
491 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
492 count, offset, status, jiffies);
493
494 if (status == count)
495 return count;
496 }
365 497
366 return -ETIMEDOUT; 498 return -ETIMEDOUT;
367} 499}
368 500
501static int at24_read(void *priv, unsigned int off, void *val, size_t count)
502{
503 struct at24_data *at24 = priv;
504 char *buf = val;
505
506 if (unlikely(!count))
507 return count;
508
509 /*
510 * Read data from chip, protecting against concurrent updates
511 * from this host, but not from other I2C masters.
512 */
513 mutex_lock(&at24->lock);
514
515 while (count) {
516 int status;
517
518 status = at24->read_func(at24, buf, off, count);
519 if (status < 0) {
520 mutex_unlock(&at24->lock);
521 return status;
522 }
523 buf += status;
524 off += status;
525 count -= status;
526 }
527
528 mutex_unlock(&at24->lock);
529
530 return 0;
531}
532
369static int at24_write(void *priv, unsigned int off, void *val, size_t count) 533static int at24_write(void *priv, unsigned int off, void *val, size_t count)
370{ 534{
371 struct at24_data *at24 = priv; 535 struct at24_data *at24 = priv;
@@ -383,7 +547,7 @@ static int at24_write(void *priv, unsigned int off, void *val, size_t count)
383 while (count) { 547 while (count) {
384 int status; 548 int status;
385 549
386 status = at24_eeprom_write(at24, buf, off, count); 550 status = at24->write_func(at24, buf, off, count);
387 if (status < 0) { 551 if (status < 0) {
388 mutex_unlock(&at24->lock); 552 mutex_unlock(&at24->lock);
389 return status; 553 return status;
@@ -400,7 +564,7 @@ static int at24_write(void *priv, unsigned int off, void *val, size_t count)
400 564
401#ifdef CONFIG_OF 565#ifdef CONFIG_OF
402static void at24_get_ofdata(struct i2c_client *client, 566static void at24_get_ofdata(struct i2c_client *client,
403 struct at24_platform_data *chip) 567 struct at24_platform_data *chip)
404{ 568{
405 const __be32 *val; 569 const __be32 *val;
406 struct device_node *node = client->dev.of_node; 570 struct device_node *node = client->dev.of_node;
@@ -415,7 +579,7 @@ static void at24_get_ofdata(struct i2c_client *client,
415} 579}
416#else 580#else
417static void at24_get_ofdata(struct i2c_client *client, 581static void at24_get_ofdata(struct i2c_client *client,
418 struct at24_platform_data *chip) 582 struct at24_platform_data *chip)
419{ } 583{ }
420#endif /* CONFIG_OF */ 584#endif /* CONFIG_OF */
421 585
@@ -518,6 +682,30 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
518 at24->chip = chip; 682 at24->chip = chip;
519 at24->num_addresses = num_addresses; 683 at24->num_addresses = num_addresses;
520 684
685 if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) {
686 dev_err(&client->dev,
687 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
688 return -EINVAL;
689 }
690
691 if (chip.flags & AT24_FLAG_SERIAL) {
692 at24->read_func = at24_eeprom_read_serial;
693 } else if (chip.flags & AT24_FLAG_MAC) {
694 at24->read_func = at24_eeprom_read_mac;
695 } else {
696 at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus
697 : at24_eeprom_read_i2c;
698 }
699
700 if (at24->use_smbus) {
701 if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA)
702 at24->write_func = at24_eeprom_write_smbus_block;
703 else
704 at24->write_func = at24_eeprom_write_smbus_byte;
705 } else {
706 at24->write_func = at24_eeprom_write_i2c;
707 }
708
521 writable = !(chip.flags & AT24_FLAG_READONLY); 709 writable = !(chip.flags & AT24_FLAG_READONLY);
522 if (writable) { 710 if (writable) {
523 if (!use_smbus || use_smbus_write) { 711 if (!use_smbus || use_smbus_write) {
diff --git a/include/linux/i2c-smbus.h b/include/linux/i2c-smbus.h
index 8f1b086ca5bc..c2e3324f9468 100644
--- a/include/linux/i2c-smbus.h
+++ b/include/linux/i2c-smbus.h
@@ -23,6 +23,8 @@
23#define _LINUX_I2C_SMBUS_H 23#define _LINUX_I2C_SMBUS_H
24 24
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/spinlock.h>
27#include <linux/workqueue.h>
26 28
27 29
28/** 30/**
@@ -48,4 +50,31 @@ struct i2c_client *i2c_setup_smbus_alert(struct i2c_adapter *adapter,
48 struct i2c_smbus_alert_setup *setup); 50 struct i2c_smbus_alert_setup *setup);
49int i2c_handle_smbus_alert(struct i2c_client *ara); 51int i2c_handle_smbus_alert(struct i2c_client *ara);
50 52
53/**
54 * smbus_host_notify - internal structure used by the Host Notify mechanism.
55 * @adapter: the I2C adapter associated with this struct
56 * @work: worker used to schedule the IRQ in the slave device
57 * @lock: spinlock to check if a notification is already pending
58 * @pending: flag set when a notification is pending (any new notification will
59 * be rejected if pending is true)
60 * @payload: the actual payload of the Host Notify event
61 * @addr: the address of the slave device which raised the notification
62 *
63 * This struct needs to be allocated by i2c_setup_smbus_host_notify() and does
64 * not need to be freed. Internally, i2c_setup_smbus_host_notify() uses a
65 * managed resource to clean this up when the adapter get released.
66 */
67struct smbus_host_notify {
68 struct i2c_adapter *adapter;
69 struct work_struct work;
70 spinlock_t lock;
71 bool pending;
72 u16 payload;
73 u8 addr;
74};
75
76struct smbus_host_notify *i2c_setup_smbus_host_notify(struct i2c_adapter *adap);
77int i2c_handle_smbus_host_notify(struct smbus_host_notify *host_notify,
78 unsigned short addr, unsigned int data);
79
51#endif /* _LINUX_I2C_SMBUS_H */ 80#endif /* _LINUX_I2C_SMBUS_H */
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 96a25ae14494..fffdc270ca18 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -126,6 +126,11 @@ i2c_smbus_read_i2c_block_data_or_emulated(const struct i2c_client *client,
126 u8 command, u8 length, u8 *values); 126 u8 command, u8 length, u8 *values);
127#endif /* I2C */ 127#endif /* I2C */
128 128
129enum i2c_alert_protocol {
130 I2C_PROTOCOL_SMBUS_ALERT,
131 I2C_PROTOCOL_SMBUS_HOST_NOTIFY,
132};
133
129/** 134/**
130 * struct i2c_driver - represent an I2C device driver 135 * struct i2c_driver - represent an I2C device driver
131 * @class: What kind of i2c device we instantiate (for detect) 136 * @class: What kind of i2c device we instantiate (for detect)
@@ -180,8 +185,11 @@ struct i2c_driver {
180 * The format and meaning of the data value depends on the protocol. 185 * The format and meaning of the data value depends on the protocol.
181 * For the SMBus alert protocol, there is a single bit of data passed 186 * For the SMBus alert protocol, there is a single bit of data passed
182 * as the alert response's low bit ("event flag"). 187 * as the alert response's low bit ("event flag").
188 * For the SMBus Host Notify protocol, the data corresponds to the
189 * 16-bit payload data reported by the slave device acting as master.
183 */ 190 */
184 void (*alert)(struct i2c_client *, unsigned int data); 191 void (*alert)(struct i2c_client *, enum i2c_alert_protocol protocol,
192 unsigned int data);
185 193
186 /* a ioctl like command that can be used to perform specific functions 194 /* a ioctl like command that can be used to perform specific functions
187 * with the device. 195 * with the device.
@@ -349,6 +357,11 @@ extern int i2c_probe_func_quick_read(struct i2c_adapter *, unsigned short addr);
349extern struct i2c_client * 357extern struct i2c_client *
350i2c_new_dummy(struct i2c_adapter *adap, u16 address); 358i2c_new_dummy(struct i2c_adapter *adap, u16 address);
351 359
360extern struct i2c_client *
361i2c_new_secondary_device(struct i2c_client *client,
362 const char *name,
363 u16 default_addr);
364
352extern void i2c_unregister_device(struct i2c_client *); 365extern void i2c_unregister_device(struct i2c_client *);
353#endif /* I2C */ 366#endif /* I2C */
354 367
diff --git a/include/linux/platform_data/at24.h b/include/linux/platform_data/at24.h
index be830b141d83..271a4e25af67 100644
--- a/include/linux/platform_data/at24.h
+++ b/include/linux/platform_data/at24.h
@@ -10,6 +10,7 @@
10 10
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/nvmem-consumer.h> 12#include <linux/nvmem-consumer.h>
13#include <linux/bitops.h>
13 14
14/** 15/**
15 * struct at24_platform_data - data to set up at24 (generic eeprom) driver 16 * struct at24_platform_data - data to set up at24 (generic eeprom) driver
@@ -43,10 +44,12 @@ struct at24_platform_data {
43 u32 byte_len; /* size (sum of all addr) */ 44 u32 byte_len; /* size (sum of all addr) */
44 u16 page_size; /* for writes */ 45 u16 page_size; /* for writes */
45 u8 flags; 46 u8 flags;
46#define AT24_FLAG_ADDR16 0x80 /* address pointer is 16 bit */ 47#define AT24_FLAG_ADDR16 BIT(7) /* address pointer is 16 bit */
47#define AT24_FLAG_READONLY 0x40 /* sysfs-entry will be read-only */ 48#define AT24_FLAG_READONLY BIT(6) /* sysfs-entry will be read-only */
48#define AT24_FLAG_IRUGO 0x20 /* sysfs-entry will be world-readable */ 49#define AT24_FLAG_IRUGO BIT(5) /* sysfs-entry will be world-readable */
49#define AT24_FLAG_TAKE8ADDR 0x10 /* take always 8 addresses (24c00) */ 50#define AT24_FLAG_TAKE8ADDR BIT(4) /* take always 8 addresses (24c00) */
51#define AT24_FLAG_SERIAL BIT(3) /* factory-programmed serial number */
52#define AT24_FLAG_MAC BIT(2) /* factory-programmed mac address */
50 53
51 void (*setup)(struct nvmem_device *nvmem, void *context); 54 void (*setup)(struct nvmem_device *nvmem, void *context);
52 void *context; 55 void *context;
diff --git a/include/uapi/linux/i2c.h b/include/uapi/linux/i2c.h
index adcbef4bff61..009e27bb9abe 100644
--- a/include/uapi/linux/i2c.h
+++ b/include/uapi/linux/i2c.h
@@ -102,6 +102,7 @@ struct i2c_msg {
102#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 102#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
103#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ 103#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
104#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ 104#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
105#define I2C_FUNC_SMBUS_HOST_NOTIFY 0x10000000
105 106
106#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ 107#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
107 I2C_FUNC_SMBUS_WRITE_BYTE) 108 I2C_FUNC_SMBUS_WRITE_BYTE)
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 15:15:03 -0400