diff options
author | Chen-Yu Tsai <wens@csie.org> | 2018-03-08 10:00:11 -0500 |
---|---|---|
committer | Chen-Yu Tsai <wens@csie.org> | 2018-03-10 03:13:40 -0500 |
commit | 651f97f58bbb43670e9c2d365938f4582ce40423 (patch) | |
tree | 51737d111f1af0c1fa283e202fceeba31e070df3 | |
parent | cd244bd0d9e5d93a9d375ad609856228a35c3c50 (diff) |
ARM: dts: sun9i: Add enable-method for SMP support for the A80 SoC
Using the enable-method property for SMP support would allow future PSCI
implementations to override any in-OS support. This is better than just
matching against the machine compatible, and then having to determine
whether other methods are available or not.
This adds enable-method properties to all CPU nodes.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-rw-r--r-- | arch/arm/boot/dts/sun9i-a80.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index b1c86b76ac3c..82a770a5ba46 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi | |||
@@ -65,6 +65,7 @@ | |||
65 | device_type = "cpu"; | 65 | device_type = "cpu"; |
66 | cci-control-port = <&cci_control0>; | 66 | cci-control-port = <&cci_control0>; |
67 | clock-frequency = <12000000>; | 67 | clock-frequency = <12000000>; |
68 | enable-method = "allwinner,sun9i-a80-smp"; | ||
68 | reg = <0x0>; | 69 | reg = <0x0>; |
69 | }; | 70 | }; |
70 | 71 | ||
@@ -73,6 +74,7 @@ | |||
73 | device_type = "cpu"; | 74 | device_type = "cpu"; |
74 | cci-control-port = <&cci_control0>; | 75 | cci-control-port = <&cci_control0>; |
75 | clock-frequency = <12000000>; | 76 | clock-frequency = <12000000>; |
77 | enable-method = "allwinner,sun9i-a80-smp"; | ||
76 | reg = <0x1>; | 78 | reg = <0x1>; |
77 | }; | 79 | }; |
78 | 80 | ||
@@ -81,6 +83,7 @@ | |||
81 | device_type = "cpu"; | 83 | device_type = "cpu"; |
82 | cci-control-port = <&cci_control0>; | 84 | cci-control-port = <&cci_control0>; |
83 | clock-frequency = <12000000>; | 85 | clock-frequency = <12000000>; |
86 | enable-method = "allwinner,sun9i-a80-smp"; | ||
84 | reg = <0x2>; | 87 | reg = <0x2>; |
85 | }; | 88 | }; |
86 | 89 | ||
@@ -89,6 +92,7 @@ | |||
89 | device_type = "cpu"; | 92 | device_type = "cpu"; |
90 | cci-control-port = <&cci_control0>; | 93 | cci-control-port = <&cci_control0>; |
91 | clock-frequency = <12000000>; | 94 | clock-frequency = <12000000>; |
95 | enable-method = "allwinner,sun9i-a80-smp"; | ||
92 | reg = <0x3>; | 96 | reg = <0x3>; |
93 | }; | 97 | }; |
94 | 98 | ||
@@ -97,6 +101,7 @@ | |||
97 | device_type = "cpu"; | 101 | device_type = "cpu"; |
98 | cci-control-port = <&cci_control1>; | 102 | cci-control-port = <&cci_control1>; |
99 | clock-frequency = <18000000>; | 103 | clock-frequency = <18000000>; |
104 | enable-method = "allwinner,sun9i-a80-smp"; | ||
100 | reg = <0x100>; | 105 | reg = <0x100>; |
101 | }; | 106 | }; |
102 | 107 | ||
@@ -105,6 +110,7 @@ | |||
105 | device_type = "cpu"; | 110 | device_type = "cpu"; |
106 | cci-control-port = <&cci_control1>; | 111 | cci-control-port = <&cci_control1>; |
107 | clock-frequency = <18000000>; | 112 | clock-frequency = <18000000>; |
113 | enable-method = "allwinner,sun9i-a80-smp"; | ||
108 | reg = <0x101>; | 114 | reg = <0x101>; |
109 | }; | 115 | }; |
110 | 116 | ||
@@ -113,6 +119,7 @@ | |||
113 | device_type = "cpu"; | 119 | device_type = "cpu"; |
114 | cci-control-port = <&cci_control1>; | 120 | cci-control-port = <&cci_control1>; |
115 | clock-frequency = <18000000>; | 121 | clock-frequency = <18000000>; |
122 | enable-method = "allwinner,sun9i-a80-smp"; | ||
116 | reg = <0x102>; | 123 | reg = <0x102>; |
117 | }; | 124 | }; |
118 | 125 | ||
@@ -121,6 +128,7 @@ | |||
121 | device_type = "cpu"; | 128 | device_type = "cpu"; |
122 | cci-control-port = <&cci_control1>; | 129 | cci-control-port = <&cci_control1>; |
123 | clock-frequency = <18000000>; | 130 | clock-frequency = <18000000>; |
131 | enable-method = "allwinner,sun9i-a80-smp"; | ||
124 | reg = <0x103>; | 132 | reg = <0x103>; |
125 | }; | 133 | }; |
126 | }; | 134 | }; |