aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2014-03-17 06:07:25 -0400
committerArnd Bergmann <arnd@arndb.de>2014-03-17 07:20:27 -0400
commit64d865f403914afc5cc661aa1412e46715a8d51b (patch)
tree1b4b35a103d20225013326f7eefa22ab04c96be1
parent54cab10f63f20750cd2911e353cf8068f1ecf0a5 (diff)
parentdf76299fecb3d921e4762ae540e33d8b9b1c3c1e (diff)
Merge tag 'mvebu-dt-3.15-4' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt changes for v3.15 (incremental #4)" from Jason Cooper: - dove - add system controller node - drop pinctrl PMU reg property _before_ it hits mainline and becomes ABI - mvebu - XP/370 - change default PCIe apertures - switch GP and DB boards internal registers to 0xf1000000 - correct RAM size on Matrix board - 385 - correct phy connection type for DB board - add RD board * tag 'mvebu-dt-3.15-4' of git://git.infradead.org/linux-mvebu: ARM: dove: drop pinctrl PMU reg property ARM: mvebu: add Device Tree for the Armada 385 RD board ARM: mvebu: use the correct phy connection mode on Armada 385 DB ARM: mvebu: the Armada XP Matrix board has 4 GB ARM: mvebu: switch the Armada XP GP to use internal registers at 0xf1000000 ARM: mvebu: switch the Armada XP DB to use internal registers at 0xf1000000 ARM: mvebu: change the default PCIe apertures for Armada 370/XP ARM: dove: add system controller node Conflicts: arch/arm/boot/dts/Makefile Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/boot/dts/Makefile13
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi4
-rw-r--r--arch/arm/boot/dts/armada-385-db.dts4
-rw-r--r--arch/arm/boot/dts/armada-385-rd.dts94
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts13
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts22
-rw-r--r--arch/arm/boot/dts/armada-xp-matrix.dts7
-rw-r--r--arch/arm/boot/dts/dove.dtsi8
8 files changed, 144 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3d34936fb476..9dfc2d44baaf 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -55,11 +55,6 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
55 berlin2cd-google-chromecast.dtb 55 berlin2cd-google-chromecast.dtb
56dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ 56dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
57 da850-evm.dtb 57 da850-evm.dtb
58dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
59 dove-cubox.dtb \
60 dove-d2plug.dtb \
61 dove-d3plug.dtb \
62 dove-dove-db.dtb
63dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb 58dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
64dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ 59dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
65 exynos4210-smdkv310.dtb \ 60 exynos4210-smdkv310.dtb \
@@ -378,7 +373,8 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
378dtb-$(CONFIG_MACH_ARMADA_375) += \ 373dtb-$(CONFIG_MACH_ARMADA_375) += \
379 armada-375-db.dtb 374 armada-375-db.dtb
380dtb-$(CONFIG_MACH_ARMADA_38X) += \ 375dtb-$(CONFIG_MACH_ARMADA_38X) += \
381 armada-385-db.dtb 376 armada-385-db.dtb \
377 armada-385-rd.dtb
382dtb-$(CONFIG_MACH_ARMADA_XP) += \ 378dtb-$(CONFIG_MACH_ARMADA_XP) += \
383 armada-xp-axpwifiap.dtb \ 379 armada-xp-axpwifiap.dtb \
384 armada-xp-db.dtb \ 380 armada-xp-db.dtb \
@@ -386,6 +382,11 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
386 armada-xp-netgear-rn2120.dtb \ 382 armada-xp-netgear-rn2120.dtb \
387 armada-xp-matrix.dtb \ 383 armada-xp-matrix.dtb \
388 armada-xp-openblocks-ax3-4.dtb 384 armada-xp-openblocks-ax3-4.dtb
385dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
386 dove-cubox.dtb \
387 dove-d2plug.dtb \
388 dove-d3plug.dtb \
389 dove-dove-db.dtb
389 390
390targets += dtbs 391targets += dtbs
391targets += $(dtb-y) 392targets += $(dtb-y)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 7bbc4ac997fb..bbb40f62037d 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -44,8 +44,8 @@
44 #size-cells = <1>; 44 #size-cells = <1>;
45 controller = <&mbusc>; 45 controller = <&mbusc>;
46 interrupt-parent = <&mpic>; 46 interrupt-parent = <&mpic>;
47 pcie-mem-aperture = <0xe0000000 0x8000000>; 47 pcie-mem-aperture = <0xf8000000 0x7e00000>;
48 pcie-io-aperture = <0xe8000000 0x100000>; 48 pcie-io-aperture = <0xffe00000 0x100000>;
49 49
50 devbus-bootcs { 50 devbus-bootcs {
51 compatible = "marvell,mvebu-devbus"; 51 compatible = "marvell,mvebu-devbus";
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index 01b6cc76ddc8..9a136428ec29 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -62,13 +62,13 @@
62 ethernet@30000 { 62 ethernet@30000 {
63 status = "okay"; 63 status = "okay";
64 phy = <&phy1>; 64 phy = <&phy1>;
65 phy-mode = "rgmii"; 65 phy-mode = "rgmii-id";
66 }; 66 };
67 67
68 ethernet@70000 { 68 ethernet@70000 {
69 status = "okay"; 69 status = "okay";
70 phy = <&phy0>; 70 phy = <&phy0>;
71 phy-mode = "rgmii"; 71 phy-mode = "rgmii-id";
72 }; 72 };
73 73
74 mdio { 74 mdio {
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts
new file mode 100644
index 000000000000..45250c88814b
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-rd.dts
@@ -0,0 +1,94 @@
1/*
2 * Device Tree file for Marvell Armada 385 Reference Design board
3 * (RD-88F6820-AP)
4 *
5 * Copyright (C) 2014 Marvell
6 *
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15/dts-v1/;
16#include "armada-385.dtsi"
17
18/ {
19 model = "Marvell Armada 385 Reference Design";
20 compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x";
21
22 chosen {
23 bootargs = "console=ttyS0,115200 earlyprintk";
24 };
25
26 memory {
27 device_type = "memory";
28 reg = <0x00000000 0x10000000>; /* 256 MB */
29 };
30
31 soc {
32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
33 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
34
35 internal-regs {
36 spi@10600 {
37 status = "okay";
38
39 spi-flash@0 {
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "st,m25p128";
43 reg = <0>; /* Chip select 0 */
44 spi-max-frequency = <108000000>;
45 };
46 };
47
48 i2c@11000 {
49 status = "okay";
50 clock-frequency = <100000>;
51 };
52
53 serial@12000 {
54 clock-frequency = <200000000>;
55 status = "okay";
56 };
57
58 ethernet@30000 {
59 status = "okay";
60 phy = <&phy0>;
61 phy-mode = "rgmii-id";
62 };
63
64 ethernet@70000 {
65 status = "okay";
66 phy = <&phy1>;
67 phy-mode = "rgmii-id";
68 };
69
70
71 mdio {
72 phy0: ethernet-phy@0 {
73 reg = <0>;
74 };
75
76 phy1: ethernet-phy@1 {
77 reg = <1>;
78 };
79 };
80 };
81
82 pcie-controller {
83 status = "okay";
84 /*
85 * One PCIe units is accessible through
86 * standard PCIe slot on the board.
87 */
88 pcie@1,0 {
89 /* Port 0, Lane 0 */
90 status = "okay";
91 };
92 };
93 };
94};
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index bcf6d79a57ec..448373c4b0e5 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -2,7 +2,7 @@
2 * Device Tree file for Marvell Armada XP evaluation board 2 * Device Tree file for Marvell Armada XP evaluation board
3 * (DB-78460-BP) 3 * (DB-78460-BP)
4 * 4 *
5 * Copyright (C) 2012 Marvell 5 * Copyright (C) 2012-2014 Marvell
6 * 6 *
7 * Lior Amsalem <alior@marvell.com> 7 * Lior Amsalem <alior@marvell.com>
8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
@@ -11,6 +11,15 @@
11 * This file is licensed under the terms of the GNU General Public 11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any 12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied. 13 * warranty of any kind, whether express or implied.
14 *
15 * Note: this Device Tree assumes that the bootloader has remapped the
16 * internal registers to 0xf1000000 (instead of the default
17 * 0xd0000000). The 0xf1000000 is the default used by the recent,
18 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 * boards were delivered with an older version of the bootloader that
20 * left internal registers mapped at 0xd0000000. If you are in this
21 * situation, you should either update your bootloader (preferred
22 * solution) or the below Device Tree should be adjusted.
14 */ 23 */
15 24
16/dts-v1/; 25/dts-v1/;
@@ -30,7 +39,7 @@
30 }; 39 };
31 40
32 soc { 41 soc {
33 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 42 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
34 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 43 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
35 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; 44 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
36 45
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 274e2ad5f51c..61bda687f782 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -2,7 +2,7 @@
2 * Device Tree file for Marvell Armada XP development board 2 * Device Tree file for Marvell Armada XP development board
3 * (DB-MV784MP-GP) 3 * (DB-MV784MP-GP)
4 * 4 *
5 * Copyright (C) 2013 Marvell 5 * Copyright (C) 2013-2014 Marvell
6 * 6 *
7 * Lior Amsalem <alior@marvell.com> 7 * Lior Amsalem <alior@marvell.com>
8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
@@ -11,6 +11,15 @@
11 * This file is licensed under the terms of the GNU General Public 11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any 12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied. 13 * warranty of any kind, whether express or implied.
14 *
15 * Note: this Device Tree assumes that the bootloader has remapped the
16 * internal registers to 0xf1000000 (instead of the default
17 * 0xd0000000). The 0xf1000000 is the default used by the recent,
18 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 * boards were delivered with an older version of the bootloader that
20 * left internal registers mapped at 0xd0000000. If you are in this
21 * situation, you should either update your bootloader (preferred
22 * solution) or the below Device Tree should be adjusted.
14 */ 23 */
15 24
16/dts-v1/; 25/dts-v1/;
@@ -30,16 +39,17 @@
30 * 8 GB of plug-in RAM modules by default.The amount 39 * 8 GB of plug-in RAM modules by default.The amount
31 * of memory available can be changed by the 40 * of memory available can be changed by the
32 * bootloader according the size of the module 41 * bootloader according the size of the module
33 * actually plugged. Only 7GB are usable because 42 * actually plugged. However, memory between
34 * addresses from 0xC0000000 to 0xffffffff are used by 43 * 0xF0000000 to 0xFFFFFFFF cannot be used, as it is
35 * the internal registers of the SoC. 44 * the address range used for I/O (internal registers,
45 * MBus windows).
36 */ 46 */
37 reg = <0x00000000 0x00000000 0x00000000 0xC0000000>, 47 reg = <0x00000000 0x00000000 0x00000000 0xf0000000>,
38 <0x00000001 0x00000000 0x00000001 0x00000000>; 48 <0x00000001 0x00000000 0x00000001 0x00000000>;
39 }; 49 };
40 50
41 soc { 51 soc {
42 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 52 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
43 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 53 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
44 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>; 54 MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
45 55
diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts
index e47c49ecd55c..c2242745b9b8 100644
--- a/arch/arm/boot/dts/armada-xp-matrix.dts
+++ b/arch/arm/boot/dts/armada-xp-matrix.dts
@@ -23,7 +23,12 @@
23 23
24 memory { 24 memory {
25 device_type = "memory"; 25 device_type = "memory";
26 reg = <0 0x00000000 0 0x80000000>; /* 2 GB */ 26 /*
27 * This board has 4 GB of RAM, but the last 256 MB of
28 * RAM are not usable due to the overlap with the MBus
29 * Window address range
30 */
31 reg = <0 0x00000000 0 0xf0000000>;
27 }; 32 };
28 33
29 soc { 34 soc {
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 43cbdc2366b3..3b891dd20993 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -186,6 +186,11 @@
186 reg = <0x20000 0x80>, <0x800100 0x8>; 186 reg = <0x20000 0x80>, <0x800100 0x8>;
187 }; 187 };
188 188
189 sysc: system-ctrl@20000 {
190 compatible = "marvell,orion-system-controller";
191 reg = <0x20000 0x110>;
192 };
193
189 bridge_intc: bridge-interrupt-ctrl@20110 { 194 bridge_intc: bridge-interrupt-ctrl@20110 {
190 compatible = "marvell,orion-bridge-intc"; 195 compatible = "marvell,orion-bridge-intc";
191 interrupt-controller; 196 interrupt-controller;
@@ -390,8 +395,7 @@
390 pinctrl: pin-ctrl@d0200 { 395 pinctrl: pin-ctrl@d0200 {
391 compatible = "marvell,dove-pinctrl"; 396 compatible = "marvell,dove-pinctrl";
392 reg = <0xd0200 0x14>, 397 reg = <0xd0200 0x14>,
393 <0xd0440 0x04>, 398 <0xd0440 0x04>;
394 <0xd802c 0x08>;
395 clocks = <&gate_clk 22>; 399 clocks = <&gate_clk 22>;
396 400
397 pmx_gpio_0: pmx-gpio-0 { 401 pmx_gpio_0: pmx-gpio-0 {