diff options
author | Christophe Lombard <clombard@linux.vnet.ibm.com> | 2017-04-07 10:11:57 -0400 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-04-13 09:34:30 -0400 |
commit | 64663f372c72cedeba1b1dc86df9cc159ae5a93d (patch) | |
tree | b90a385b03752d6b418966a616c363e52d8375eb | |
parent | bdd2e7150644fee4de7167a3e08294ef32eeda11 (diff) |
cxl: Rename some psl8 specific functions
Rename a few functions, changing the '_psl' suffix to '_psl8', to make
clear that the implementation is psl8 specific.
Those functions will have an equivalent implementation for the psl9 in
a later patch.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
-rw-r--r-- | drivers/misc/cxl/cxl.h | 26 | ||||
-rw-r--r-- | drivers/misc/cxl/debugfs.c | 6 | ||||
-rw-r--r-- | drivers/misc/cxl/guest.c | 2 | ||||
-rw-r--r-- | drivers/misc/cxl/irq.c | 2 | ||||
-rw-r--r-- | drivers/misc/cxl/native.c | 12 | ||||
-rw-r--r-- | drivers/misc/cxl/pci.c | 60 |
6 files changed, 54 insertions, 54 deletions
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h index 626073d1786c..a54c0030932c 100644 --- a/drivers/misc/cxl/cxl.h +++ b/drivers/misc/cxl/cxl.h | |||
@@ -813,10 +813,10 @@ int afu_register_irqs(struct cxl_context *ctx, u32 count); | |||
813 | void afu_release_irqs(struct cxl_context *ctx, void *cookie); | 813 | void afu_release_irqs(struct cxl_context *ctx, void *cookie); |
814 | void afu_irq_name_free(struct cxl_context *ctx); | 814 | void afu_irq_name_free(struct cxl_context *ctx); |
815 | 815 | ||
816 | int cxl_attach_afu_directed_psl(struct cxl_context *ctx, u64 wed, u64 amr); | 816 | int cxl_attach_afu_directed_psl8(struct cxl_context *ctx, u64 wed, u64 amr); |
817 | int cxl_activate_dedicated_process_psl(struct cxl_afu *afu); | 817 | int cxl_activate_dedicated_process_psl8(struct cxl_afu *afu); |
818 | int cxl_attach_dedicated_process_psl(struct cxl_context *ctx, u64 wed, u64 amr); | 818 | int cxl_attach_dedicated_process_psl8(struct cxl_context *ctx, u64 wed, u64 amr); |
819 | void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx); | 819 | void cxl_update_dedicated_ivtes_psl8(struct cxl_context *ctx); |
820 | 820 | ||
821 | #ifdef CONFIG_DEBUG_FS | 821 | #ifdef CONFIG_DEBUG_FS |
822 | 822 | ||
@@ -826,10 +826,10 @@ int cxl_debugfs_adapter_add(struct cxl *adapter); | |||
826 | void cxl_debugfs_adapter_remove(struct cxl *adapter); | 826 | void cxl_debugfs_adapter_remove(struct cxl *adapter); |
827 | int cxl_debugfs_afu_add(struct cxl_afu *afu); | 827 | int cxl_debugfs_afu_add(struct cxl_afu *afu); |
828 | void cxl_debugfs_afu_remove(struct cxl_afu *afu); | 828 | void cxl_debugfs_afu_remove(struct cxl_afu *afu); |
829 | void cxl_stop_trace_psl(struct cxl *cxl); | 829 | void cxl_stop_trace_psl8(struct cxl *cxl); |
830 | void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, struct dentry *dir); | 830 | void cxl_debugfs_add_adapter_regs_psl8(struct cxl *adapter, struct dentry *dir); |
831 | void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir); | 831 | void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir); |
832 | void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir); | 832 | void cxl_debugfs_add_afu_regs_psl8(struct cxl_afu *afu, struct dentry *dir); |
833 | 833 | ||
834 | #else /* CONFIG_DEBUG_FS */ | 834 | #else /* CONFIG_DEBUG_FS */ |
835 | 835 | ||
@@ -860,11 +860,11 @@ static inline void cxl_debugfs_afu_remove(struct cxl_afu *afu) | |||
860 | { | 860 | { |
861 | } | 861 | } |
862 | 862 | ||
863 | static inline void cxl_stop_trace(struct cxl *cxl) | 863 | static inline void cxl_stop_trace_psl8(struct cxl *cxl) |
864 | { | 864 | { |
865 | } | 865 | } |
866 | 866 | ||
867 | static inline void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, | 867 | static inline void cxl_debugfs_add_adapter_regs_psl8(struct cxl *adapter, |
868 | struct dentry *dir) | 868 | struct dentry *dir) |
869 | { | 869 | { |
870 | } | 870 | } |
@@ -874,7 +874,7 @@ static inline void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, | |||
874 | { | 874 | { |
875 | } | 875 | } |
876 | 876 | ||
877 | static inline void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir) | 877 | static inline void cxl_debugfs_add_afu_regs_psl8(struct cxl_afu *afu, struct dentry *dir) |
878 | { | 878 | { |
879 | } | 879 | } |
880 | 880 | ||
@@ -919,8 +919,8 @@ struct cxl_irq_info { | |||
919 | }; | 919 | }; |
920 | 920 | ||
921 | void cxl_assign_psn_space(struct cxl_context *ctx); | 921 | void cxl_assign_psn_space(struct cxl_context *ctx); |
922 | int cxl_invalidate_all_psl(struct cxl *adapter); | 922 | int cxl_invalidate_all_psl8(struct cxl *adapter); |
923 | irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info); | 923 | irqreturn_t cxl_irq_psl8(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info); |
924 | irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info); | 924 | irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info); |
925 | int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler, | 925 | int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler, |
926 | void *cookie, irq_hw_number_t *dest_hwirq, | 926 | void *cookie, irq_hw_number_t *dest_hwirq, |
@@ -932,7 +932,7 @@ int cxl_data_cache_flush(struct cxl *adapter); | |||
932 | int cxl_afu_disable(struct cxl_afu *afu); | 932 | int cxl_afu_disable(struct cxl_afu *afu); |
933 | int cxl_psl_purge(struct cxl_afu *afu); | 933 | int cxl_psl_purge(struct cxl_afu *afu); |
934 | 934 | ||
935 | void cxl_native_irq_dump_regs_psl(struct cxl_context *ctx); | 935 | void cxl_native_irq_dump_regs_psl8(struct cxl_context *ctx); |
936 | void cxl_native_err_irq_dump_regs(struct cxl *adapter); | 936 | void cxl_native_err_irq_dump_regs(struct cxl *adapter); |
937 | int cxl_pci_vphb_add(struct cxl_afu *afu); | 937 | int cxl_pci_vphb_add(struct cxl_afu *afu); |
938 | void cxl_pci_vphb_remove(struct cxl_afu *afu); | 938 | void cxl_pci_vphb_remove(struct cxl_afu *afu); |
diff --git a/drivers/misc/cxl/debugfs.c b/drivers/misc/cxl/debugfs.c index 4848ebf84664..2ff10a9335f3 100644 --- a/drivers/misc/cxl/debugfs.c +++ b/drivers/misc/cxl/debugfs.c | |||
@@ -15,7 +15,7 @@ | |||
15 | 15 | ||
16 | static struct dentry *cxl_debugfs; | 16 | static struct dentry *cxl_debugfs; |
17 | 17 | ||
18 | void cxl_stop_trace_psl(struct cxl *adapter) | 18 | void cxl_stop_trace_psl8(struct cxl *adapter) |
19 | { | 19 | { |
20 | int slice; | 20 | int slice; |
21 | 21 | ||
@@ -53,7 +53,7 @@ static struct dentry *debugfs_create_io_x64(const char *name, umode_t mode, | |||
53 | (void __force *)value, &fops_io_x64); | 53 | (void __force *)value, &fops_io_x64); |
54 | } | 54 | } |
55 | 55 | ||
56 | void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, struct dentry *dir) | 56 | void cxl_debugfs_add_adapter_regs_psl8(struct cxl *adapter, struct dentry *dir) |
57 | { | 57 | { |
58 | debugfs_create_io_x64("fir1", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR1)); | 58 | debugfs_create_io_x64("fir1", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR1)); |
59 | debugfs_create_io_x64("fir2", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR2)); | 59 | debugfs_create_io_x64("fir2", S_IRUSR, dir, _cxl_p1_addr(adapter, CXL_PSL_FIR2)); |
@@ -92,7 +92,7 @@ void cxl_debugfs_adapter_remove(struct cxl *adapter) | |||
92 | debugfs_remove_recursive(adapter->debugfs); | 92 | debugfs_remove_recursive(adapter->debugfs); |
93 | } | 93 | } |
94 | 94 | ||
95 | void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir) | 95 | void cxl_debugfs_add_afu_regs_psl8(struct cxl_afu *afu, struct dentry *dir) |
96 | { | 96 | { |
97 | debugfs_create_io_x64("fir", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_FIR_SLICE_An)); | 97 | debugfs_create_io_x64("fir", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_FIR_SLICE_An)); |
98 | debugfs_create_io_x64("serr", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_SERR_An)); | 98 | debugfs_create_io_x64("serr", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_SERR_An)); |
diff --git a/drivers/misc/cxl/guest.c b/drivers/misc/cxl/guest.c index f6ba69889e40..3ad73817b566 100644 --- a/drivers/misc/cxl/guest.c +++ b/drivers/misc/cxl/guest.c | |||
@@ -169,7 +169,7 @@ static irqreturn_t guest_psl_irq(int irq, void *data) | |||
169 | return IRQ_HANDLED; | 169 | return IRQ_HANDLED; |
170 | } | 170 | } |
171 | 171 | ||
172 | rc = cxl_irq_psl(irq, ctx, &irq_info); | 172 | rc = cxl_irq_psl8(irq, ctx, &irq_info); |
173 | return rc; | 173 | return rc; |
174 | } | 174 | } |
175 | 175 | ||
diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c index 2fa119edb27d..fa9f8a2543a1 100644 --- a/drivers/misc/cxl/irq.c +++ b/drivers/misc/cxl/irq.c | |||
@@ -34,7 +34,7 @@ static irqreturn_t schedule_cxl_fault(struct cxl_context *ctx, u64 dsisr, u64 da | |||
34 | return IRQ_HANDLED; | 34 | return IRQ_HANDLED; |
35 | } | 35 | } |
36 | 36 | ||
37 | irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info) | 37 | irqreturn_t cxl_irq_psl8(int irq, struct cxl_context *ctx, struct cxl_irq_info *irq_info) |
38 | { | 38 | { |
39 | u64 dsisr, dar; | 39 | u64 dsisr, dar; |
40 | 40 | ||
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c index c147863e149d..ee3164e89206 100644 --- a/drivers/misc/cxl/native.c +++ b/drivers/misc/cxl/native.c | |||
@@ -258,7 +258,7 @@ void cxl_release_spa(struct cxl_afu *afu) | |||
258 | } | 258 | } |
259 | } | 259 | } |
260 | 260 | ||
261 | int cxl_invalidate_all_psl(struct cxl *adapter) | 261 | int cxl_invalidate_all_psl8(struct cxl *adapter) |
262 | { | 262 | { |
263 | unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT); | 263 | unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT); |
264 | 264 | ||
@@ -578,7 +578,7 @@ static void update_ivtes_directed(struct cxl_context *ctx) | |||
578 | WARN_ON(add_process_element(ctx)); | 578 | WARN_ON(add_process_element(ctx)); |
579 | } | 579 | } |
580 | 580 | ||
581 | int cxl_attach_afu_directed_psl(struct cxl_context *ctx, u64 wed, u64 amr) | 581 | int cxl_attach_afu_directed_psl8(struct cxl_context *ctx, u64 wed, u64 amr) |
582 | { | 582 | { |
583 | u32 pid; | 583 | u32 pid; |
584 | int result; | 584 | int result; |
@@ -671,7 +671,7 @@ static int deactivate_afu_directed(struct cxl_afu *afu) | |||
671 | return 0; | 671 | return 0; |
672 | } | 672 | } |
673 | 673 | ||
674 | int cxl_activate_dedicated_process_psl(struct cxl_afu *afu) | 674 | int cxl_activate_dedicated_process_psl8(struct cxl_afu *afu) |
675 | { | 675 | { |
676 | dev_info(&afu->dev, "Activating dedicated process mode\n"); | 676 | dev_info(&afu->dev, "Activating dedicated process mode\n"); |
677 | 677 | ||
@@ -694,7 +694,7 @@ int cxl_activate_dedicated_process_psl(struct cxl_afu *afu) | |||
694 | return cxl_chardev_d_afu_add(afu); | 694 | return cxl_chardev_d_afu_add(afu); |
695 | } | 695 | } |
696 | 696 | ||
697 | void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx) | 697 | void cxl_update_dedicated_ivtes_psl8(struct cxl_context *ctx) |
698 | { | 698 | { |
699 | struct cxl_afu *afu = ctx->afu; | 699 | struct cxl_afu *afu = ctx->afu; |
700 | 700 | ||
@@ -710,7 +710,7 @@ void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx) | |||
710 | ((u64)ctx->irqs.range[3] & 0xffff)); | 710 | ((u64)ctx->irqs.range[3] & 0xffff)); |
711 | } | 711 | } |
712 | 712 | ||
713 | int cxl_attach_dedicated_process_psl(struct cxl_context *ctx, u64 wed, u64 amr) | 713 | int cxl_attach_dedicated_process_psl8(struct cxl_context *ctx, u64 wed, u64 amr) |
714 | { | 714 | { |
715 | struct cxl_afu *afu = ctx->afu; | 715 | struct cxl_afu *afu = ctx->afu; |
716 | u64 pid; | 716 | u64 pid; |
@@ -880,7 +880,7 @@ static int native_get_irq_info(struct cxl_afu *afu, struct cxl_irq_info *info) | |||
880 | return 0; | 880 | return 0; |
881 | } | 881 | } |
882 | 882 | ||
883 | void cxl_native_irq_dump_regs_psl(struct cxl_context *ctx) | 883 | void cxl_native_irq_dump_regs_psl8(struct cxl_context *ctx) |
884 | { | 884 | { |
885 | u64 fir1, fir2, fir_slice, serr, afu_debug; | 885 | u64 fir1, fir2, fir_slice, serr, afu_debug; |
886 | 886 | ||
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c index 9a092f6cd8d4..23b8a330e057 100644 --- a/drivers/misc/cxl/pci.c +++ b/drivers/misc/cxl/pci.c | |||
@@ -377,7 +377,7 @@ static int calc_capp_routing(struct pci_dev *dev, u64 *chipid, u64 *capp_unit_id | |||
377 | return 0; | 377 | return 0; |
378 | } | 378 | } |
379 | 379 | ||
380 | static int init_implementation_adapter_regs_psl(struct cxl *adapter, struct pci_dev *dev) | 380 | static int init_implementation_adapter_regs_psl8(struct cxl *adapter, struct pci_dev *dev) |
381 | { | 381 | { |
382 | u64 psl_dsnctl, psl_fircntl; | 382 | u64 psl_dsnctl, psl_fircntl; |
383 | u64 chipid; | 383 | u64 chipid; |
@@ -434,7 +434,7 @@ static int init_implementation_adapter_regs_xsl(struct cxl *adapter, struct pci_ | |||
434 | /* For the PSL this is a multiple for 0 < n <= 7: */ | 434 | /* For the PSL this is a multiple for 0 < n <= 7: */ |
435 | #define PSL_2048_250MHZ_CYCLES 1 | 435 | #define PSL_2048_250MHZ_CYCLES 1 |
436 | 436 | ||
437 | static void write_timebase_ctrl_psl(struct cxl *adapter) | 437 | static void write_timebase_ctrl_psl8(struct cxl *adapter) |
438 | { | 438 | { |
439 | cxl_p1_write(adapter, CXL_PSL_TB_CTLSTAT, | 439 | cxl_p1_write(adapter, CXL_PSL_TB_CTLSTAT, |
440 | TBSYNC_CNT(2 * PSL_2048_250MHZ_CYCLES)); | 440 | TBSYNC_CNT(2 * PSL_2048_250MHZ_CYCLES)); |
@@ -455,7 +455,7 @@ static void write_timebase_ctrl_xsl(struct cxl *adapter) | |||
455 | TBSYNC_CNT(XSL_4000_CLOCKS)); | 455 | TBSYNC_CNT(XSL_4000_CLOCKS)); |
456 | } | 456 | } |
457 | 457 | ||
458 | static u64 timebase_read_psl(struct cxl *adapter) | 458 | static u64 timebase_read_psl8(struct cxl *adapter) |
459 | { | 459 | { |
460 | return cxl_p1_read(adapter, CXL_PSL_Timebase); | 460 | return cxl_p1_read(adapter, CXL_PSL_Timebase); |
461 | } | 461 | } |
@@ -513,7 +513,7 @@ static void cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev) | |||
513 | return; | 513 | return; |
514 | } | 514 | } |
515 | 515 | ||
516 | static int init_implementation_afu_regs_psl(struct cxl_afu *afu) | 516 | static int init_implementation_afu_regs_psl8(struct cxl_afu *afu) |
517 | { | 517 | { |
518 | /* read/write masks for this slice */ | 518 | /* read/write masks for this slice */ |
519 | cxl_p1n_write(afu, CXL_PSL_APCALLOC_A, 0xFFFFFFFEFEFEFEFEULL); | 519 | cxl_p1n_write(afu, CXL_PSL_APCALLOC_A, 0xFFFFFFFEFEFEFEFEULL); |
@@ -996,7 +996,7 @@ static int cxl_afu_descriptor_looks_ok(struct cxl_afu *afu) | |||
996 | return 0; | 996 | return 0; |
997 | } | 997 | } |
998 | 998 | ||
999 | static int sanitise_afu_regs_psl(struct cxl_afu *afu) | 999 | static int sanitise_afu_regs_psl8(struct cxl_afu *afu) |
1000 | { | 1000 | { |
1001 | u64 reg; | 1001 | u64 reg; |
1002 | 1002 | ||
@@ -1526,40 +1526,40 @@ static void cxl_deconfigure_adapter(struct cxl *adapter) | |||
1526 | pci_disable_device(pdev); | 1526 | pci_disable_device(pdev); |
1527 | } | 1527 | } |
1528 | 1528 | ||
1529 | static const struct cxl_service_layer_ops psl_ops = { | 1529 | static const struct cxl_service_layer_ops psl8_ops = { |
1530 | .adapter_regs_init = init_implementation_adapter_regs_psl, | 1530 | .adapter_regs_init = init_implementation_adapter_regs_psl8, |
1531 | .invalidate_all = cxl_invalidate_all_psl, | 1531 | .invalidate_all = cxl_invalidate_all_psl8, |
1532 | .afu_regs_init = init_implementation_afu_regs_psl, | 1532 | .afu_regs_init = init_implementation_afu_regs_psl8, |
1533 | .sanitise_afu_regs = sanitise_afu_regs_psl, | 1533 | .sanitise_afu_regs = sanitise_afu_regs_psl8, |
1534 | .register_serr_irq = cxl_native_register_serr_irq, | 1534 | .register_serr_irq = cxl_native_register_serr_irq, |
1535 | .release_serr_irq = cxl_native_release_serr_irq, | 1535 | .release_serr_irq = cxl_native_release_serr_irq, |
1536 | .handle_interrupt = cxl_irq_psl, | 1536 | .handle_interrupt = cxl_irq_psl8, |
1537 | .fail_irq = cxl_fail_irq_psl, | 1537 | .fail_irq = cxl_fail_irq_psl, |
1538 | .activate_dedicated_process = cxl_activate_dedicated_process_psl, | 1538 | .activate_dedicated_process = cxl_activate_dedicated_process_psl8, |
1539 | .attach_afu_directed = cxl_attach_afu_directed_psl, | 1539 | .attach_afu_directed = cxl_attach_afu_directed_psl8, |
1540 | .attach_dedicated_process = cxl_attach_dedicated_process_psl, | 1540 | .attach_dedicated_process = cxl_attach_dedicated_process_psl8, |
1541 | .update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl, | 1541 | .update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl8, |
1542 | .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl, | 1542 | .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl8, |
1543 | .debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl, | 1543 | .debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl8, |
1544 | .psl_irq_dump_registers = cxl_native_irq_dump_regs_psl, | 1544 | .psl_irq_dump_registers = cxl_native_irq_dump_regs_psl8, |
1545 | .err_irq_dump_registers = cxl_native_err_irq_dump_regs, | 1545 | .err_irq_dump_registers = cxl_native_err_irq_dump_regs, |
1546 | .debugfs_stop_trace = cxl_stop_trace_psl, | 1546 | .debugfs_stop_trace = cxl_stop_trace_psl8, |
1547 | .write_timebase_ctrl = write_timebase_ctrl_psl, | 1547 | .write_timebase_ctrl = write_timebase_ctrl_psl8, |
1548 | .timebase_read = timebase_read_psl, | 1548 | .timebase_read = timebase_read_psl8, |
1549 | .capi_mode = OPAL_PHB_CAPI_MODE_CAPI, | 1549 | .capi_mode = OPAL_PHB_CAPI_MODE_CAPI, |
1550 | .needs_reset_before_disable = true, | 1550 | .needs_reset_before_disable = true, |
1551 | }; | 1551 | }; |
1552 | 1552 | ||
1553 | static const struct cxl_service_layer_ops xsl_ops = { | 1553 | static const struct cxl_service_layer_ops xsl_ops = { |
1554 | .adapter_regs_init = init_implementation_adapter_regs_xsl, | 1554 | .adapter_regs_init = init_implementation_adapter_regs_xsl, |
1555 | .invalidate_all = cxl_invalidate_all_psl, | 1555 | .invalidate_all = cxl_invalidate_all_psl8, |
1556 | .sanitise_afu_regs = sanitise_afu_regs_psl, | 1556 | .sanitise_afu_regs = sanitise_afu_regs_psl8, |
1557 | .handle_interrupt = cxl_irq_psl, | 1557 | .handle_interrupt = cxl_irq_psl8, |
1558 | .fail_irq = cxl_fail_irq_psl, | 1558 | .fail_irq = cxl_fail_irq_psl, |
1559 | .activate_dedicated_process = cxl_activate_dedicated_process_psl, | 1559 | .activate_dedicated_process = cxl_activate_dedicated_process_psl8, |
1560 | .attach_afu_directed = cxl_attach_afu_directed_psl, | 1560 | .attach_afu_directed = cxl_attach_afu_directed_psl8, |
1561 | .attach_dedicated_process = cxl_attach_dedicated_process_psl, | 1561 | .attach_dedicated_process = cxl_attach_dedicated_process_psl8, |
1562 | .update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl, | 1562 | .update_dedicated_ivtes = cxl_update_dedicated_ivtes_psl8, |
1563 | .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_xsl, | 1563 | .debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_xsl, |
1564 | .write_timebase_ctrl = write_timebase_ctrl_xsl, | 1564 | .write_timebase_ctrl = write_timebase_ctrl_xsl, |
1565 | .timebase_read = timebase_read_xsl, | 1565 | .timebase_read = timebase_read_xsl, |
@@ -1574,8 +1574,8 @@ static void set_sl_ops(struct cxl *adapter, struct pci_dev *dev) | |||
1574 | adapter->native->sl_ops = &xsl_ops; | 1574 | adapter->native->sl_ops = &xsl_ops; |
1575 | adapter->min_pe = 1; /* Workaround for CX-4 hardware bug */ | 1575 | adapter->min_pe = 1; /* Workaround for CX-4 hardware bug */ |
1576 | } else { | 1576 | } else { |
1577 | dev_info(&dev->dev, "Device uses a PSL\n"); | 1577 | dev_info(&dev->dev, "Device uses a PSL8\n"); |
1578 | adapter->native->sl_ops = &psl_ops; | 1578 | adapter->native->sl_ops = &psl8_ops; |
1579 | } | 1579 | } |
1580 | } | 1580 | } |
1581 | 1581 | ||