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authorMiquel Raynal <miquel.raynal@free-electrons.com>2017-12-22 11:14:12 -0500
committerEduardo Valentin <edubezval@gmail.com>2018-01-01 16:25:19 -0500
commit64163681a25e00182f727caa3a57ffe8d70f1022 (patch)
tree9775cb18fdacc6fd65e2d309fe94c3fa65dae5d0
parent8c0b888f6610d0ebbc4bdfb52d2fef9f4a11adfc (diff)
thermal: armada: Wait sensors validity before exiting the init callback
The thermal core will check for sensors validity right after the initialization callback has returned. As the initialization routine make a reset, the sensors are not ready immediately and the core spawns an error in the dmesg. Avoid this annoying situation by polling on the validity bit before exiting from these routines. This also avoid the use of blind sleeps. Suggested-by: David Sniatkiwicz <davidsn@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-rw-r--r--drivers/thermal/armada_thermal.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/drivers/thermal/armada_thermal.c b/drivers/thermal/armada_thermal.c
index e6025d215cb5..a4befd2d683d 100644
--- a/drivers/thermal/armada_thermal.c
+++ b/drivers/thermal/armada_thermal.c
@@ -23,6 +23,7 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/of_device.h> 24#include <linux/of_device.h>
25#include <linux/thermal.h> 25#include <linux/thermal.h>
26#include <linux/iopoll.h>
26 27
27/* Thermal Manager Control and Status Register */ 28/* Thermal Manager Control and Status Register */
28#define PMU_TDC0_SW_RST_MASK (0x1 << 1) 29#define PMU_TDC0_SW_RST_MASK (0x1 << 1)
@@ -59,6 +60,9 @@
59#define CONTROL1_EXT_TSEN_SW_RESET BIT(7) 60#define CONTROL1_EXT_TSEN_SW_RESET BIT(7)
60#define CONTROL1_EXT_TSEN_HW_RESETn BIT(8) 61#define CONTROL1_EXT_TSEN_HW_RESETn BIT(8)
61 62
63#define STATUS_POLL_PERIOD_US 1000
64#define STATUS_POLL_TIMEOUT_US 100000
65
62struct armada_thermal_data; 66struct armada_thermal_data;
63 67
64/* Marvell EBU Thermal Sensor Dev Structure */ 68/* Marvell EBU Thermal Sensor Dev Structure */
@@ -155,6 +159,16 @@ static void armada375_init_sensor(struct platform_device *pdev,
155 msleep(50); 159 msleep(50);
156} 160}
157 161
162static void armada_wait_sensor_validity(struct armada_thermal_priv *priv)
163{
164 u32 reg;
165
166 readl_relaxed_poll_timeout(priv->status, reg,
167 reg & priv->data->is_valid_bit,
168 STATUS_POLL_PERIOD_US,
169 STATUS_POLL_TIMEOUT_US);
170}
171
158static void armada380_init_sensor(struct platform_device *pdev, 172static void armada380_init_sensor(struct platform_device *pdev,
159 struct armada_thermal_priv *priv) 173 struct armada_thermal_priv *priv)
160{ 174{
@@ -164,7 +178,6 @@ static void armada380_init_sensor(struct platform_device *pdev,
164 reg |= CONTROL1_EXT_TSEN_HW_RESETn; 178 reg |= CONTROL1_EXT_TSEN_HW_RESETn;
165 reg &= ~CONTROL1_EXT_TSEN_SW_RESET; 179 reg &= ~CONTROL1_EXT_TSEN_SW_RESET;
166 writel(reg, priv->control1); 180 writel(reg, priv->control1);
167 msleep(10);
168 181
169 /* Set Tsen Tc Trim to correct default value (errata #132698) */ 182 /* Set Tsen Tc Trim to correct default value (errata #132698) */
170 if (priv->control0) { 183 if (priv->control0) {
@@ -172,8 +185,10 @@ static void armada380_init_sensor(struct platform_device *pdev,
172 reg &= ~CONTROL0_TSEN_TC_TRIM_MASK; 185 reg &= ~CONTROL0_TSEN_TC_TRIM_MASK;
173 reg |= CONTROL0_TSEN_TC_TRIM_VAL; 186 reg |= CONTROL0_TSEN_TC_TRIM_VAL;
174 writel(reg, priv->control0); 187 writel(reg, priv->control0);
175 msleep(10);
176 } 188 }
189
190 /* Wait the sensors to be valid or the core will warn the user */
191 armada_wait_sensor_validity(priv);
177} 192}
178 193
179static void armada_ap806_init_sensor(struct platform_device *pdev, 194static void armada_ap806_init_sensor(struct platform_device *pdev,
@@ -185,7 +200,9 @@ static void armada_ap806_init_sensor(struct platform_device *pdev,
185 reg &= ~CONTROL0_TSEN_RESET; 200 reg &= ~CONTROL0_TSEN_RESET;
186 reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE; 201 reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
187 writel(reg, priv->control0); 202 writel(reg, priv->control0);
188 msleep(10); 203
204 /* Wait the sensors to be valid or the core will warn the user */
205 armada_wait_sensor_validity(priv);
189} 206}
190 207
191static bool armada_is_valid(struct armada_thermal_priv *priv) 208static bool armada_is_valid(struct armada_thermal_priv *priv)