Merge tag 'mlx5-fixes-2017-01-27' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux

Saeed Mahameed says:

====================
mlx5-fixes-2017-01-27

A couple of mlx5 core and ethernet driver fixes.

From Or, A couple of error return values and error handling fixes.
From Hadar, Support TC encapsulation offloads even when the mlx5e uplink
device is stacked  under an upper device.
From Gal, Two patches to fix RSS hash modifications via ethtool.
From Moshe, Added a needed ets capability check.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

15 files changed, 181 insertions, 157 deletions

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
index 3797cc7c1288..caa837e5e2b9 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
@@ -1728,7 +1728,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
         if (cmd->cmdif_rev > CMD_IF_REV) {
                 dev_err(&dev->pdev->dev, "driver does not support command interface version. driver %d, firmware %d\n",
                         CMD_IF_REV, cmd->cmdif_rev);
-                err = -ENOTSUPP;
+                err = -EOPNOTSUPP;
                 goto err_free_page;
         }
 
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
index 951dbd58594d..d5ecb8f53fd4 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
@@ -791,7 +791,8 @@ void mlx5e_disable_vlan_filter(struct mlx5e_priv *priv);
 int mlx5e_modify_rqs_vsd(struct mlx5e_priv *priv, bool vsd);
 
 int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, int ix);
-void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv);
+void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_priv *priv, void *tirc,
+                                    enum mlx5e_traffic_types tt);
 
 int mlx5e_open_locked(struct net_device *netdev);
 int mlx5e_close_locked(struct net_device *netdev);
@@ -863,12 +864,12 @@ static inline void mlx5e_arfs_destroy_tables(struct mlx5e_priv *priv) {}
 
 static inline int mlx5e_arfs_enable(struct mlx5e_priv *priv)
 {
-        return -ENOTSUPP;
+        return -EOPNOTSUPP;
 }
 
 static inline int mlx5e_arfs_disable(struct mlx5e_priv *priv)
 {
-        return -ENOTSUPP;
+        return -EOPNOTSUPP;
 }
 #else
 int mlx5e_arfs_create_tables(struct mlx5e_priv *priv);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c b/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
index f0b460f47f29..0523ed47f597 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
@@ -89,7 +89,7 @@ static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev,
         int i;
 
         if (!MLX5_CAP_GEN(priv->mdev, ets))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         ets->ets_cap = mlx5_max_tc(priv->mdev) + 1;
         for (i = 0; i < ets->ets_cap; i++) {
@@ -236,7 +236,7 @@ static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev,
         int err;
 
         if (!MLX5_CAP_GEN(priv->mdev, ets))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         err = mlx5e_dbcnl_validate_ets(netdev, ets);
         if (err)
@@ -402,7 +402,7 @@ static u8 mlx5e_dcbnl_setall(struct net_device *netdev)
         struct mlx5_core_dev *mdev = priv->mdev;
         struct ieee_ets ets;
         struct ieee_pfc pfc;
-        int err = -ENOTSUPP;
+        int err = -EOPNOTSUPP;
         int i;
 
         if (!MLX5_CAP_GEN(mdev, ets))
@@ -511,6 +511,11 @@ static void mlx5e_dcbnl_getpgtccfgtx(struct net_device *netdev,
         struct mlx5e_priv *priv = netdev_priv(netdev);
         struct mlx5_core_dev *mdev = priv->mdev;
 
+        if (!MLX5_CAP_GEN(priv->mdev, ets)) {
+                netdev_err(netdev, "%s, ets is not supported\n", __func__);
+                return;
+        }
+
         if (priority >= CEE_DCBX_MAX_PRIO) {
                 netdev_err(netdev,
                            "%s, priority is out of range\n", __func__);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
index 5197817e4b2f..bb67863aa361 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
@@ -595,7 +595,7 @@ static int mlx5e_get_coalesce(struct net_device *netdev,
         struct mlx5e_priv *priv = netdev_priv(netdev);
 
         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation.usec;
         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
@@ -620,7 +620,7 @@ static int mlx5e_set_coalesce(struct net_device *netdev,
         int i;
 
         if (!MLX5_CAP_GEN(mdev, cq_moderation))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         mutex_lock(&priv->state_lock);
 
@@ -980,15 +980,18 @@ static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
 
 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
 {
-        struct mlx5_core_dev *mdev = priv->mdev;
         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
-        int i;
+        struct mlx5_core_dev *mdev = priv->mdev;
+        int ctxlen = MLX5_ST_SZ_BYTES(tirc);
+        int tt;
 
         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
-        mlx5e_build_tir_ctx_hash(tirc, priv);
 
-        for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
-                mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen);
+        for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
+                memset(tirc, 0, ctxlen);
+                mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt);
+                mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
+        }
 }
 
 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
@@ -996,6 +999,7 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
 {
         struct mlx5e_priv *priv = netdev_priv(dev);
         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
+        bool hash_changed = false;
         void *in;
 
         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
@@ -1017,14 +1021,21 @@ static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
         }
 
-        if (key)
+        if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
+            hfunc != priv->params.rss_hfunc) {
+                priv->params.rss_hfunc = hfunc;
+                hash_changed = true;
+        }
+
+        if (key) {
                 memcpy(priv->params.toeplitz_hash_key, key,
                        sizeof(priv->params.toeplitz_hash_key));
+                hash_changed = hash_changed ||
+                               priv->params.rss_hfunc == ETH_RSS_HASH_TOP;
+        }
 
-        if (hfunc != ETH_RSS_HASH_NO_CHANGE)
-                priv->params.rss_hfunc = hfunc;
-
-        mlx5e_modify_tirs_hash(priv, in, inlen);
+        if (hash_changed)
+                mlx5e_modify_tirs_hash(priv, in, inlen);
 
         mutex_unlock(&priv->state_lock);
 
@@ -1296,7 +1307,7 @@ static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
         u32 mlx5_wol_mode;
 
         if (!wol_supported)
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         if (wol->wolopts & ~wol_supported)
                 return -EINVAL;
@@ -1426,7 +1437,7 @@ static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
 
         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         if (!rx_mode_changed)
                 return 0;
@@ -1452,7 +1463,7 @@ static int set_pflag_rx_cqe_compress(struct net_device *netdev,
         bool reset;
 
         if (!MLX5_CAP_GEN(mdev, cqe_compression))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         if (enable && priv->tstamp.hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
                 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
index 1fe80de5d68f..a0e5a69402b3 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
@@ -1089,7 +1089,7 @@ int mlx5e_create_flow_steering(struct mlx5e_priv *priv)
                                                MLX5_FLOW_NAMESPACE_KERNEL);
 
         if (!priv->fs.ns)
-                return -EINVAL;
+                return -EOPNOTSUPP;
 
         err = mlx5e_arfs_create_tables(priv);
         if (err) {
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
index d088effd7160..f33f72d0237c 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
@@ -92,7 +92,7 @@ static struct mlx5e_ethtool_table *get_flow_table(struct mlx5e_priv *priv,
         ns = mlx5_get_flow_namespace(priv->mdev,
                                      MLX5_FLOW_NAMESPACE_ETHTOOL);
         if (!ns)
-                return ERR_PTR(-ENOTSUPP);
+                return ERR_PTR(-EOPNOTSUPP);
 
         table_size = min_t(u32, BIT(MLX5_CAP_FLOWTABLE(priv->mdev,
                                                        flow_table_properties_nic_receive.log_max_ft_size)),
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
index 2b7dd315020c..f14ca3385fdd 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -2022,8 +2022,23 @@ static void mlx5e_build_tir_ctx_lro(void *tirc, struct mlx5e_priv *priv)
         MLX5_SET(tirc, tirc, lro_timeout_period_usecs, priv->params.lro_timeout);
 }
 
-void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv)
+void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_priv *priv, void *tirc,
+                                    enum mlx5e_traffic_types tt)
 {
+        void *hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
+
+#define MLX5_HASH_IP            (MLX5_HASH_FIELD_SEL_SRC_IP   |\
+                                 MLX5_HASH_FIELD_SEL_DST_IP)
+
+#define MLX5_HASH_IP_L4PORTS    (MLX5_HASH_FIELD_SEL_SRC_IP   |\
+                                 MLX5_HASH_FIELD_SEL_DST_IP   |\
+                                 MLX5_HASH_FIELD_SEL_L4_SPORT |\
+                                 MLX5_HASH_FIELD_SEL_L4_DPORT)
+
+#define MLX5_HASH_IP_IPSEC_SPI  (MLX5_HASH_FIELD_SEL_SRC_IP   |\
+                                 MLX5_HASH_FIELD_SEL_DST_IP   |\
+                                 MLX5_HASH_FIELD_SEL_IPSEC_SPI)
+
         MLX5_SET(tirc, tirc, rx_hash_fn,
                  mlx5e_rx_hash_fn(priv->params.rss_hfunc));
         if (priv->params.rss_hfunc == ETH_RSS_HASH_TOP) {
@@ -2035,6 +2050,88 @@ void mlx5e_build_tir_ctx_hash(void *tirc, struct mlx5e_priv *priv)
                 MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);
                 memcpy(rss_key, priv->params.toeplitz_hash_key, len);
         }
+
+        switch (tt) {
+        case MLX5E_TT_IPV4_TCP:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV4);
+                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+                         MLX5_L4_PROT_TYPE_TCP);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_L4PORTS);
+                break;
+
+        case MLX5E_TT_IPV6_TCP:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV6);
+                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+                         MLX5_L4_PROT_TYPE_TCP);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_L4PORTS);
+                break;
+
+        case MLX5E_TT_IPV4_UDP:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV4);
+                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+                         MLX5_L4_PROT_TYPE_UDP);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_L4PORTS);
+                break;
+
+        case MLX5E_TT_IPV6_UDP:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV6);
+                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
+                         MLX5_L4_PROT_TYPE_UDP);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_L4PORTS);
+                break;
+
+        case MLX5E_TT_IPV4_IPSEC_AH:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV4);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_IPSEC_SPI);
+                break;
+
+        case MLX5E_TT_IPV6_IPSEC_AH:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV6);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_IPSEC_SPI);
+                break;
+
+        case MLX5E_TT_IPV4_IPSEC_ESP:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV4);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_IPSEC_SPI);
+                break;
+
+        case MLX5E_TT_IPV6_IPSEC_ESP:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV6);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP_IPSEC_SPI);
+                break;
+
+        case MLX5E_TT_IPV4:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV4);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP);
+                break;
+
+        case MLX5E_TT_IPV6:
+                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
+                         MLX5_L3_PROT_TYPE_IPV6);
+                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
+                         MLX5_HASH_IP);
+                break;
+        default:
+                WARN_ONCE(true, "%s: bad traffic type!\n", __func__);
+        }
 }
 
 static int mlx5e_modify_tirs_lro(struct mlx5e_priv *priv)
@@ -2404,110 +2501,13 @@ void mlx5e_cleanup_nic_tx(struct mlx5e_priv *priv)
 static void mlx5e_build_indir_tir_ctx(struct mlx5e_priv *priv, u32 *tirc,
                                       enum mlx5e_traffic_types tt)
 {
-        void *hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
-
         MLX5_SET(tirc, tirc, transport_domain, priv->mdev->mlx5e_res.td.tdn);
 
-#define MLX5_HASH_IP            (MLX5_HASH_FIELD_SEL_SRC_IP   |\
-                                 MLX5_HASH_FIELD_SEL_DST_IP)
-
-#define MLX5_HASH_IP_L4PORTS    (MLX5_HASH_FIELD_SEL_SRC_IP   |\
-                                 MLX5_HASH_FIELD_SEL_DST_IP   |\
-                                 MLX5_HASH_FIELD_SEL_L4_SPORT |\
-                                 MLX5_HASH_FIELD_SEL_L4_DPORT)
-
-#define MLX5_HASH_IP_IPSEC_SPI  (MLX5_HASH_FIELD_SEL_SRC_IP   |\
-                                 MLX5_HASH_FIELD_SEL_DST_IP   |\
-                                 MLX5_HASH_FIELD_SEL_IPSEC_SPI)
-
         mlx5e_build_tir_ctx_lro(tirc, priv);
 
         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
         MLX5_SET(tirc, tirc, indirect_table, priv->indir_rqt.rqtn);
-        mlx5e_build_tir_ctx_hash(tirc, priv);
-
-        switch (tt) {
-        case MLX5E_TT_IPV4_TCP:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV4);
-                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
-                         MLX5_L4_PROT_TYPE_TCP);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_L4PORTS);
-                break;
-
-        case MLX5E_TT_IPV6_TCP:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV6);
-                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
-                         MLX5_L4_PROT_TYPE_TCP);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_L4PORTS);
-                break;
-
-        case MLX5E_TT_IPV4_UDP:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV4);
-                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
-                         MLX5_L4_PROT_TYPE_UDP);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_L4PORTS);
-                break;
-
-        case MLX5E_TT_IPV6_UDP:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV6);
-                MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
-                         MLX5_L4_PROT_TYPE_UDP);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_L4PORTS);
-                break;
-
-        case MLX5E_TT_IPV4_IPSEC_AH:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV4);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_IPSEC_SPI);
-                break;
-
-        case MLX5E_TT_IPV6_IPSEC_AH:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV6);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_IPSEC_SPI);
-                break;
-
-        case MLX5E_TT_IPV4_IPSEC_ESP:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV4);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_IPSEC_SPI);
-                break;
-
-        case MLX5E_TT_IPV6_IPSEC_ESP:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV6);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP_IPSEC_SPI);
-                break;
-
-        case MLX5E_TT_IPV4:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV4);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP);
-                break;
-
-        case MLX5E_TT_IPV6:
-                MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
-                         MLX5_L3_PROT_TYPE_IPV6);
-                MLX5_SET(rx_hash_field_select, hfso, selected_fields,
-                         MLX5_HASH_IP);
-                break;
-        default:
-                WARN_ONCE(true,
-                          "mlx5e_build_indir_tir_ctx: bad traffic type!\n");
-        }
+        mlx5e_build_indir_tir_ctx_hash(priv, tirc, tt);
 }
 
 static void mlx5e_build_direct_tir_ctx(struct mlx5e_priv *priv, u32 *tirc,
@@ -3331,7 +3331,7 @@ static const struct net_device_ops mlx5e_netdev_ops_sriov = {
 static int mlx5e_check_required_hca_cap(struct mlx5_core_dev *mdev)
 {
         if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
         if (!MLX5_CAP_GEN(mdev, eth_net_offloads) ||
             !MLX5_CAP_GEN(mdev, nic_flow_table) ||
             !MLX5_CAP_ETH(mdev, csum_cap) ||
@@ -3343,7 +3343,7 @@ static int mlx5e_check_required_hca_cap(struct mlx5_core_dev *mdev)
                                < 3) {
                 mlx5_core_warn(mdev,
                                "Not creating net device, some required device capabilities are missing\n");
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
         }
         if (!MLX5_CAP_ETH(mdev, self_lb_en_modifiable))
                 mlx5_core_warn(mdev, "Self loop back prevention is not supported\n");
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
index 46bef6a26a8c..c5282b6aba8b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
@@ -663,6 +663,7 @@ static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
                                    __be32 *saddr,
                                    int *out_ttl)
 {
+        struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
         struct rtable *rt;
         struct neighbour *n = NULL;
         int ttl;
@@ -677,12 +678,11 @@ static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
 #else
         return -EOPNOTSUPP;
 #endif
-
-        if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev)) {
-                pr_warn("%s: can't offload, devices not on same HW e-switch\n", __func__);
-                ip_rt_put(rt);
-                return -EOPNOTSUPP;
-        }
+        /* if the egress device isn't on the same HW e-switch, we use the uplink */
+        if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev))
+                *out_dev = mlx5_eswitch_get_uplink_netdev(esw);
+        else
+                *out_dev = rt->dst.dev;
 
         ttl = ip4_dst_hoplimit(&rt->dst);
         n = dst_neigh_lookup(&rt->dst, &fl4->daddr);
@@ -693,7 +693,6 @@ static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv,
         *out_n = n;
         *saddr = fl4->saddr;
         *out_ttl = ttl;
-        *out_dev = rt->dst.dev;
 
         return 0;
 }
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
index f14d9c9ba773..d0c8bf014453 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
@@ -133,7 +133,7 @@ static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u32 vport,
 
         if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
             !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
                   vport, vlan, qos, set_flags);
@@ -353,7 +353,7 @@ static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw, int nvports)
         root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
         if (!root_ns) {
                 esw_warn(dev, "Failed to get FDB flow namespace\n");
-                return -ENOMEM;
+                return -EOPNOTSUPP;
         }
 
         flow_group_in = mlx5_vzalloc(inlen);
@@ -962,7 +962,7 @@ static int esw_vport_enable_egress_acl(struct mlx5_eswitch *esw,
         root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_EGRESS);
         if (!root_ns) {
                 esw_warn(dev, "Failed to get E-Switch egress flow namespace\n");
-                return -EIO;
+                return -EOPNOTSUPP;
         }
 
         flow_group_in = mlx5_vzalloc(inlen);
@@ -1079,7 +1079,7 @@ static int esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw,
         root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_ESW_INGRESS);
         if (!root_ns) {
                 esw_warn(dev, "Failed to get E-Switch ingress flow namespace\n");
-                return -EIO;
+                return -EOPNOTSUPP;
         }
 
         flow_group_in = mlx5_vzalloc(inlen);
@@ -1630,7 +1630,7 @@ int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
         if (!MLX5_CAP_GEN(esw->dev, eswitch_flow_table) ||
             !MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
                 esw_warn(esw->dev, "E-Switch FDB is not supported, aborting ...\n");
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
         }
 
         if (!MLX5_CAP_ESW_INGRESS_ACL(esw->dev, ft_support))
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
index 03293ed1cc22..595f7c7383b3 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
@@ -166,7 +166,7 @@ static int esw_add_vlan_action_check(struct mlx5_esw_flow_attr *attr,
         return 0;
 
 out_notsupp:
-        return -ENOTSUPP;
+        return -EOPNOTSUPP;
 }
 
 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
@@ -424,6 +424,7 @@ static int esw_create_offloads_fdb_table(struct mlx5_eswitch *esw, int nvports)
         root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
         if (!root_ns) {
                 esw_warn(dev, "Failed to get FDB flow namespace\n");
+                err = -EOPNOTSUPP;
                 goto ns_err;
         }
 
@@ -535,7 +536,7 @@ static int esw_create_offloads_table(struct mlx5_eswitch *esw)
         ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_OFFLOADS);
         if (!ns) {
                 esw_warn(esw->dev, "Failed to get offloads flow namespace\n");
-                return -ENOMEM;
+                return -EOPNOTSUPP;
         }
 
         ft_offloads = mlx5_create_flow_table(ns, 0, dev->priv.sriov.num_vfs + 2, 0, 0);
@@ -655,7 +656,7 @@ static int esw_offloads_start(struct mlx5_eswitch *esw)
                 esw_warn(esw->dev, "Failed setting eswitch to offloads, err %d\n", err);
                 err1 = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
                 if (err1)
-                        esw_warn(esw->dev, "Failed setting eswitch back to legacy, err %d\n", err);
+                        esw_warn(esw->dev, "Failed setting eswitch back to legacy, err %d\n", err1);
         }
         if (esw->offloads.inline_mode == MLX5_INLINE_MODE_NONE) {
                 if (mlx5_eswitch_inline_mode_get(esw,
@@ -674,9 +675,14 @@ int esw_offloads_init(struct mlx5_eswitch *esw, int nvports)
         int vport;
         int err;
 
+        /* disable PF RoCE so missed packets don't go through RoCE steering */
+        mlx5_dev_list_lock();
+        mlx5_remove_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
+        mlx5_dev_list_unlock();
+
         err = esw_create_offloads_fdb_table(esw, nvports);
         if (err)
-                return err;
+                goto create_fdb_err;
 
         err = esw_create_offloads_table(esw);
         if (err)
@@ -696,11 +702,6 @@ int esw_offloads_init(struct mlx5_eswitch *esw, int nvports)
                         goto err_reps;
         }
 
-        /* disable PF RoCE so missed packets don't go through RoCE steering */
-        mlx5_dev_list_lock();
-        mlx5_remove_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
-        mlx5_dev_list_unlock();
-
         return 0;
 
 err_reps:
@@ -717,6 +718,13 @@ create_fg_err:
 
 create_ft_err:
         esw_destroy_offloads_fdb_table(esw);
+
+create_fdb_err:
+        /* enable back PF RoCE */
+        mlx5_dev_list_lock();
+        mlx5_add_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
+        mlx5_dev_list_unlock();
+
         return err;
 }
 
@@ -724,11 +732,6 @@ static int esw_offloads_stop(struct mlx5_eswitch *esw)
 {
         int err, err1, num_vfs = esw->dev->priv.sriov.num_vfs;
 
-        /* enable back PF RoCE */
-        mlx5_dev_list_lock();
-        mlx5_add_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
-        mlx5_dev_list_unlock();
-
         mlx5_eswitch_disable_sriov(esw);
         err = mlx5_eswitch_enable_sriov(esw, num_vfs, SRIOV_LEGACY);
         if (err) {
@@ -738,6 +741,11 @@ static int esw_offloads_stop(struct mlx5_eswitch *esw)
                         esw_warn(esw->dev, "Failed setting eswitch back to offloads, err %d\n", err);
         }
 
+        /* enable back PF RoCE */
+        mlx5_dev_list_lock();
+        mlx5_add_dev_by_protocol(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
+        mlx5_dev_list_unlock();
+
         return err;
 }
 
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
index c4478ecd8056..b53fc85a2375 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
@@ -322,7 +322,7 @@ int mlx5_cmd_update_fte(struct mlx5_core_dev *dev,
                                                 flow_table_properties_nic_receive.
                                                 flow_modify_en);
         if (!atomic_mod_cap)
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
         opmod = 1;
 
         return  mlx5_cmd_set_fte(dev, opmod, modify_mask, ft, group_id, fte);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index 0ac7a2fc916c..6346a8f5883b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -1822,7 +1822,7 @@ static int create_anchor_flow_table(struct mlx5_flow_steering *steering)
         struct mlx5_flow_table *ft;
 
         ns = mlx5_get_flow_namespace(steering->dev, MLX5_FLOW_NAMESPACE_ANCHOR);
-        if (!ns)
+        if (WARN_ON(!ns))
                 return -EINVAL;
         ft = mlx5_create_flow_table(ns, ANCHOR_PRIO, ANCHOR_SIZE, ANCHOR_LEVEL, 0);
         if (IS_ERR(ft)) {
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index d01e9f21d469..3c315eb8d270 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -807,7 +807,7 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
                 return 0;
         }
 
-        return -ENOTSUPP;
+        return -EOPNOTSUPP;
 }
 
 
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/port.c b/drivers/net/ethernet/mellanox/mlx5/core/port.c
index d2ec9d232a70..fd12e0a377a5 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/port.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/port.c
@@ -620,7 +620,7 @@ static int mlx5_set_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *in,
         u32 out[MLX5_ST_SZ_DW(qtct_reg)];
 
         if (!MLX5_CAP_GEN(mdev, ets))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         return mlx5_core_access_reg(mdev, in, inlen, out, sizeof(out),
                                     MLX5_REG_QETCR, 0, 1);
@@ -632,7 +632,7 @@ static int mlx5_query_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *out,
         u32 in[MLX5_ST_SZ_DW(qtct_reg)];
 
         if (!MLX5_CAP_GEN(mdev, ets))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         memset(in, 0, sizeof(in));
         return mlx5_core_access_reg(mdev, in, sizeof(in), out, outlen,
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/vport.c b/drivers/net/ethernet/mellanox/mlx5/core/vport.c
index 269e4401c342..7129c30a2ab4 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/vport.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/vport.c
@@ -532,7 +532,7 @@ int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
         if (!MLX5_CAP_GEN(mdev, vport_group_manager))
                 return -EACCES;
         if (!MLX5_CAP_ESW(mdev, nic_vport_node_guid_modify))
-                return -ENOTSUPP;
+                return -EOPNOTSUPP;
 
         in = mlx5_vzalloc(inlen);
         if (!in)