diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2018-05-18 02:24:44 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-24 01:15:13 -0400 |
commit | 63e138abf0761c7ea3dcb29060bfd48a34e58ecf (patch) | |
tree | afa5ef02828d7f06a0c491c38c38dfe0b474e1cd | |
parent | e1d1a7729a62d7b79fb2ab4ac3bc6fc0ebfb6db9 (diff) |
drm/amd/pp: Fix static checker warning
error: uninitialized symbol 'xxxx'
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | 24 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 6 |
3 files changed, 14 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c index ec38c9f50a4d..7047e29755c3 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | |||
@@ -1104,10 +1104,8 @@ int atomctrl_get_voltage_evv_on_sclk( | |||
1104 | GetIndexIntoMasterTable(COMMAND, GetVoltageInfo), | 1104 | GetIndexIntoMasterTable(COMMAND, GetVoltageInfo), |
1105 | (uint32_t *)&get_voltage_info_param_space); | 1105 | (uint32_t *)&get_voltage_info_param_space); |
1106 | 1106 | ||
1107 | if (0 != result) | 1107 | *voltage = result ? 0 : |
1108 | return result; | 1108 | le16_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_2 *) |
1109 | |||
1110 | *voltage = le16_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_2 *) | ||
1111 | (&get_voltage_info_param_space))->usVoltageLevel); | 1109 | (&get_voltage_info_param_space))->usVoltageLevel); |
1112 | 1110 | ||
1113 | return result; | 1111 | return result; |
@@ -1312,8 +1310,7 @@ int atomctrl_read_efuse(struct pp_hwmgr *hwmgr, uint16_t start_index, | |||
1312 | result = amdgpu_atom_execute_table(adev->mode_info.atom_context, | 1310 | result = amdgpu_atom_execute_table(adev->mode_info.atom_context, |
1313 | GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), | 1311 | GetIndexIntoMasterTable(COMMAND, ReadEfuseValue), |
1314 | (uint32_t *)&efuse_param); | 1312 | (uint32_t *)&efuse_param); |
1315 | if (!result) | 1313 | *efuse = result ? 0 : le32_to_cpu(efuse_param.ulEfuseValue) & mask; |
1316 | *efuse = le32_to_cpu(efuse_param.ulEfuseValue) & mask; | ||
1317 | 1314 | ||
1318 | return result; | 1315 | return result; |
1319 | } | 1316 | } |
@@ -1354,11 +1351,8 @@ int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_ | |||
1354 | GetIndexIntoMasterTable(COMMAND, GetVoltageInfo), | 1351 | GetIndexIntoMasterTable(COMMAND, GetVoltageInfo), |
1355 | (uint32_t *)&get_voltage_info_param_space); | 1352 | (uint32_t *)&get_voltage_info_param_space); |
1356 | 1353 | ||
1357 | if (0 != result) | 1354 | *voltage = result ? 0 : |
1358 | return result; | 1355 | le32_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)(&get_voltage_info_param_space))->ulVoltageLevel); |
1359 | |||
1360 | *voltage = le32_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *) | ||
1361 | (&get_voltage_info_param_space))->ulVoltageLevel); | ||
1362 | 1356 | ||
1363 | return result; | 1357 | return result; |
1364 | } | 1358 | } |
@@ -1552,15 +1546,17 @@ void atomctrl_get_voltage_range(struct pp_hwmgr *hwmgr, uint32_t *max_vddc, | |||
1552 | case CHIP_FIJI: | 1546 | case CHIP_FIJI: |
1553 | *max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMaxVddc/4); | 1547 | *max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMaxVddc/4); |
1554 | *min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMinVddc/4); | 1548 | *min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMinVddc/4); |
1555 | break; | 1549 | return; |
1556 | case CHIP_POLARIS11: | 1550 | case CHIP_POLARIS11: |
1557 | case CHIP_POLARIS10: | 1551 | case CHIP_POLARIS10: |
1558 | case CHIP_POLARIS12: | 1552 | case CHIP_POLARIS12: |
1559 | *max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMaxVddc/100); | 1553 | *max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMaxVddc/100); |
1560 | *min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMinVddc/100); | 1554 | *min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMinVddc/100); |
1561 | break; | ||
1562 | default: | ||
1563 | return; | 1555 | return; |
1556 | default: | ||
1557 | break; | ||
1564 | } | 1558 | } |
1565 | } | 1559 | } |
1560 | *max_vddc = 0; | ||
1561 | *min_vddc = 0; | ||
1566 | } | 1562 | } |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 646c9e9bf681..45e9b8cb169d 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | |||
@@ -860,7 +860,8 @@ static void smu7_setup_voltage_range_from_vbios(struct pp_hwmgr *hwmgr) | |||
860 | struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table; | 860 | struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table; |
861 | struct phm_ppt_v1_information *table_info = | 861 | struct phm_ppt_v1_information *table_info = |
862 | (struct phm_ppt_v1_information *)(hwmgr->pptable); | 862 | (struct phm_ppt_v1_information *)(hwmgr->pptable); |
863 | uint32_t min_vddc, max_vddc; | 863 | uint32_t min_vddc = 0; |
864 | uint32_t max_vddc = 0; | ||
864 | 865 | ||
865 | if (!table_info) | 866 | if (!table_info) |
866 | return; | 867 | return; |
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c index 64d33b775906..d644a9bb9078 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | |||
@@ -283,11 +283,9 @@ int smu7_read_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t | |||
283 | 283 | ||
284 | result = smu7_set_smc_sram_address(hwmgr, smc_addr, limit); | 284 | result = smu7_set_smc_sram_address(hwmgr, smc_addr, limit); |
285 | 285 | ||
286 | if (result) | 286 | *value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11); |
287 | return result; | ||
288 | 287 | ||
289 | *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11); | 288 | return result; |
290 | return 0; | ||
291 | } | 289 | } |
292 | 290 | ||
293 | int smu7_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t value, uint32_t limit) | 291 | int smu7_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t value, uint32_t limit) |