drm/amdgpu: disable uvd and vce clockgating on Fiji

Doesn't work properly yet.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 1 insertions, 2 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index d94c625575b9..89f5a1ff6f43 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1443,8 +1443,7 @@ static int vi_common_early_init(void *handle)
                 break;
         case CHIP_FIJI:
                 adev->has_uvd = true;
-                adev->cg_flags = AMDGPU_CG_SUPPORT_UVD_MGCG |
-                                AMDGPU_CG_SUPPORT_VCE_MGCG;
+                adev->cg_flags = 0;
                 adev->pg_flags = 0;
                 adev->external_rev_id = adev->rev_id + 0x3c;
                 break;