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authorArun Chandran <achandran@mvista.com>2015-03-01 01:08:02 -0500
committerDavid S. Miller <davem@davemloft.net>2015-03-01 23:05:23 -0500
commit62f6924cb1543a10d05150d77f9a5e01e12c9ce1 (patch)
treeebd3ecb7379f78e673eb207f6c26d5771836e7d9
parent759c9359ae5a6ecdb74cad61a31be6805fb09617 (diff)
net: macb: Add on the fly CPU endianness detection
Program management descriptor's access mode according to the dynamically detected CPU endianness. Signed-off-by: Arun Chandran <achandran@mvista.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/cadence/macb.c22
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index 05fb36da0cff..1fe8b946243a 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1578,6 +1578,7 @@ static u32 macb_dbw(struct macb *bp)
1578static void macb_configure_dma(struct macb *bp) 1578static void macb_configure_dma(struct macb *bp)
1579{ 1579{
1580 u32 dmacfg; 1580 u32 dmacfg;
1581 u32 tmp, ncr;
1581 1582
1582 if (macb_is_gem(bp)) { 1583 if (macb_is_gem(bp)) {
1583 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); 1584 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
@@ -1586,10 +1587,23 @@ static void macb_configure_dma(struct macb *bp)
1586 dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg); 1587 dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg);
1587 dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); 1588 dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
1588 dmacfg &= ~GEM_BIT(ENDIA_PKT); 1589 dmacfg &= ~GEM_BIT(ENDIA_PKT);
1589 /* Tell the chip to byteswap descriptors on big-endian hosts */ 1590
1590#ifdef __BIG_ENDIAN 1591 /* Find the CPU endianness by using the loopback bit of net_ctrl
1591 dmacfg |= GEM_BIT(ENDIA_DESC); 1592 * register. save it first. When the CPU is in big endian we
1592#endif 1593 * need to program swaped mode for management descriptor access.
1594 */
1595 ncr = macb_readl(bp, NCR);
1596 __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR);
1597 tmp = __raw_readl(bp->regs + MACB_NCR);
1598
1599 if (tmp == MACB_BIT(LLB))
1600 dmacfg &= ~GEM_BIT(ENDIA_DESC);
1601 else
1602 dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */
1603
1604 /* Restore net_ctrl */
1605 macb_writel(bp, NCR, ncr);
1606
1593 if (bp->dev->features & NETIF_F_HW_CSUM) 1607 if (bp->dev->features & NETIF_F_HW_CSUM)
1594 dmacfg |= GEM_BIT(TXCOEN); 1608 dmacfg |= GEM_BIT(TXCOEN);
1595 else 1609 else