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authorThor Thayer <thor.thayer@linux.intel.com>2017-02-22 12:10:17 -0500
committerPhilipp Zabel <p.zabel@pengutronix.de>2017-03-15 07:19:11 -0400
commit627006820268f92b62b2bde486c76ccd0fadb671 (patch)
tree115ff7124e06bbcd7f655c3a1a74a96924994871
parent843fc75af8f5fb690656d1529b250584d8923d2c (diff)
reset: Add Altera Arria10 SR Reset Controller
This patch adds the reset controller functionality for Peripheral PHYs to the Arria10 System Resource Chip. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-rw-r--r--MAINTAINERS1
-rw-r--r--drivers/reset/Kconfig7
-rw-r--r--drivers/reset/Makefile1
-rw-r--r--drivers/reset/reset-a10sr.c138
4 files changed, 147 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 27558d547f12..0f37c5a5e1c9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,7 @@ M: Thor Thayer <thor.thayer@linux.intel.com>
653S: Maintained 653S: Maintained
654F: drivers/gpio/gpio-altera-a10sr.c 654F: drivers/gpio/gpio-altera-a10sr.c
655F: drivers/mfd/altera-a10sr.c 655F: drivers/mfd/altera-a10sr.c
656F: drivers/reset/reset-a10sr.c
656F: include/linux/mfd/altera-a10sr.h 657F: include/linux/mfd/altera-a10sr.h
657F: include/dt-bindings/reset/altr,rst-mgr-a10sr.h 658F: include/dt-bindings/reset/altr,rst-mgr-a10sr.h
658 659
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index c9e74592742b..d21c07ccc94e 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -14,6 +14,13 @@ menuconfig RESET_CONTROLLER
14 14
15if RESET_CONTROLLER 15if RESET_CONTROLLER
16 16
17config RESET_A10SR
18 tristate "Altera Arria10 System Resource Reset"
19 depends on MFD_ALTERA_A10SR
20 help
21 This option enables support for the external reset functions for
22 peripheral PHYs on the Altera Arria10 System Resource Chip.
23
17config RESET_ATH79 24config RESET_ATH79
18 bool "AR71xx Reset Driver" if COMPILE_TEST 25 bool "AR71xx Reset Driver" if COMPILE_TEST
19 default ATH79 26 default ATH79
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index c7ac1d6908ee..02a74db94339 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -2,6 +2,7 @@ obj-y += core.o
2obj-y += hisilicon/ 2obj-y += hisilicon/
3obj-$(CONFIG_ARCH_STI) += sti/ 3obj-$(CONFIG_ARCH_STI) += sti/
4obj-$(CONFIG_ARCH_TEGRA) += tegra/ 4obj-$(CONFIG_ARCH_TEGRA) += tegra/
5obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
5obj-$(CONFIG_RESET_ATH79) += reset-ath79.o 6obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
6obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o 7obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
7obj-$(CONFIG_RESET_IMX7) += reset-imx7.o 8obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
diff --git a/drivers/reset/reset-a10sr.c b/drivers/reset/reset-a10sr.c
new file mode 100644
index 000000000000..37496bd27fa2
--- /dev/null
+++ b/drivers/reset/reset-a10sr.c
@@ -0,0 +1,138 @@
1/*
2 * Copyright Intel Corporation (C) 2017. All Rights Reserved
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 *
16 * Reset driver for Altera Arria10 MAX5 System Resource Chip
17 *
18 * Adapted from reset-socfpga.c
19 */
20
21#include <linux/err.h>
22#include <linux/mfd/altera-a10sr.h>
23#include <linux/module.h>
24#include <linux/of.h>
25#include <linux/platform_device.h>
26#include <linux/reset-controller.h>
27
28#include <dt-bindings/reset/altr,rst-mgr-a10sr.h>
29
30struct a10sr_reset {
31 struct reset_controller_dev rcdev;
32 struct regmap *regmap;
33};
34
35static inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc)
36{
37 return container_of(rc, struct a10sr_reset, rcdev);
38}
39
40static inline int a10sr_reset_shift(unsigned long id)
41{
42 switch (id) {
43 case A10SR_RESET_ENET_HPS:
44 return 1;
45 case A10SR_RESET_PCIE:
46 case A10SR_RESET_FILE:
47 case A10SR_RESET_BQSPI:
48 case A10SR_RESET_USB:
49 return id + 11;
50 default:
51 return -EINVAL;
52 }
53}
54
55static int a10sr_reset_update(struct reset_controller_dev *rcdev,
56 unsigned long id, bool assert)
57{
58 struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
59 int offset = a10sr_reset_shift(id);
60 u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
61 int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
62
63 return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask);
64}
65
66static int a10sr_reset_assert(struct reset_controller_dev *rcdev,
67 unsigned long id)
68{
69 return a10sr_reset_update(rcdev, id, true);
70}
71
72static int a10sr_reset_deassert(struct reset_controller_dev *rcdev,
73 unsigned long id)
74{
75 return a10sr_reset_update(rcdev, id, false);
76}
77
78static int a10sr_reset_status(struct reset_controller_dev *rcdev,
79 unsigned long id)
80{
81 int ret;
82 struct a10sr_reset *a10r = to_a10sr_rst(rcdev);
83 int offset = a10sr_reset_shift(id);
84 u8 mask = ALTR_A10SR_REG_BIT_MASK(offset);
85 int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset);
86 unsigned int value;
87
88 ret = regmap_read(a10r->regmap, index, &value);
89 if (ret < 0)
90 return ret;
91
92 return !!(value & mask);
93}
94
95static const struct reset_control_ops a10sr_reset_ops = {
96 .assert = a10sr_reset_assert,
97 .deassert = a10sr_reset_deassert,
98 .status = a10sr_reset_status,
99};
100
101static int a10sr_reset_probe(struct platform_device *pdev)
102{
103 struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
104 struct a10sr_reset *a10r;
105
106 a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset),
107 GFP_KERNEL);
108 if (!a10r)
109 return -ENOMEM;
110
111 a10r->rcdev.owner = THIS_MODULE;
112 a10r->rcdev.nr_resets = A10SR_RESET_NUM;
113 a10r->rcdev.ops = &a10sr_reset_ops;
114 a10r->rcdev.of_node = pdev->dev.of_node;
115 a10r->regmap = a10sr->regmap;
116
117 platform_set_drvdata(pdev, a10r);
118
119 return devm_reset_controller_register(&pdev->dev, &a10r->rcdev);
120}
121
122static const struct of_device_id a10sr_reset_of_match[] = {
123 { .compatible = "altr,a10sr-reset" },
124 { },
125};
126MODULE_DEVICE_TABLE(of, a10sr_reset_of_match);
127
128static struct platform_driver a10sr_reset_driver = {
129 .probe = a10sr_reset_probe,
130 .driver = {
131 .name = "altr_a10sr_reset",
132 },
133};
134module_platform_driver(a10sr_reset_driver);
135
136MODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>");
137MODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver");
138MODULE_LICENSE("GPL v2");