aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDavid S. Miller <davem@davemloft.net>2016-02-06 02:41:56 -0500
committerDavid S. Miller <davem@davemloft.net>2016-02-06 02:41:56 -0500
commit6247fd9f6a08029003c00633ac67a848077153d2 (patch)
tree349ad94dc2e93fc6ba5234a5d3bfccf0200c454c
parent296d48568042360d0e2a6e6e91b0130acb5ca738 (diff)
parentf8db54cc4df7b065b0028f8c919e2f47983f2043 (diff)
Merge branch '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue
Jeff Kirsher says: ==================== 40GbE Intel Wired LAN Driver Updates 2016-02-03 This series contains updates to i40e and i40evf only. Kiran adds the MAC filter element to the end of the list instead of HEAD just in case there are ever any ordering issues in the future. Anjali fixes several RSS issues, first fixes the hash PCTYPE enable for X722 since it supports a broader selection of PCTYPES for TCP and UDP. Then fixes a bug in XL710, X710, and X722 support for RSS since we cannot reduce the 4-tuple for RSS for TCP/IPv4/IPv6 or UDP/IPv4/IPv6 packets since this requires a product feature change coming in a later release. Cleans up the reset code where the restart-autoneg workaround is applied, since X722 does not need the workaround, add a flag to indicate which MAC and firmware version require the workaround to be applied. Adds new device id's for X722 and code to add their support. Also adds another way to access the RSS keys and lookup table using the admin queue for X722 devices. Catherine updates the driver to replace the MAC check with a feature flag check for 100M SGMII, since it is only support on X722 devices currently. Mitch reworks the VF driver to allow channel bonding, which was not possible before this patch due to the asynchronous nature of the admin queue mechanism. Also fixes a rare case which causes a panic if the VF driver is removed during reset recovery, resolve this by setting the ring pointers to NULL after freeing them. Shannon cleans up the driver where device capabilities were defined in two different places, and neither had all the definitions, so he consolidates the definitions in the admin queue API. Also adds the new proxy-wake-on-lan capability bit available with the new X722 device. Lastly, added the new External Device Power Ability field to the get_link_status data structure by using a reserved field at the end of the structure. Jesse mimics the ixgbe driver's use of a private work queue in the i40e and i40evf drivers to avoid blocking the system work queue. Greg cleans up the driver to limit the firmware revision checks to properly handle DCB configurations from the firmware to the older devices which need these checks (specifically X710 and XL710 devices only). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e.h2
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h26
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_common.c87
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_dcb.c12
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_devids.h2
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_ethtool.c38
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_main.c97
-rw-r--r--drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c12
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h26
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40e_txrx.c16
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40evf.h1
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c57
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40evf_main.c34
-rw-r--r--drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c2
14 files changed, 282 insertions, 130 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h
index 68f2204ec6f3..53ed3bdd8363 100644
--- a/drivers/net/ethernet/intel/i40e/i40e.h
+++ b/drivers/net/ethernet/intel/i40e/i40e.h
@@ -339,6 +339,8 @@ struct i40e_pf {
339#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40) 339#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
340#define I40E_FLAG_GENEVE_OFFLOAD_CAPABLE BIT_ULL(41) 340#define I40E_FLAG_GENEVE_OFFLOAD_CAPABLE BIT_ULL(41)
341#define I40E_FLAG_NO_PCI_LINK_CHECK BIT_ULL(42) 341#define I40E_FLAG_NO_PCI_LINK_CHECK BIT_ULL(42)
342#define I40E_FLAG_100M_SGMII_CAPABLE BIT_ULL(43)
343#define I40E_FLAG_RESTART_AUTONEG BIT_ULL(44)
342#define I40E_FLAG_PF_MAC BIT_ULL(50) 344#define I40E_FLAG_PF_MAC BIT_ULL(50)
343 345
344 /* tracks features that get auto disabled by errors */ 346 /* tracks features that get auto disabled by errors */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
index b22012a446a6..0e608d2a70d5 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
@@ -220,6 +220,7 @@ enum i40e_admin_queue_opc {
220 i40e_aqc_opc_get_phy_wol_caps = 0x0621, 220 i40e_aqc_opc_get_phy_wol_caps = 0x0621,
221 i40e_aqc_opc_set_phy_debug = 0x0622, 221 i40e_aqc_opc_set_phy_debug = 0x0622,
222 i40e_aqc_opc_upload_ext_phy_fm = 0x0625, 222 i40e_aqc_opc_upload_ext_phy_fm = 0x0625,
223 i40e_aqc_opc_run_phy_activity = 0x0626,
223 224
224 /* NVM commands */ 225 /* NVM commands */
225 i40e_aqc_opc_nvm_read = 0x0701, 226 i40e_aqc_opc_nvm_read = 0x0701,
@@ -402,6 +403,7 @@ struct i40e_aqc_list_capabilities_element_resp {
402#define I40E_AQ_CAP_ID_OS2BMC_CAP 0x0004 403#define I40E_AQ_CAP_ID_OS2BMC_CAP 0x0004
403#define I40E_AQ_CAP_ID_FUNCTIONS_VALID 0x0005 404#define I40E_AQ_CAP_ID_FUNCTIONS_VALID 0x0005
404#define I40E_AQ_CAP_ID_ALTERNATE_RAM 0x0006 405#define I40E_AQ_CAP_ID_ALTERNATE_RAM 0x0006
406#define I40E_AQ_CAP_ID_WOL_AND_PROXY 0x0008
405#define I40E_AQ_CAP_ID_SRIOV 0x0012 407#define I40E_AQ_CAP_ID_SRIOV 0x0012
406#define I40E_AQ_CAP_ID_VF 0x0013 408#define I40E_AQ_CAP_ID_VF 0x0013
407#define I40E_AQ_CAP_ID_VMDQ 0x0014 409#define I40E_AQ_CAP_ID_VMDQ 0x0014
@@ -422,6 +424,7 @@ struct i40e_aqc_list_capabilities_element_resp {
422#define I40E_AQ_CAP_ID_LED 0x0061 424#define I40E_AQ_CAP_ID_LED 0x0061
423#define I40E_AQ_CAP_ID_SDP 0x0062 425#define I40E_AQ_CAP_ID_SDP 0x0062
424#define I40E_AQ_CAP_ID_MDIO 0x0063 426#define I40E_AQ_CAP_ID_MDIO 0x0063
427#define I40E_AQ_CAP_ID_WSR_PROT 0x0064
425#define I40E_AQ_CAP_ID_FLEX10 0x00F1 428#define I40E_AQ_CAP_ID_FLEX10 0x00F1
426#define I40E_AQ_CAP_ID_CEM 0x00F2 429#define I40E_AQ_CAP_ID_CEM 0x00F2
427 430
@@ -1257,9 +1260,9 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
1257 1260
1258#define I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT 9 1261#define I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT 9
1259#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK 0x1E00 1262#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK 0x1E00
1260#define I40E_AQC_ADD_CLOUD_TNL_TYPE_XVLAN 0 1263#define I40E_AQC_ADD_CLOUD_TNL_TYPE_VXLAN 0
1261#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NVGRE_OMAC 1 1264#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NVGRE_OMAC 1
1262#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NGE 2 1265#define I40E_AQC_ADD_CLOUD_TNL_TYPE_GENEVE 2
1263#define I40E_AQC_ADD_CLOUD_TNL_TYPE_IP 3 1266#define I40E_AQC_ADD_CLOUD_TNL_TYPE_IP 3
1264 1267
1265 __le32 tenant_id; 1268 __le32 tenant_id;
@@ -1755,7 +1758,12 @@ struct i40e_aqc_get_link_status {
1755 u8 config; 1758 u8 config;
1756#define I40E_AQ_CONFIG_CRC_ENA 0x04 1759#define I40E_AQ_CONFIG_CRC_ENA 0x04
1757#define I40E_AQ_CONFIG_PACING_MASK 0x78 1760#define I40E_AQ_CONFIG_PACING_MASK 0x78
1758 u8 reserved[5]; 1761 u8 external_power_ability;
1762#define I40E_AQ_LINK_POWER_CLASS_1 0x00
1763#define I40E_AQ_LINK_POWER_CLASS_2 0x01
1764#define I40E_AQ_LINK_POWER_CLASS_3 0x02
1765#define I40E_AQ_LINK_POWER_CLASS_4 0x03
1766 u8 reserved[4];
1759}; 1767};
1760 1768
1761I40E_CHECK_CMD_LENGTH(i40e_aqc_get_link_status); 1769I40E_CHECK_CMD_LENGTH(i40e_aqc_get_link_status);
@@ -1823,6 +1831,18 @@ enum i40e_aq_phy_reg_type {
1823 I40E_AQC_PHY_REG_EXERNAL_MODULE = 0x3 1831 I40E_AQC_PHY_REG_EXERNAL_MODULE = 0x3
1824}; 1832};
1825 1833
1834/* Run PHY Activity (0x0626) */
1835struct i40e_aqc_run_phy_activity {
1836 __le16 activity_id;
1837 u8 flags;
1838 u8 reserved1;
1839 __le32 control;
1840 __le32 data;
1841 u8 reserved2[4];
1842};
1843
1844I40E_CHECK_CMD_LENGTH(i40e_aqc_run_phy_activity);
1845
1826/* NVM Read command (indirect 0x0701) 1846/* NVM Read command (indirect 0x0701)
1827 * NVM Erase commands (direct 0x0702) 1847 * NVM Erase commands (direct 0x0702)
1828 * NVM Update commands (indirect 0x0703) 1848 * NVM Update commands (indirect 0x0703)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
index 6a034ddac36a..3b03a3165ca7 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_common.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
@@ -55,6 +55,8 @@ static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
55 case I40E_DEV_ID_20G_KR2_A: 55 case I40E_DEV_ID_20G_KR2_A:
56 hw->mac.type = I40E_MAC_XL710; 56 hw->mac.type = I40E_MAC_XL710;
57 break; 57 break;
58 case I40E_DEV_ID_KX_X722:
59 case I40E_DEV_ID_QSFP_X722:
58 case I40E_DEV_ID_SFP_X722: 60 case I40E_DEV_ID_SFP_X722:
59 case I40E_DEV_ID_1G_BASE_T_X722: 61 case I40E_DEV_ID_1G_BASE_T_X722:
60 case I40E_DEV_ID_10G_BASE_T_X722: 62 case I40E_DEV_ID_10G_BASE_T_X722:
@@ -2765,35 +2767,6 @@ i40e_aq_erase_nvm_exit:
2765 return status; 2767 return status;
2766} 2768}
2767 2769
2768#define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
2769#define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
2770#define I40E_DEV_FUNC_CAP_NPAR 0x03
2771#define I40E_DEV_FUNC_CAP_OS2BMC 0x04
2772#define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
2773#define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
2774#define I40E_DEV_FUNC_CAP_VF 0x13
2775#define I40E_DEV_FUNC_CAP_VMDQ 0x14
2776#define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
2777#define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
2778#define I40E_DEV_FUNC_CAP_VSI 0x17
2779#define I40E_DEV_FUNC_CAP_DCB 0x18
2780#define I40E_DEV_FUNC_CAP_FCOE 0x21
2781#define I40E_DEV_FUNC_CAP_ISCSI 0x22
2782#define I40E_DEV_FUNC_CAP_RSS 0x40
2783#define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
2784#define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
2785#define I40E_DEV_FUNC_CAP_MSIX 0x43
2786#define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
2787#define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
2788#define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
2789#define I40E_DEV_FUNC_CAP_FLEX10 0xF1
2790#define I40E_DEV_FUNC_CAP_CEM 0xF2
2791#define I40E_DEV_FUNC_CAP_IWARP 0x51
2792#define I40E_DEV_FUNC_CAP_LED 0x61
2793#define I40E_DEV_FUNC_CAP_SDP 0x62
2794#define I40E_DEV_FUNC_CAP_MDIO 0x63
2795#define I40E_DEV_FUNC_CAP_WR_CSR_PROT 0x64
2796
2797/** 2770/**
2798 * i40e_parse_discover_capabilities 2771 * i40e_parse_discover_capabilities
2799 * @hw: pointer to the hw struct 2772 * @hw: pointer to the hw struct
@@ -2832,79 +2805,79 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
2832 major_rev = cap->major_rev; 2805 major_rev = cap->major_rev;
2833 2806
2834 switch (id) { 2807 switch (id) {
2835 case I40E_DEV_FUNC_CAP_SWITCH_MODE: 2808 case I40E_AQ_CAP_ID_SWITCH_MODE:
2836 p->switch_mode = number; 2809 p->switch_mode = number;
2837 break; 2810 break;
2838 case I40E_DEV_FUNC_CAP_MGMT_MODE: 2811 case I40E_AQ_CAP_ID_MNG_MODE:
2839 p->management_mode = number; 2812 p->management_mode = number;
2840 break; 2813 break;
2841 case I40E_DEV_FUNC_CAP_NPAR: 2814 case I40E_AQ_CAP_ID_NPAR_ACTIVE:
2842 p->npar_enable = number; 2815 p->npar_enable = number;
2843 break; 2816 break;
2844 case I40E_DEV_FUNC_CAP_OS2BMC: 2817 case I40E_AQ_CAP_ID_OS2BMC_CAP:
2845 p->os2bmc = number; 2818 p->os2bmc = number;
2846 break; 2819 break;
2847 case I40E_DEV_FUNC_CAP_VALID_FUNC: 2820 case I40E_AQ_CAP_ID_FUNCTIONS_VALID:
2848 p->valid_functions = number; 2821 p->valid_functions = number;
2849 break; 2822 break;
2850 case I40E_DEV_FUNC_CAP_SRIOV_1_1: 2823 case I40E_AQ_CAP_ID_SRIOV:
2851 if (number == 1) 2824 if (number == 1)
2852 p->sr_iov_1_1 = true; 2825 p->sr_iov_1_1 = true;
2853 break; 2826 break;
2854 case I40E_DEV_FUNC_CAP_VF: 2827 case I40E_AQ_CAP_ID_VF:
2855 p->num_vfs = number; 2828 p->num_vfs = number;
2856 p->vf_base_id = logical_id; 2829 p->vf_base_id = logical_id;
2857 break; 2830 break;
2858 case I40E_DEV_FUNC_CAP_VMDQ: 2831 case I40E_AQ_CAP_ID_VMDQ:
2859 if (number == 1) 2832 if (number == 1)
2860 p->vmdq = true; 2833 p->vmdq = true;
2861 break; 2834 break;
2862 case I40E_DEV_FUNC_CAP_802_1_QBG: 2835 case I40E_AQ_CAP_ID_8021QBG:
2863 if (number == 1) 2836 if (number == 1)
2864 p->evb_802_1_qbg = true; 2837 p->evb_802_1_qbg = true;
2865 break; 2838 break;
2866 case I40E_DEV_FUNC_CAP_802_1_QBH: 2839 case I40E_AQ_CAP_ID_8021QBR:
2867 if (number == 1) 2840 if (number == 1)
2868 p->evb_802_1_qbh = true; 2841 p->evb_802_1_qbh = true;
2869 break; 2842 break;
2870 case I40E_DEV_FUNC_CAP_VSI: 2843 case I40E_AQ_CAP_ID_VSI:
2871 p->num_vsis = number; 2844 p->num_vsis = number;
2872 break; 2845 break;
2873 case I40E_DEV_FUNC_CAP_DCB: 2846 case I40E_AQ_CAP_ID_DCB:
2874 if (number == 1) { 2847 if (number == 1) {
2875 p->dcb = true; 2848 p->dcb = true;
2876 p->enabled_tcmap = logical_id; 2849 p->enabled_tcmap = logical_id;
2877 p->maxtc = phys_id; 2850 p->maxtc = phys_id;
2878 } 2851 }
2879 break; 2852 break;
2880 case I40E_DEV_FUNC_CAP_FCOE: 2853 case I40E_AQ_CAP_ID_FCOE:
2881 if (number == 1) 2854 if (number == 1)
2882 p->fcoe = true; 2855 p->fcoe = true;
2883 break; 2856 break;
2884 case I40E_DEV_FUNC_CAP_ISCSI: 2857 case I40E_AQ_CAP_ID_ISCSI:
2885 if (number == 1) 2858 if (number == 1)
2886 p->iscsi = true; 2859 p->iscsi = true;
2887 break; 2860 break;
2888 case I40E_DEV_FUNC_CAP_RSS: 2861 case I40E_AQ_CAP_ID_RSS:
2889 p->rss = true; 2862 p->rss = true;
2890 p->rss_table_size = number; 2863 p->rss_table_size = number;
2891 p->rss_table_entry_width = logical_id; 2864 p->rss_table_entry_width = logical_id;
2892 break; 2865 break;
2893 case I40E_DEV_FUNC_CAP_RX_QUEUES: 2866 case I40E_AQ_CAP_ID_RXQ:
2894 p->num_rx_qp = number; 2867 p->num_rx_qp = number;
2895 p->base_queue = phys_id; 2868 p->base_queue = phys_id;
2896 break; 2869 break;
2897 case I40E_DEV_FUNC_CAP_TX_QUEUES: 2870 case I40E_AQ_CAP_ID_TXQ:
2898 p->num_tx_qp = number; 2871 p->num_tx_qp = number;
2899 p->base_queue = phys_id; 2872 p->base_queue = phys_id;
2900 break; 2873 break;
2901 case I40E_DEV_FUNC_CAP_MSIX: 2874 case I40E_AQ_CAP_ID_MSIX:
2902 p->num_msix_vectors = number; 2875 p->num_msix_vectors = number;
2903 break; 2876 break;
2904 case I40E_DEV_FUNC_CAP_MSIX_VF: 2877 case I40E_AQ_CAP_ID_VF_MSIX:
2905 p->num_msix_vectors_vf = number; 2878 p->num_msix_vectors_vf = number;
2906 break; 2879 break;
2907 case I40E_DEV_FUNC_CAP_FLEX10: 2880 case I40E_AQ_CAP_ID_FLEX10:
2908 if (major_rev == 1) { 2881 if (major_rev == 1) {
2909 if (number == 1) { 2882 if (number == 1) {
2910 p->flex10_enable = true; 2883 p->flex10_enable = true;
@@ -2920,38 +2893,38 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
2920 p->flex10_mode = logical_id; 2893 p->flex10_mode = logical_id;
2921 p->flex10_status = phys_id; 2894 p->flex10_status = phys_id;
2922 break; 2895 break;
2923 case I40E_DEV_FUNC_CAP_CEM: 2896 case I40E_AQ_CAP_ID_CEM:
2924 if (number == 1) 2897 if (number == 1)
2925 p->mgmt_cem = true; 2898 p->mgmt_cem = true;
2926 break; 2899 break;
2927 case I40E_DEV_FUNC_CAP_IWARP: 2900 case I40E_AQ_CAP_ID_IWARP:
2928 if (number == 1) 2901 if (number == 1)
2929 p->iwarp = true; 2902 p->iwarp = true;
2930 break; 2903 break;
2931 case I40E_DEV_FUNC_CAP_LED: 2904 case I40E_AQ_CAP_ID_LED:
2932 if (phys_id < I40E_HW_CAP_MAX_GPIO) 2905 if (phys_id < I40E_HW_CAP_MAX_GPIO)
2933 p->led[phys_id] = true; 2906 p->led[phys_id] = true;
2934 break; 2907 break;
2935 case I40E_DEV_FUNC_CAP_SDP: 2908 case I40E_AQ_CAP_ID_SDP:
2936 if (phys_id < I40E_HW_CAP_MAX_GPIO) 2909 if (phys_id < I40E_HW_CAP_MAX_GPIO)
2937 p->sdp[phys_id] = true; 2910 p->sdp[phys_id] = true;
2938 break; 2911 break;
2939 case I40E_DEV_FUNC_CAP_MDIO: 2912 case I40E_AQ_CAP_ID_MDIO:
2940 if (number == 1) { 2913 if (number == 1) {
2941 p->mdio_port_num = phys_id; 2914 p->mdio_port_num = phys_id;
2942 p->mdio_port_mode = logical_id; 2915 p->mdio_port_mode = logical_id;
2943 } 2916 }
2944 break; 2917 break;
2945 case I40E_DEV_FUNC_CAP_IEEE_1588: 2918 case I40E_AQ_CAP_ID_1588:
2946 if (number == 1) 2919 if (number == 1)
2947 p->ieee_1588 = true; 2920 p->ieee_1588 = true;
2948 break; 2921 break;
2949 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR: 2922 case I40E_AQ_CAP_ID_FLOW_DIRECTOR:
2950 p->fd = true; 2923 p->fd = true;
2951 p->fd_filters_guaranteed = number; 2924 p->fd_filters_guaranteed = number;
2952 p->fd_filters_best_effort = logical_id; 2925 p->fd_filters_best_effort = logical_id;
2953 break; 2926 break;
2954 case I40E_DEV_FUNC_CAP_WR_CSR_PROT: 2927 case I40E_AQ_CAP_ID_WSR_PROT:
2955 p->wr_csr_prot = (u64)number; 2928 p->wr_csr_prot = (u64)number;
2956 p->wr_csr_prot |= (u64)logical_id << 32; 2929 p->wr_csr_prot |= (u64)logical_id << 32;
2957 break; 2930 break;
diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb.c b/drivers/net/ethernet/intel/i40e/i40e_dcb.c
index 2691277c0055..582daa7ad776 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_dcb.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_dcb.c
@@ -814,13 +814,15 @@ i40e_status i40e_get_dcb_config(struct i40e_hw *hw)
814 struct i40e_aqc_get_cee_dcb_cfg_resp cee_cfg; 814 struct i40e_aqc_get_cee_dcb_cfg_resp cee_cfg;
815 struct i40e_aqc_get_cee_dcb_cfg_v1_resp cee_v1_cfg; 815 struct i40e_aqc_get_cee_dcb_cfg_v1_resp cee_v1_cfg;
816 816
817 /* If Firmware version < v4.33 IEEE only */ 817 /* If Firmware version < v4.33 on X710/XL710, IEEE only */
818 if (((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) || 818 if ((hw->mac.type == I40E_MAC_XL710) &&
819 (hw->aq.fw_maj_ver < 4)) 819 (((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) ||
820 (hw->aq.fw_maj_ver < 4)))
820 return i40e_get_ieee_dcb_config(hw); 821 return i40e_get_ieee_dcb_config(hw);
821 822
822 /* If Firmware version == v4.33 use old CEE struct */ 823 /* If Firmware version == v4.33 on X710/XL710, use old CEE struct */
823 if ((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver == 33)) { 824 if ((hw->mac.type == I40E_MAC_XL710) &&
825 ((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver == 33))) {
824 ret = i40e_aq_get_cee_dcb_config(hw, &cee_v1_cfg, 826 ret = i40e_aq_get_cee_dcb_config(hw, &cee_v1_cfg,
825 sizeof(cee_v1_cfg), NULL); 827 sizeof(cee_v1_cfg), NULL);
826 if (!ret) { 828 if (!ret) {
diff --git a/drivers/net/ethernet/intel/i40e/i40e_devids.h b/drivers/net/ethernet/intel/i40e/i40e_devids.h
index 448ef4c17efb..f7ce5c7c9003 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_devids.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_devids.h
@@ -41,6 +41,8 @@
41#define I40E_DEV_ID_10G_BASE_T4 0x1589 41#define I40E_DEV_ID_10G_BASE_T4 0x1589
42#define I40E_DEV_ID_VF 0x154C 42#define I40E_DEV_ID_VF 0x154C
43#define I40E_DEV_ID_VF_HV 0x1571 43#define I40E_DEV_ID_VF_HV 0x1571
44#define I40E_DEV_ID_KX_X722 0x37CE
45#define I40E_DEV_ID_QSFP_X722 0x37CF
44#define I40E_DEV_ID_SFP_X722 0x37D0 46#define I40E_DEV_ID_SFP_X722 0x37D0
45#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1 47#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1
46#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2 48#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2
diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
index 29d5833e24a3..45495911c5a4 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c
@@ -340,7 +340,7 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,
340 SUPPORTED_1000baseT_Full; 340 SUPPORTED_1000baseT_Full;
341 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) 341 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
342 ecmd->advertising |= ADVERTISED_1000baseT_Full; 342 ecmd->advertising |= ADVERTISED_1000baseT_Full;
343 if (pf->hw.mac.type == I40E_MAC_X722) { 343 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {
344 ecmd->supported |= SUPPORTED_100baseT_Full; 344 ecmd->supported |= SUPPORTED_100baseT_Full;
345 if (hw_link_info->requested_speeds & 345 if (hw_link_info->requested_speeds &
346 I40E_LINK_SPEED_100MB) 346 I40E_LINK_SPEED_100MB)
@@ -411,6 +411,10 @@ static void i40e_get_settings_link_down(struct i40e_hw *hw,
411 if (pf->hw.mac.type == I40E_MAC_X722) { 411 if (pf->hw.mac.type == I40E_MAC_X722) {
412 ecmd->supported |= SUPPORTED_100baseT_Full; 412 ecmd->supported |= SUPPORTED_100baseT_Full;
413 ecmd->advertising |= ADVERTISED_100baseT_Full; 413 ecmd->advertising |= ADVERTISED_100baseT_Full;
414 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {
415 ecmd->supported |= SUPPORTED_100baseT_Full;
416 ecmd->advertising |= ADVERTISED_100baseT_Full;
417 }
414 } 418 }
415 } 419 }
416 if (phy_types & I40E_CAP_PHY_TYPE_XAUI || 420 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
@@ -2166,9 +2170,12 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2166 case TCP_V4_FLOW: 2170 case TCP_V4_FLOW:
2167 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 2171 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2168 case 0: 2172 case 0:
2169 hena &= ~BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP); 2173 return -EINVAL;
2170 break;
2171 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 2174 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2175 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2176 hena |=
2177 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2178
2172 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP); 2179 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
2173 break; 2180 break;
2174 default: 2181 default:
@@ -2178,9 +2185,12 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2178 case TCP_V6_FLOW: 2185 case TCP_V6_FLOW:
2179 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 2186 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2180 case 0: 2187 case 0:
2181 hena &= ~BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP); 2188 return -EINVAL;
2182 break;
2183 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 2189 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2190 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2191 hena |=
2192 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
2193
2184 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP); 2194 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
2185 break; 2195 break;
2186 default: 2196 default:
@@ -2190,10 +2200,13 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2190 case UDP_V4_FLOW: 2200 case UDP_V4_FLOW:
2191 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 2201 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2192 case 0: 2202 case 0:
2193 hena &= ~(BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | 2203 return -EINVAL;
2194 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));
2195 break;
2196 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 2204 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2205 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2206 hena |=
2207 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
2208 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
2209
2197 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | 2210 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
2198 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4)); 2211 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));
2199 break; 2212 break;
@@ -2204,10 +2217,13 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2204 case UDP_V6_FLOW: 2217 case UDP_V6_FLOW:
2205 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 2218 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2206 case 0: 2219 case 0:
2207 hena &= ~(BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | 2220 return -EINVAL;
2208 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));
2209 break;
2210 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 2221 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2222 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2223 hena |=
2224 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
2225 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
2226
2211 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | 2227 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
2212 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6)); 2228 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));
2213 break; 2229 break;
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index 8f3b53e0dc46..320b0491abd9 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -51,7 +51,7 @@ static const char i40e_driver_string[] =
51 51
52#define DRV_VERSION_MAJOR 1 52#define DRV_VERSION_MAJOR 1
53#define DRV_VERSION_MINOR 4 53#define DRV_VERSION_MINOR 4
54#define DRV_VERSION_BUILD 8 54#define DRV_VERSION_BUILD 10
55#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ 55#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
56 __stringify(DRV_VERSION_MINOR) "." \ 56 __stringify(DRV_VERSION_MINOR) "." \
57 __stringify(DRV_VERSION_BUILD) DRV_KERN 57 __stringify(DRV_VERSION_BUILD) DRV_KERN
@@ -90,6 +90,8 @@ static const struct pci_device_id i40e_pci_tbl[] = {
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0}, 90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0}, 91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0}, 92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0}, 95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0}, 96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0}, 97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
@@ -110,6 +112,8 @@ MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
110MODULE_LICENSE("GPL"); 112MODULE_LICENSE("GPL");
111MODULE_VERSION(DRV_VERSION); 113MODULE_VERSION(DRV_VERSION);
112 114
115static struct workqueue_struct *i40e_wq;
116
113/** 117/**
114 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code 118 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
115 * @hw: pointer to the HW structure 119 * @hw: pointer to the HW structure
@@ -295,7 +299,7 @@ static void i40e_service_event_schedule(struct i40e_pf *pf)
295 if (!test_bit(__I40E_DOWN, &pf->state) && 299 if (!test_bit(__I40E_DOWN, &pf->state) &&
296 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && 300 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
297 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) 301 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
298 schedule_work(&pf->service_task); 302 queue_work(i40e_wq, &pf->service_task);
299} 303}
300 304
301/** 305/**
@@ -1368,7 +1372,7 @@ struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1368 f->changed = true; 1372 f->changed = true;
1369 1373
1370 INIT_LIST_HEAD(&f->list); 1374 INIT_LIST_HEAD(&f->list);
1371 list_add(&f->list, &vsi->mac_filter_list); 1375 list_add_tail(&f->list, &vsi->mac_filter_list);
1372 } 1376 }
1373 1377
1374 /* increment counter and add a new flag if needed */ 1378 /* increment counter and add a new flag if needed */
@@ -6889,8 +6893,7 @@ static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6889 wr32(hw, I40E_REG_MSS, val); 6893 wr32(hw, I40E_REG_MSS, val);
6890 } 6894 }
6891 6895
6892 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 6896 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6893 (pf->hw.aq.fw_maj_ver < 4)) {
6894 msleep(75); 6897 msleep(75);
6895 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 6898 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6896 if (ret) 6899 if (ret)
@@ -7936,6 +7939,52 @@ static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7936} 7939}
7937 7940
7938/** 7941/**
7942 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
7943 * @vsi: Pointer to vsi structure
7944 * @seed: Buffter to store the hash keys
7945 * @lut: Buffer to store the lookup table entries
7946 * @lut_size: Size of buffer to store the lookup table entries
7947 *
7948 * Return 0 on success, negative on failure
7949 */
7950static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7951 u8 *lut, u16 lut_size)
7952{
7953 struct i40e_pf *pf = vsi->back;
7954 struct i40e_hw *hw = &pf->hw;
7955 int ret = 0;
7956
7957 if (seed) {
7958 ret = i40e_aq_get_rss_key(hw, vsi->id,
7959 (struct i40e_aqc_get_set_rss_key_data *)seed);
7960 if (ret) {
7961 dev_info(&pf->pdev->dev,
7962 "Cannot get RSS key, err %s aq_err %s\n",
7963 i40e_stat_str(&pf->hw, ret),
7964 i40e_aq_str(&pf->hw,
7965 pf->hw.aq.asq_last_status));
7966 return ret;
7967 }
7968 }
7969
7970 if (lut) {
7971 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
7972
7973 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
7974 if (ret) {
7975 dev_info(&pf->pdev->dev,
7976 "Cannot get RSS lut, err %s aq_err %s\n",
7977 i40e_stat_str(&pf->hw, ret),
7978 i40e_aq_str(&pf->hw,
7979 pf->hw.aq.asq_last_status));
7980 return ret;
7981 }
7982 }
7983
7984 return ret;
7985}
7986
7987/**
7939 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers 7988 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7940 * @vsi: Pointer to vsi structure 7989 * @vsi: Pointer to vsi structure
7941 * @seed: RSS hash seed 7990 * @seed: RSS hash seed
@@ -8037,7 +8086,12 @@ int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8037 */ 8086 */
8038int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size) 8087int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8039{ 8088{
8040 return i40e_get_rss_reg(vsi, seed, lut, lut_size); 8089 struct i40e_pf *pf = vsi->back;
8090
8091 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8092 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8093 else
8094 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8041} 8095}
8042 8096
8043/** 8097/**
@@ -8367,6 +8421,12 @@ static int i40e_sw_init(struct i40e_pf *pf)
8367 pf->hw.func_caps.fd_filters_best_effort; 8421 pf->hw.func_caps.fd_filters_best_effort;
8368 } 8422 }
8369 8423
8424 if (((pf->hw.mac.type == I40E_MAC_X710) ||
8425 (pf->hw.mac.type == I40E_MAC_XL710)) &&
8426 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8427 (pf->hw.aq.fw_maj_ver < 4)))
8428 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8429
8370 if (pf->hw.func_caps.vmdq) { 8430 if (pf->hw.func_caps.vmdq) {
8371 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; 8431 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8372 pf->flags |= I40E_FLAG_VMDQ_ENABLED; 8432 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
@@ -8393,6 +8453,7 @@ static int i40e_sw_init(struct i40e_pf *pf)
8393 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE | 8453 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8394 I40E_FLAG_WB_ON_ITR_CAPABLE | 8454 I40E_FLAG_WB_ON_ITR_CAPABLE |
8395 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE | 8455 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8456 I40E_FLAG_100M_SGMII_CAPABLE |
8396 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE; 8457 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8397 } 8458 }
8398 pf->eeprom_version = 0xDEAD; 8459 pf->eeprom_version = 0xDEAD;
@@ -8942,11 +9003,11 @@ static int i40e_config_netdev(struct i40e_vsi *vsi)
8942 np = netdev_priv(netdev); 9003 np = netdev_priv(netdev);
8943 np->vsi = vsi; 9004 np->vsi = vsi;
8944 9005
8945 netdev->hw_enc_features |= NETIF_F_IP_CSUM | 9006 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8946 NETIF_F_RXCSUM | 9007 NETIF_F_GSO_UDP_TUNNEL |
8947 NETIF_F_GSO_UDP_TUNNEL | 9008 NETIF_F_GSO_GRE |
8948 NETIF_F_GSO_GRE | 9009 NETIF_F_TSO |
8949 NETIF_F_TSO; 9010 0;
8950 9011
8951 netdev->features = NETIF_F_SG | 9012 netdev->features = NETIF_F_SG |
8952 NETIF_F_IP_CSUM | 9013 NETIF_F_IP_CSUM |
@@ -10904,8 +10965,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10904 wr32(hw, I40E_REG_MSS, val); 10965 wr32(hw, I40E_REG_MSS, val);
10905 } 10966 }
10906 10967
10907 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || 10968 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
10908 (pf->hw.aq.fw_maj_ver < 4)) {
10909 msleep(75); 10969 msleep(75);
10910 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL); 10970 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10911 if (err) 10971 if (err)
@@ -11413,6 +11473,16 @@ static int __init i40e_init_module(void)
11413 i40e_driver_string, i40e_driver_version_str); 11473 i40e_driver_string, i40e_driver_version_str);
11414 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); 11474 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11415 11475
11476 /* we will see if single thread per module is enough for now,
11477 * it can't be any worse than using the system workqueue which
11478 * was already single threaded
11479 */
11480 i40e_wq = create_singlethread_workqueue(i40e_driver_name);
11481 if (!i40e_wq) {
11482 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11483 return -ENOMEM;
11484 }
11485
11416 i40e_dbg_init(); 11486 i40e_dbg_init();
11417 return pci_register_driver(&i40e_driver); 11487 return pci_register_driver(&i40e_driver);
11418} 11488}
@@ -11427,6 +11497,7 @@ module_init(i40e_init_module);
11427static void __exit i40e_exit_module(void) 11497static void __exit i40e_exit_module(void)
11428{ 11498{
11429 pci_unregister_driver(&i40e_driver); 11499 pci_unregister_driver(&i40e_driver);
11500 destroy_workqueue(i40e_wq);
11430 i40e_dbg_exit(); 11501 i40e_dbg_exit();
11431} 11502}
11432module_exit(i40e_exit_module); 11503module_exit(i40e_exit_module);
diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
index 63e62f9aec6e..659d78270fdb 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
@@ -1213,9 +1213,21 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
1213 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG; 1213 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
1214 } 1214 }
1215 1215
1216 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
1217 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
1218 vfres->vf_offload_flags |=
1219 I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
1220 }
1221
1216 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) 1222 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING)
1217 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING; 1223 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
1218 1224
1225 if (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) {
1226 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
1227 vfres->vf_offload_flags |=
1228 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
1229 }
1230
1219 vfres->num_vsis = num_vsis; 1231 vfres->num_vsis = num_vsis;
1220 vfres->num_queue_pairs = vf->num_queue_pairs; 1232 vfres->num_queue_pairs = vf->num_queue_pairs;
1221 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf; 1233 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
index f5b2b369dc7c..578b1780fb08 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
@@ -220,6 +220,7 @@ enum i40e_admin_queue_opc {
220 i40e_aqc_opc_get_phy_wol_caps = 0x0621, 220 i40e_aqc_opc_get_phy_wol_caps = 0x0621,
221 i40e_aqc_opc_set_phy_debug = 0x0622, 221 i40e_aqc_opc_set_phy_debug = 0x0622,
222 i40e_aqc_opc_upload_ext_phy_fm = 0x0625, 222 i40e_aqc_opc_upload_ext_phy_fm = 0x0625,
223 i40e_aqc_opc_run_phy_activity = 0x0626,
223 224
224 /* NVM commands */ 225 /* NVM commands */
225 i40e_aqc_opc_nvm_read = 0x0701, 226 i40e_aqc_opc_nvm_read = 0x0701,
@@ -399,6 +400,7 @@ struct i40e_aqc_list_capabilities_element_resp {
399#define I40E_AQ_CAP_ID_OS2BMC_CAP 0x0004 400#define I40E_AQ_CAP_ID_OS2BMC_CAP 0x0004
400#define I40E_AQ_CAP_ID_FUNCTIONS_VALID 0x0005 401#define I40E_AQ_CAP_ID_FUNCTIONS_VALID 0x0005
401#define I40E_AQ_CAP_ID_ALTERNATE_RAM 0x0006 402#define I40E_AQ_CAP_ID_ALTERNATE_RAM 0x0006
403#define I40E_AQ_CAP_ID_WOL_AND_PROXY 0x0008
402#define I40E_AQ_CAP_ID_SRIOV 0x0012 404#define I40E_AQ_CAP_ID_SRIOV 0x0012
403#define I40E_AQ_CAP_ID_VF 0x0013 405#define I40E_AQ_CAP_ID_VF 0x0013
404#define I40E_AQ_CAP_ID_VMDQ 0x0014 406#define I40E_AQ_CAP_ID_VMDQ 0x0014
@@ -419,6 +421,7 @@ struct i40e_aqc_list_capabilities_element_resp {
419#define I40E_AQ_CAP_ID_LED 0x0061 421#define I40E_AQ_CAP_ID_LED 0x0061
420#define I40E_AQ_CAP_ID_SDP 0x0062 422#define I40E_AQ_CAP_ID_SDP 0x0062
421#define I40E_AQ_CAP_ID_MDIO 0x0063 423#define I40E_AQ_CAP_ID_MDIO 0x0063
424#define I40E_AQ_CAP_ID_WSR_PROT 0x0064
422#define I40E_AQ_CAP_ID_FLEX10 0x00F1 425#define I40E_AQ_CAP_ID_FLEX10 0x00F1
423#define I40E_AQ_CAP_ID_CEM 0x00F2 426#define I40E_AQ_CAP_ID_CEM 0x00F2
424 427
@@ -1254,9 +1257,9 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
1254 1257
1255#define I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT 9 1258#define I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT 9
1256#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK 0x1E00 1259#define I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK 0x1E00
1257#define I40E_AQC_ADD_CLOUD_TNL_TYPE_XVLAN 0 1260#define I40E_AQC_ADD_CLOUD_TNL_TYPE_VXLAN 0
1258#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NVGRE_OMAC 1 1261#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NVGRE_OMAC 1
1259#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NGE 2 1262#define I40E_AQC_ADD_CLOUD_TNL_TYPE_GENEVE 2
1260#define I40E_AQC_ADD_CLOUD_TNL_TYPE_IP 3 1263#define I40E_AQC_ADD_CLOUD_TNL_TYPE_IP 3
1261 1264
1262 __le32 tenant_id; 1265 __le32 tenant_id;
@@ -1752,7 +1755,12 @@ struct i40e_aqc_get_link_status {
1752 u8 config; 1755 u8 config;
1753#define I40E_AQ_CONFIG_CRC_ENA 0x04 1756#define I40E_AQ_CONFIG_CRC_ENA 0x04
1754#define I40E_AQ_CONFIG_PACING_MASK 0x78 1757#define I40E_AQ_CONFIG_PACING_MASK 0x78
1755 u8 reserved[5]; 1758 u8 external_power_ability;
1759#define I40E_AQ_LINK_POWER_CLASS_1 0x00
1760#define I40E_AQ_LINK_POWER_CLASS_2 0x01
1761#define I40E_AQ_LINK_POWER_CLASS_3 0x02
1762#define I40E_AQ_LINK_POWER_CLASS_4 0x03
1763 u8 reserved[4];
1756}; 1764};
1757 1765
1758I40E_CHECK_CMD_LENGTH(i40e_aqc_get_link_status); 1766I40E_CHECK_CMD_LENGTH(i40e_aqc_get_link_status);
@@ -1820,6 +1828,18 @@ enum i40e_aq_phy_reg_type {
1820 I40E_AQC_PHY_REG_EXERNAL_MODULE = 0x3 1828 I40E_AQC_PHY_REG_EXERNAL_MODULE = 0x3
1821}; 1829};
1822 1830
1831/* Run PHY Activity (0x0626) */
1832struct i40e_aqc_run_phy_activity {
1833 __le16 activity_id;
1834 u8 flags;
1835 u8 reserved1;
1836 __le32 control;
1837 __le32 data;
1838 u8 reserved2[4];
1839};
1840
1841I40E_CHECK_CMD_LENGTH(i40e_aqc_run_phy_activity);
1842
1823/* NVM Read command (indirect 0x0701) 1843/* NVM Read command (indirect 0x0701)
1824 * NVM Erase commands (direct 0x0702) 1844 * NVM Erase commands (direct 0x0702)
1825 * NVM Update commands (indirect 0x0703) 1845 * NVM Update commands (indirect 0x0703)
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
index 7a00657dacda..7d663fb61927 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
@@ -252,6 +252,22 @@ static bool i40e_clean_tx_irq(struct i40e_ring *tx_ring, int budget)
252 tx_ring->q_vector->tx.total_bytes += total_bytes; 252 tx_ring->q_vector->tx.total_bytes += total_bytes;
253 tx_ring->q_vector->tx.total_packets += total_packets; 253 tx_ring->q_vector->tx.total_packets += total_packets;
254 254
255 if (tx_ring->flags & I40E_TXR_FLAGS_WB_ON_ITR) {
256 unsigned int j = 0;
257 /* check to see if there are < 4 descriptors
258 * waiting to be written back, then kick the hardware to force
259 * them to be written back in case we stay in NAPI.
260 * In this mode on X722 we do not enable Interrupt.
261 */
262 j = i40evf_get_tx_pending(tx_ring);
263
264 if (budget &&
265 ((j / (WB_STRIDE + 1)) == 0) && (j > 0) &&
266 !test_bit(__I40E_DOWN, &tx_ring->vsi->state) &&
267 (I40E_DESC_UNUSED(tx_ring) != tx_ring->count))
268 tx_ring->arm_wb = true;
269 }
270
255 netdev_tx_completed_queue(netdev_get_tx_queue(tx_ring->netdev, 271 netdev_tx_completed_queue(netdev_get_tx_queue(tx_ring->netdev,
256 tx_ring->queue_index), 272 tx_ring->queue_index),
257 total_packets, total_bytes); 273 total_packets, total_bytes);
diff --git a/drivers/net/ethernet/intel/i40evf/i40evf.h b/drivers/net/ethernet/intel/i40evf/i40evf.h
index be1b72b93888..9e15f68d9ddd 100644
--- a/drivers/net/ethernet/intel/i40evf/i40evf.h
+++ b/drivers/net/ethernet/intel/i40evf/i40evf.h
@@ -173,6 +173,7 @@ enum i40evf_state_t {
173 __I40EVF_RESETTING, /* in reset */ 173 __I40EVF_RESETTING, /* in reset */
174 /* Below here, watchdog is running */ 174 /* Below here, watchdog is running */
175 __I40EVF_DOWN, /* ready, can be opened */ 175 __I40EVF_DOWN, /* ready, can be opened */
176 __I40EVF_DOWN_PENDING, /* descending, waiting for watchdog */
176 __I40EVF_TESTING, /* in ethtool self-test */ 177 __I40EVF_TESTING, /* in ethtool self-test */
177 __I40EVF_RUNNING, /* opened, working */ 178 __I40EVF_RUNNING, /* opened, working */
178}; 179};
diff --git a/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c b/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c
index a4c9feb589e7..bd1c2728bc5c 100644
--- a/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c
+++ b/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c
@@ -459,6 +459,7 @@ static int i40evf_set_rss_hash_opt(struct i40evf_adapter *adapter,
459 struct ethtool_rxnfc *nfc) 459 struct ethtool_rxnfc *nfc)
460{ 460{
461 struct i40e_hw *hw = &adapter->hw; 461 struct i40e_hw *hw = &adapter->hw;
462 u32 flags = adapter->vf_res->vf_offload_flags;
462 463
463 u64 hena = (u64)rd32(hw, I40E_VFQF_HENA(0)) | 464 u64 hena = (u64)rd32(hw, I40E_VFQF_HENA(0)) |
464 ((u64)rd32(hw, I40E_VFQF_HENA(1)) << 32); 465 ((u64)rd32(hw, I40E_VFQF_HENA(1)) << 32);
@@ -477,54 +478,50 @@ static int i40evf_set_rss_hash_opt(struct i40evf_adapter *adapter,
477 478
478 switch (nfc->flow_type) { 479 switch (nfc->flow_type) {
479 case TCP_V4_FLOW: 480 case TCP_V4_FLOW:
480 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 481 if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
481 case 0: 482 if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
482 hena &= ~BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP); 483 hena |=
483 break; 484 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
484 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 485
485 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP); 486 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
486 break; 487 } else {
487 default:
488 return -EINVAL; 488 return -EINVAL;
489 } 489 }
490 break; 490 break;
491 case TCP_V6_FLOW: 491 case TCP_V6_FLOW:
492 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 492 if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
493 case 0: 493 if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
494 hena &= ~BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP); 494 hena |=
495 break; 495 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
496 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 496
497 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP); 497 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
498 break; 498 } else {
499 default:
500 return -EINVAL; 499 return -EINVAL;
501 } 500 }
502 break; 501 break;
503 case UDP_V4_FLOW: 502 case UDP_V4_FLOW:
504 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 503 if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
505 case 0: 504 if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
506 hena &= ~(BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | 505 hena |=
507 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4)); 506 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
508 break; 507 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
509 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 508
510 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | 509 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
511 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4)); 510 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));
512 break; 511 } else {
513 default:
514 return -EINVAL; 512 return -EINVAL;
515 } 513 }
516 break; 514 break;
517 case UDP_V6_FLOW: 515 case UDP_V6_FLOW:
518 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 516 if (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
519 case 0: 517 if (flags & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
520 hena &= ~(BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | 518 hena |=
521 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6)); 519 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
522 break; 520 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
523 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 521
524 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | 522 hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
525 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6)); 523 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));
526 break; 524 } else {
527 default:
528 return -EINVAL; 525 return -EINVAL;
529 } 526 }
530 break; 527 break;
diff --git a/drivers/net/ethernet/intel/i40evf/i40evf_main.c b/drivers/net/ethernet/intel/i40evf/i40evf_main.c
index 94da913b151d..66964eb6b7de 100644
--- a/drivers/net/ethernet/intel/i40evf/i40evf_main.c
+++ b/drivers/net/ethernet/intel/i40evf/i40evf_main.c
@@ -69,6 +69,8 @@ MODULE_DESCRIPTION("Intel(R) XL710 X710 Virtual Function Network Driver");
69MODULE_LICENSE("GPL"); 69MODULE_LICENSE("GPL");
70MODULE_VERSION(DRV_VERSION); 70MODULE_VERSION(DRV_VERSION);
71 71
72static struct workqueue_struct *i40evf_wq;
73
72/** 74/**
73 * i40evf_allocate_dma_mem_d - OS specific memory alloc for shared code 75 * i40evf_allocate_dma_mem_d - OS specific memory alloc for shared code
74 * @hw: pointer to the HW structure 76 * @hw: pointer to the HW structure
@@ -182,7 +184,7 @@ static void i40evf_tx_timeout(struct net_device *netdev)
182 if (!(adapter->flags & (I40EVF_FLAG_RESET_PENDING | 184 if (!(adapter->flags & (I40EVF_FLAG_RESET_PENDING |
183 I40EVF_FLAG_RESET_NEEDED))) { 185 I40EVF_FLAG_RESET_NEEDED))) {
184 adapter->flags |= I40EVF_FLAG_RESET_NEEDED; 186 adapter->flags |= I40EVF_FLAG_RESET_NEEDED;
185 schedule_work(&adapter->reset_task); 187 queue_work(i40evf_wq, &adapter->reset_task);
186 } 188 }
187} 189}
188 190
@@ -1032,7 +1034,7 @@ void i40evf_down(struct i40evf_adapter *adapter)
1032 struct net_device *netdev = adapter->netdev; 1034 struct net_device *netdev = adapter->netdev;
1033 struct i40evf_mac_filter *f; 1035 struct i40evf_mac_filter *f;
1034 1036
1035 if (adapter->state == __I40EVF_DOWN) 1037 if (adapter->state <= __I40EVF_DOWN_PENDING)
1036 return; 1038 return;
1037 1039
1038 while (test_and_set_bit(__I40EVF_IN_CRITICAL_TASK, 1040 while (test_and_set_bit(__I40EVF_IN_CRITICAL_TASK,
@@ -1122,7 +1124,9 @@ static void i40evf_free_queues(struct i40evf_adapter *adapter)
1122 if (!adapter->vsi_res) 1124 if (!adapter->vsi_res)
1123 return; 1125 return;
1124 kfree(adapter->tx_rings); 1126 kfree(adapter->tx_rings);
1127 adapter->tx_rings = NULL;
1125 kfree(adapter->rx_rings); 1128 kfree(adapter->rx_rings);
1129 adapter->rx_rings = NULL;
1126} 1130}
1127 1131
1128/** 1132/**
@@ -1454,7 +1458,11 @@ static int i40evf_init_rss(struct i40evf_adapter *adapter)
1454 int ret; 1458 int ret;
1455 1459
1456 /* Enable PCTYPES for RSS, TCP/UDP with IPv4/IPv6 */ 1460 /* Enable PCTYPES for RSS, TCP/UDP with IPv4/IPv6 */
1457 hena = I40E_DEFAULT_RSS_HENA; 1461 if (adapter->vf_res->vf_offload_flags &
1462 I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
1463 hena = I40E_DEFAULT_RSS_HENA_EXPANDED;
1464 else
1465 hena = I40E_DEFAULT_RSS_HENA;
1458 wr32(hw, I40E_VFQF_HENA(0), (u32)hena); 1466 wr32(hw, I40E_VFQF_HENA(0), (u32)hena);
1459 wr32(hw, I40E_VFQF_HENA(1), (u32)(hena >> 32)); 1467 wr32(hw, I40E_VFQF_HENA(1), (u32)(hena >> 32));
1460 1468
@@ -2142,7 +2150,8 @@ static int i40evf_open(struct net_device *netdev)
2142 dev_err(&adapter->pdev->dev, "Unable to open device due to PF driver failure.\n"); 2150 dev_err(&adapter->pdev->dev, "Unable to open device due to PF driver failure.\n");
2143 return -EIO; 2151 return -EIO;
2144 } 2152 }
2145 if (adapter->state != __I40EVF_DOWN || adapter->aq_required) 2153
2154 if (adapter->state != __I40EVF_DOWN)
2146 return -EBUSY; 2155 return -EBUSY;
2147 2156
2148 /* allocate transmit descriptors */ 2157 /* allocate transmit descriptors */
@@ -2197,14 +2206,14 @@ static int i40evf_close(struct net_device *netdev)
2197{ 2206{
2198 struct i40evf_adapter *adapter = netdev_priv(netdev); 2207 struct i40evf_adapter *adapter = netdev_priv(netdev);
2199 2208
2200 if (adapter->state <= __I40EVF_DOWN) 2209 if (adapter->state <= __I40EVF_DOWN_PENDING)
2201 return 0; 2210 return 0;
2202 2211
2203 2212
2204 set_bit(__I40E_DOWN, &adapter->vsi.state); 2213 set_bit(__I40E_DOWN, &adapter->vsi.state);
2205 2214
2206 i40evf_down(adapter); 2215 i40evf_down(adapter);
2207 adapter->state = __I40EVF_DOWN; 2216 adapter->state = __I40EVF_DOWN_PENDING;
2208 i40evf_free_traffic_irqs(adapter); 2217 i40evf_free_traffic_irqs(adapter);
2209 2218
2210 return 0; 2219 return 0;
@@ -2504,8 +2513,11 @@ static void i40evf_init_task(struct work_struct *work)
2504 if (adapter->vf_res->vf_offload_flags & 2513 if (adapter->vf_res->vf_offload_flags &
2505 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) 2514 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
2506 adapter->flags |= I40EVF_FLAG_WB_ON_ITR_CAPABLE; 2515 adapter->flags |= I40EVF_FLAG_WB_ON_ITR_CAPABLE;
2507 if (!RSS_AQ(adapter)) 2516
2508 i40evf_init_rss(adapter); 2517 if (adapter->vf_res->vf_offload_flags &
2518 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
2519 adapter->flags |= I40EVF_FLAG_WB_ON_ITR_CAPABLE;
2520
2509 err = i40evf_request_misc_irq(adapter); 2521 err = i40evf_request_misc_irq(adapter);
2510 if (err) 2522 if (err)
2511 goto err_sw_init; 2523 goto err_sw_init;
@@ -2885,6 +2897,11 @@ static int __init i40evf_init_module(void)
2885 2897
2886 pr_info("%s\n", i40evf_copyright); 2898 pr_info("%s\n", i40evf_copyright);
2887 2899
2900 i40evf_wq = create_singlethread_workqueue(i40evf_driver_name);
2901 if (!i40evf_wq) {
2902 pr_err("%s: Failed to create workqueue\n", i40evf_driver_name);
2903 return -ENOMEM;
2904 }
2888 ret = pci_register_driver(&i40evf_driver); 2905 ret = pci_register_driver(&i40evf_driver);
2889 return ret; 2906 return ret;
2890} 2907}
@@ -2900,6 +2917,7 @@ module_init(i40evf_init_module);
2900static void __exit i40evf_exit_module(void) 2917static void __exit i40evf_exit_module(void)
2901{ 2918{
2902 pci_unregister_driver(&i40evf_driver); 2919 pci_unregister_driver(&i40evf_driver);
2920 destroy_workqueue(i40evf_wq);
2903} 2921}
2904 2922
2905module_exit(i40evf_exit_module); 2923module_exit(i40evf_exit_module);
diff --git a/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c b/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c
index c1c526283757..d3739cc5b608 100644
--- a/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c
+++ b/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c
@@ -804,6 +804,8 @@ void i40evf_virtchnl_completion(struct i40evf_adapter *adapter,
804 case I40E_VIRTCHNL_OP_DISABLE_QUEUES: 804 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
805 i40evf_free_all_tx_resources(adapter); 805 i40evf_free_all_tx_resources(adapter);
806 i40evf_free_all_rx_resources(adapter); 806 i40evf_free_all_rx_resources(adapter);
807 if (adapter->state == __I40EVF_DOWN_PENDING)
808 adapter->state = __I40EVF_DOWN;
807 break; 809 break;
808 case I40E_VIRTCHNL_OP_VERSION: 810 case I40E_VIRTCHNL_OP_VERSION:
809 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: 811 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: