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authorLinus Torvalds <torvalds@linux-foundation.org>2018-02-13 12:35:17 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2018-02-13 12:35:17 -0500
commit61f14c015f5be9151ba25e638d349f4d40cb7cd4 (patch)
treedd813d35d1f7426e1e568e66151b197a9c576a00
parent178e834c47b0d01352c48730235aae69898fbc02 (diff)
parent791412dafbbfd860e78983d45cf71db603a82f67 (diff)
Merge tag 'mips_4.16_2' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips
Pull MIPS fix from James Hogan: "A single change (and associated DT binding update) to allow the address of the MIPS Cluster Power Controller (CPC) to be chosen by DT, which allows SMP to work on generic MIPS kernels where the bootloader hasn't configured the CPC address (i.e. the new Ranchu platform)" * tag 'mips_4.16_2' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: MIPS: CPC: Map registers using DT in mips_cpc_default_phys_base() dt-bindings: Document mti,mips-cpc binding
-rw-r--r--Documentation/devicetree/bindings/power/mti,mips-cpc.txt8
-rw-r--r--MAINTAINERS1
-rw-r--r--arch/mips/kernel/mips-cpc.c13
3 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/power/mti,mips-cpc.txt b/Documentation/devicetree/bindings/power/mti,mips-cpc.txt
new file mode 100644
index 000000000000..c6b82511ae8a
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/mti,mips-cpc.txt
@@ -0,0 +1,8 @@
1Binding for MIPS Cluster Power Controller (CPC).
2
3This binding allows a system to specify where the CPC registers are
4located.
5
6Required properties:
7compatible : Should be "mti,mips-cpc".
8regs: Should describe the address & size of the CPC register region.
diff --git a/MAINTAINERS b/MAINTAINERS
index 3bdc260e36b7..a4dcdd35d9a3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9206,6 +9206,7 @@ MIPS GENERIC PLATFORM
9206M: Paul Burton <paul.burton@mips.com> 9206M: Paul Burton <paul.burton@mips.com>
9207L: linux-mips@linux-mips.org 9207L: linux-mips@linux-mips.org
9208S: Supported 9208S: Supported
9209F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
9209F: arch/mips/generic/ 9210F: arch/mips/generic/
9210F: arch/mips/tools/generic-board-config.sh 9211F: arch/mips/tools/generic-board-config.sh
9211 9212
diff --git a/arch/mips/kernel/mips-cpc.c b/arch/mips/kernel/mips-cpc.c
index 19c88d770054..fcf9af492d60 100644
--- a/arch/mips/kernel/mips-cpc.c
+++ b/arch/mips/kernel/mips-cpc.c
@@ -10,6 +10,8 @@
10 10
11#include <linux/errno.h> 11#include <linux/errno.h>
12#include <linux/percpu.h> 12#include <linux/percpu.h>
13#include <linux/of.h>
14#include <linux/of_address.h>
13#include <linux/spinlock.h> 15#include <linux/spinlock.h>
14 16
15#include <asm/mips-cps.h> 17#include <asm/mips-cps.h>
@@ -22,6 +24,17 @@ static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags);
22 24
23phys_addr_t __weak mips_cpc_default_phys_base(void) 25phys_addr_t __weak mips_cpc_default_phys_base(void)
24{ 26{
27 struct device_node *cpc_node;
28 struct resource res;
29 int err;
30
31 cpc_node = of_find_compatible_node(of_root, NULL, "mti,mips-cpc");
32 if (cpc_node) {
33 err = of_address_to_resource(cpc_node, 0, &res);
34 if (!err)
35 return res.start;
36 }
37
25 return 0; 38 return 0;
26} 39}
27 40