diff options
author | Chuanxiao Dong <chuanxiao.dong@intel.com> | 2017-08-01 05:47:25 -0400 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-08-01 22:07:40 -0400 |
commit | 6184cc8ddbb318758a000da68c5285fc2dd74338 (patch) | |
tree | a5c654587f6394e036f5e42726fa4674e312d2a0 | |
parent | 26a201a2ba82a801973ce29e1004b64742e81e7e (diff) |
drm/i915/gvt: change resetting to resetting_eng
Use resetting_eng to identify which engine is resetting
so the rest ones' workload won't be impacted
v2:
- use ENGINE_MASK(ring_id) instead of (1 << ring_id). (Zhenyu)
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/gvt/execlist.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/gvt.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/scheduler.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/vgpu.c | 8 |
4 files changed, 13 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c index 700050556242..cac669b2b320 100644 --- a/drivers/gpu/drm/i915/gvt/execlist.c +++ b/drivers/gpu/drm/i915/gvt/execlist.c | |||
@@ -499,10 +499,10 @@ static void release_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) | |||
499 | static int complete_execlist_workload(struct intel_vgpu_workload *workload) | 499 | static int complete_execlist_workload(struct intel_vgpu_workload *workload) |
500 | { | 500 | { |
501 | struct intel_vgpu *vgpu = workload->vgpu; | 501 | struct intel_vgpu *vgpu = workload->vgpu; |
502 | struct intel_vgpu_execlist *execlist = | 502 | int ring_id = workload->ring_id; |
503 | &vgpu->execlist[workload->ring_id]; | 503 | struct intel_vgpu_execlist *execlist = &vgpu->execlist[ring_id]; |
504 | struct intel_vgpu_workload *next_workload; | 504 | struct intel_vgpu_workload *next_workload; |
505 | struct list_head *next = workload_q_head(vgpu, workload->ring_id)->next; | 505 | struct list_head *next = workload_q_head(vgpu, ring_id)->next; |
506 | bool lite_restore = false; | 506 | bool lite_restore = false; |
507 | int ret; | 507 | int ret; |
508 | 508 | ||
@@ -512,10 +512,10 @@ static int complete_execlist_workload(struct intel_vgpu_workload *workload) | |||
512 | release_shadow_batch_buffer(workload); | 512 | release_shadow_batch_buffer(workload); |
513 | release_shadow_wa_ctx(&workload->wa_ctx); | 513 | release_shadow_wa_ctx(&workload->wa_ctx); |
514 | 514 | ||
515 | if (workload->status || vgpu->resetting) | 515 | if (workload->status || (vgpu->resetting_eng & ENGINE_MASK(ring_id))) |
516 | goto out; | 516 | goto out; |
517 | 517 | ||
518 | if (!list_empty(workload_q_head(vgpu, workload->ring_id))) { | 518 | if (!list_empty(workload_q_head(vgpu, ring_id))) { |
519 | struct execlist_ctx_descriptor_format *this_desc, *next_desc; | 519 | struct execlist_ctx_descriptor_format *this_desc, *next_desc; |
520 | 520 | ||
521 | next_workload = container_of(next, | 521 | next_workload = container_of(next, |
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index 3a74e79eac2f..d96c41aa5aa7 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h | |||
@@ -149,7 +149,7 @@ struct intel_vgpu { | |||
149 | bool active; | 149 | bool active; |
150 | bool pv_notified; | 150 | bool pv_notified; |
151 | bool failsafe; | 151 | bool failsafe; |
152 | bool resetting; | 152 | unsigned int resetting_eng; |
153 | void *sched_data; | 153 | void *sched_data; |
154 | struct vgpu_sched_ctl sched_ctl; | 154 | struct vgpu_sched_ctl sched_ctl; |
155 | 155 | ||
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 4f7057d62d88..22e08eb2d0b7 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c | |||
@@ -432,7 +432,8 @@ static void complete_current_workload(struct intel_gvt *gvt, int ring_id) | |||
432 | 432 | ||
433 | i915_gem_request_put(fetch_and_zero(&workload->req)); | 433 | i915_gem_request_put(fetch_and_zero(&workload->req)); |
434 | 434 | ||
435 | if (!workload->status && !vgpu->resetting) { | 435 | if (!workload->status && !(vgpu->resetting_eng & |
436 | ENGINE_MASK(ring_id))) { | ||
436 | update_guest_context(workload); | 437 | update_guest_context(workload); |
437 | 438 | ||
438 | for_each_set_bit(event, workload->pending_events, | 439 | for_each_set_bit(event, workload->pending_events, |
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 90c14e6e3ea0..3deadcbd5a24 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c | |||
@@ -480,11 +480,13 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr, | |||
480 | { | 480 | { |
481 | struct intel_gvt *gvt = vgpu->gvt; | 481 | struct intel_gvt *gvt = vgpu->gvt; |
482 | struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; | 482 | struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; |
483 | unsigned int resetting_eng = dmlr ? ALL_ENGINES : engine_mask; | ||
483 | 484 | ||
484 | gvt_dbg_core("------------------------------------------\n"); | 485 | gvt_dbg_core("------------------------------------------\n"); |
485 | gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n", | 486 | gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n", |
486 | vgpu->id, dmlr, engine_mask); | 487 | vgpu->id, dmlr, engine_mask); |
487 | vgpu->resetting = true; | 488 | |
489 | vgpu->resetting_eng = resetting_eng; | ||
488 | 490 | ||
489 | intel_vgpu_stop_schedule(vgpu); | 491 | intel_vgpu_stop_schedule(vgpu); |
490 | /* | 492 | /* |
@@ -497,7 +499,7 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr, | |||
497 | mutex_lock(&gvt->lock); | 499 | mutex_lock(&gvt->lock); |
498 | } | 500 | } |
499 | 501 | ||
500 | intel_vgpu_reset_execlist(vgpu, dmlr ? ALL_ENGINES : engine_mask); | 502 | intel_vgpu_reset_execlist(vgpu, resetting_eng); |
501 | 503 | ||
502 | /* full GPU reset or device model level reset */ | 504 | /* full GPU reset or device model level reset */ |
503 | if (engine_mask == ALL_ENGINES || dmlr) { | 505 | if (engine_mask == ALL_ENGINES || dmlr) { |
@@ -520,7 +522,7 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr, | |||
520 | } | 522 | } |
521 | } | 523 | } |
522 | 524 | ||
523 | vgpu->resetting = false; | 525 | vgpu->resetting_eng = 0; |
524 | gvt_dbg_core("reset vgpu%d done\n", vgpu->id); | 526 | gvt_dbg_core("reset vgpu%d done\n", vgpu->id); |
525 | gvt_dbg_core("------------------------------------------\n"); | 527 | gvt_dbg_core("------------------------------------------\n"); |
526 | } | 528 | } |