diff options
author | Heiko Stuebner <heiko@sntech.de> | 2016-04-15 20:54:52 -0400 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2016-04-15 21:03:58 -0400 |
commit | 6111413be8708a7509fd9c09817a657f6bf8f749 (patch) | |
tree | 0e2880731b24f0ed5890e0f24840272c1a484a96 | |
parent | f35f622536b8279574edc1b3d82f8f35ddd89132 (diff) |
clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
Some "please, no space before tabs" checkpatch warnings slipped through
the recent addition of the rk3399 dt-binding header, so fix them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | include/dt-bindings/clock/rk3399-cru.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h index 244746e7dc4c..f60fe6e4b16e 100644 --- a/include/dt-bindings/clock/rk3399-cru.h +++ b/include/dt-bindings/clock/rk3399-cru.h | |||
@@ -136,7 +136,7 @@ | |||
136 | #define DCLK_VOP1_DIV 183 | 136 | #define DCLK_VOP1_DIV 183 |
137 | #define DCLK_M0_PERILP 184 | 137 | #define DCLK_M0_PERILP 184 |
138 | 138 | ||
139 | #define FCLK_CM0S 190 | 139 | #define FCLK_CM0S 190 |
140 | 140 | ||
141 | /* aclk gates */ | 141 | /* aclk gates */ |
142 | #define ACLK_PERIHP 192 | 142 | #define ACLK_PERIHP 192 |
@@ -207,11 +207,11 @@ | |||
207 | #define ACLK_CORE_ADB400_CORE_B_2_CCI500 257 | 207 | #define ACLK_CORE_ADB400_CORE_B_2_CCI500 257 |
208 | #define ACLK_ADB400M_PD_CORE_L 258 | 208 | #define ACLK_ADB400M_PD_CORE_L 258 |
209 | #define ACLK_ADB400M_PD_CORE_B 259 | 209 | #define ACLK_ADB400M_PD_CORE_B 259 |
210 | #define ACLK_PERF_CORE_L 260 | 210 | #define ACLK_PERF_CORE_L 260 |
211 | #define ACLK_PERF_CORE_B 261 | 211 | #define ACLK_PERF_CORE_B 261 |
212 | #define ACLK_GIC_PRE 262 | 212 | #define ACLK_GIC_PRE 262 |
213 | #define ACLK_VOP0_PRE 263 | 213 | #define ACLK_VOP0_PRE 263 |
214 | #define ACLK_VOP1_PRE 264 | 214 | #define ACLK_VOP1_PRE 264 |
215 | 215 | ||
216 | /* pclk gates */ | 216 | /* pclk gates */ |
217 | #define PCLK_PERIHP 320 | 217 | #define PCLK_PERIHP 320 |
@@ -279,12 +279,12 @@ | |||
279 | #define PCLK_EFUSE1024S 382 | 279 | #define PCLK_EFUSE1024S 382 |
280 | #define PCLK_PMU_INTR_ARB 383 | 280 | #define PCLK_PMU_INTR_ARB 383 |
281 | #define PCLK_MAILBOX0 384 | 281 | #define PCLK_MAILBOX0 384 |
282 | #define PCLK_USBPHY_MUX_G 385 | 282 | #define PCLK_USBPHY_MUX_G 385 |
283 | #define PCLK_UPHY0_TCPHY_G 386 | 283 | #define PCLK_UPHY0_TCPHY_G 386 |
284 | #define PCLK_UPHY0_TCPD_G 387 | 284 | #define PCLK_UPHY0_TCPD_G 387 |
285 | #define PCLK_UPHY1_TCPHY_G 388 | 285 | #define PCLK_UPHY1_TCPHY_G 388 |
286 | #define PCLK_UPHY1_TCPD_G 389 | 286 | #define PCLK_UPHY1_TCPD_G 389 |
287 | #define PCLK_ALIVE 390 | 287 | #define PCLK_ALIVE 390 |
288 | 288 | ||
289 | /* hclk gates */ | 289 | /* hclk gates */ |
290 | #define HCLK_PERIHP 448 | 290 | #define HCLK_PERIHP 448 |