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authorMark Bloch <markb@mellanox.com>2018-08-28 07:18:46 -0400
committerLeon Romanovsky <leonro@mellanox.com>2018-09-05 01:10:59 -0400
commit60786f0987c0d9354e5330ee11615b16cdb448fe (patch)
tree8150bebf5c3f4f0f24a8be0d0be341778e8a8cad
parente0e7a3861b6c6b673dc93e291ef11cf5e746b0c2 (diff)
{net, RDMA}/mlx5: Rename encap to reformat packet
Renames all encap mlx5_{core,ib} code to use the new naming of packet reformat. This change doesn't introduce any function change and is needed to properly reflect the operation being done by this action. For example not only can we encapsulate a packet, but also decapsulate it. Signed-off-by: Mark Bloch <markb@mellanox.com> Reviewed-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
-rw-r--r--drivers/infiniband/hw/mlx5/devx.c6
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/cmd.c8
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h2
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/en_tc.c43
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/eswitch.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c8
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c63
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/fs_core.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h13
-rw-r--r--include/linux/mlx5/fs.h4
-rw-r--r--include/linux/mlx5/mlx5_ifc.h50
11 files changed, 107 insertions, 94 deletions
diff --git a/drivers/infiniband/hw/mlx5/devx.c b/drivers/infiniband/hw/mlx5/devx.c
index ac116d63e466..25dafa4ff6ca 100644
--- a/drivers/infiniband/hw/mlx5/devx.c
+++ b/drivers/infiniband/hw/mlx5/devx.c
@@ -284,7 +284,7 @@ static bool devx_is_obj_create_cmd(const void *in)
284 case MLX5_CMD_OP_CREATE_FLOW_TABLE: 284 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
285 case MLX5_CMD_OP_CREATE_FLOW_GROUP: 285 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
286 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER: 286 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
287 case MLX5_CMD_OP_ALLOC_ENCAP_HEADER: 287 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
288 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT: 288 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
289 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT: 289 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
290 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT: 290 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
@@ -627,9 +627,9 @@ static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
627 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, 627 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
628 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER); 628 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
629 break; 629 break;
630 case MLX5_CMD_OP_ALLOC_ENCAP_HEADER: 630 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
631 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, 631 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
632 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER); 632 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
633 break; 633 break;
634 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT: 634 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
635 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, 635 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
index 6f589b4d33d9..39750fca371d 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c
@@ -308,7 +308,7 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
308 case MLX5_CMD_OP_MODIFY_FLOW_TABLE: 308 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
309 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY: 309 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
310 case MLX5_CMD_OP_SET_FLOW_TABLE_ROOT: 310 case MLX5_CMD_OP_SET_FLOW_TABLE_ROOT:
311 case MLX5_CMD_OP_DEALLOC_ENCAP_HEADER: 311 case MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT:
312 case MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT: 312 case MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT:
313 case MLX5_CMD_OP_FPGA_DESTROY_QP: 313 case MLX5_CMD_OP_FPGA_DESTROY_QP:
314 case MLX5_CMD_OP_DESTROY_GENERAL_OBJECT: 314 case MLX5_CMD_OP_DESTROY_GENERAL_OBJECT:
@@ -427,7 +427,7 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
427 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY: 427 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
428 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER: 428 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
429 case MLX5_CMD_OP_QUERY_FLOW_COUNTER: 429 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
430 case MLX5_CMD_OP_ALLOC_ENCAP_HEADER: 430 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
431 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT: 431 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
432 case MLX5_CMD_OP_FPGA_CREATE_QP: 432 case MLX5_CMD_OP_FPGA_CREATE_QP:
433 case MLX5_CMD_OP_FPGA_MODIFY_QP: 433 case MLX5_CMD_OP_FPGA_MODIFY_QP:
@@ -601,8 +601,8 @@ const char *mlx5_command_str(int command)
601 MLX5_COMMAND_STR_CASE(DEALLOC_FLOW_COUNTER); 601 MLX5_COMMAND_STR_CASE(DEALLOC_FLOW_COUNTER);
602 MLX5_COMMAND_STR_CASE(QUERY_FLOW_COUNTER); 602 MLX5_COMMAND_STR_CASE(QUERY_FLOW_COUNTER);
603 MLX5_COMMAND_STR_CASE(MODIFY_FLOW_TABLE); 603 MLX5_COMMAND_STR_CASE(MODIFY_FLOW_TABLE);
604 MLX5_COMMAND_STR_CASE(ALLOC_ENCAP_HEADER); 604 MLX5_COMMAND_STR_CASE(ALLOC_PACKET_REFORMAT_CONTEXT);
605 MLX5_COMMAND_STR_CASE(DEALLOC_ENCAP_HEADER); 605 MLX5_COMMAND_STR_CASE(DEALLOC_PACKET_REFORMAT_CONTEXT);
606 MLX5_COMMAND_STR_CASE(ALLOC_MODIFY_HEADER_CONTEXT); 606 MLX5_COMMAND_STR_CASE(ALLOC_MODIFY_HEADER_CONTEXT);
607 MLX5_COMMAND_STR_CASE(DEALLOC_MODIFY_HEADER_CONTEXT); 607 MLX5_COMMAND_STR_CASE(DEALLOC_MODIFY_HEADER_CONTEXT);
608 MLX5_COMMAND_STR_CASE(FPGA_CREATE_QP); 608 MLX5_COMMAND_STR_CASE(FPGA_CREATE_QP);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h b/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h
index 0240aee9189e..e83dda441a81 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h
@@ -133,7 +133,7 @@ TRACE_EVENT(mlx5_fs_del_fg,
133 {MLX5_FLOW_CONTEXT_ACTION_DROP, "DROP"},\ 133 {MLX5_FLOW_CONTEXT_ACTION_DROP, "DROP"},\
134 {MLX5_FLOW_CONTEXT_ACTION_FWD_DEST, "FWD"},\ 134 {MLX5_FLOW_CONTEXT_ACTION_FWD_DEST, "FWD"},\
135 {MLX5_FLOW_CONTEXT_ACTION_COUNT, "CNT"},\ 135 {MLX5_FLOW_CONTEXT_ACTION_COUNT, "CNT"},\
136 {MLX5_FLOW_CONTEXT_ACTION_ENCAP, "ENCAP"},\ 136 {MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT, "REFORMAT"},\
137 {MLX5_FLOW_CONTEXT_ACTION_DECAP, "DECAP"},\ 137 {MLX5_FLOW_CONTEXT_ACTION_DECAP, "DECAP"},\
138 {MLX5_FLOW_CONTEXT_ACTION_MOD_HDR, "MOD_HDR"},\ 138 {MLX5_FLOW_CONTEXT_ACTION_MOD_HDR, "MOD_HDR"},\
139 {MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH, "VLAN_PUSH"},\ 139 {MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH, "VLAN_PUSH"},\
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
index 240a6fe1587e..3df8f2b90908 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
@@ -681,7 +681,7 @@ mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
681 .action = attr->action, 681 .action = attr->action,
682 .has_flow_tag = true, 682 .has_flow_tag = true,
683 .flow_tag = attr->flow_tag, 683 .flow_tag = attr->flow_tag,
684 .encap_id = 0, 684 .reformat_id = 0,
685 }; 685 };
686 struct mlx5_fc *counter = NULL; 686 struct mlx5_fc *counter = NULL;
687 struct mlx5_flow_handle *rule; 687 struct mlx5_flow_handle *rule;
@@ -829,7 +829,7 @@ mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
829 struct mlx5e_priv *out_priv; 829 struct mlx5e_priv *out_priv;
830 int err; 830 int err;
831 831
832 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) { 832 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
833 out_dev = __dev_get_by_index(dev_net(priv->netdev), 833 out_dev = __dev_get_by_index(dev_net(priv->netdev),
834 attr->parse_attr->mirred_ifindex); 834 attr->parse_attr->mirred_ifindex);
835 err = mlx5e_attach_encap(priv, &parse_attr->tun_info, 835 err = mlx5e_attach_encap(priv, &parse_attr->tun_info,
@@ -885,7 +885,7 @@ err_add_rule:
885err_mod_hdr: 885err_mod_hdr:
886 mlx5_eswitch_del_vlan_action(esw, attr); 886 mlx5_eswitch_del_vlan_action(esw, attr);
887err_add_vlan: 887err_add_vlan:
888 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) 888 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)
889 mlx5e_detach_encap(priv, flow); 889 mlx5e_detach_encap(priv, flow);
890err_attach_encap: 890err_attach_encap:
891 return rule; 891 return rule;
@@ -906,7 +906,7 @@ static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
906 906
907 mlx5_eswitch_del_vlan_action(esw, attr); 907 mlx5_eswitch_del_vlan_action(esw, attr);
908 908
909 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) { 909 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {
910 mlx5e_detach_encap(priv, flow); 910 mlx5e_detach_encap(priv, flow);
911 kvfree(attr->parse_attr); 911 kvfree(attr->parse_attr);
912 } 912 }
@@ -923,9 +923,9 @@ void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
923 struct mlx5e_tc_flow *flow; 923 struct mlx5e_tc_flow *flow;
924 int err; 924 int err;
925 925
926 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type, 926 err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
927 e->encap_size, e->encap_header, 927 e->encap_size, e->encap_header,
928 &e->encap_id); 928 &e->encap_id);
929 if (err) { 929 if (err) {
930 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n", 930 mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n",
931 err); 931 err);
@@ -979,7 +979,7 @@ void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
979 979
980 if (e->flags & MLX5_ENCAP_ENTRY_VALID) { 980 if (e->flags & MLX5_ENCAP_ENTRY_VALID) {
981 e->flags &= ~MLX5_ENCAP_ENTRY_VALID; 981 e->flags &= ~MLX5_ENCAP_ENTRY_VALID;
982 mlx5_encap_dealloc(priv->mdev, e->encap_id); 982 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
983 } 983 }
984} 984}
985 985
@@ -1048,7 +1048,7 @@ static void mlx5e_detach_encap(struct mlx5e_priv *priv,
1048 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e); 1048 mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e);
1049 1049
1050 if (e->flags & MLX5_ENCAP_ENTRY_VALID) 1050 if (e->flags & MLX5_ENCAP_ENTRY_VALID)
1051 mlx5_encap_dealloc(priv->mdev, e->encap_id); 1051 mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id);
1052 1052
1053 hash_del_rcu(&e->encap_hlist); 1053 hash_del_rcu(&e->encap_hlist);
1054 kfree(e->encap_header); 1054 kfree(e->encap_header);
@@ -2323,7 +2323,7 @@ static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2323 return -ENOMEM; 2323 return -ENOMEM;
2324 2324
2325 switch (e->tunnel_type) { 2325 switch (e->tunnel_type) {
2326 case MLX5_HEADER_TYPE_VXLAN: 2326 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2327 fl4.flowi4_proto = IPPROTO_UDP; 2327 fl4.flowi4_proto = IPPROTO_UDP;
2328 fl4.fl4_dport = tun_key->tp_dst; 2328 fl4.fl4_dport = tun_key->tp_dst;
2329 break; 2329 break;
@@ -2367,7 +2367,7 @@ static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2367 read_unlock_bh(&n->lock); 2367 read_unlock_bh(&n->lock);
2368 2368
2369 switch (e->tunnel_type) { 2369 switch (e->tunnel_type) {
2370 case MLX5_HEADER_TYPE_VXLAN: 2370 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2371 gen_vxlan_header_ipv4(out_dev, encap_header, 2371 gen_vxlan_header_ipv4(out_dev, encap_header,
2372 ipv4_encap_size, e->h_dest, tos, ttl, 2372 ipv4_encap_size, e->h_dest, tos, ttl,
2373 fl4.daddr, 2373 fl4.daddr,
@@ -2387,8 +2387,9 @@ static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv,
2387 goto out; 2387 goto out;
2388 } 2388 }
2389 2389
2390 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type, 2390 err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2391 ipv4_encap_size, encap_header, &e->encap_id); 2391 ipv4_encap_size, encap_header,
2392 &e->encap_id);
2392 if (err) 2393 if (err)
2393 goto destroy_neigh_entry; 2394 goto destroy_neigh_entry;
2394 2395
@@ -2432,7 +2433,7 @@ static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2432 return -ENOMEM; 2433 return -ENOMEM;
2433 2434
2434 switch (e->tunnel_type) { 2435 switch (e->tunnel_type) {
2435 case MLX5_HEADER_TYPE_VXLAN: 2436 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2436 fl6.flowi6_proto = IPPROTO_UDP; 2437 fl6.flowi6_proto = IPPROTO_UDP;
2437 fl6.fl6_dport = tun_key->tp_dst; 2438 fl6.fl6_dport = tun_key->tp_dst;
2438 break; 2439 break;
@@ -2476,7 +2477,7 @@ static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2476 read_unlock_bh(&n->lock); 2477 read_unlock_bh(&n->lock);
2477 2478
2478 switch (e->tunnel_type) { 2479 switch (e->tunnel_type) {
2479 case MLX5_HEADER_TYPE_VXLAN: 2480 case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:
2480 gen_vxlan_header_ipv6(out_dev, encap_header, 2481 gen_vxlan_header_ipv6(out_dev, encap_header,
2481 ipv6_encap_size, e->h_dest, tos, ttl, 2482 ipv6_encap_size, e->h_dest, tos, ttl,
2482 &fl6.daddr, 2483 &fl6.daddr,
@@ -2497,8 +2498,9 @@ static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv,
2497 goto out; 2498 goto out;
2498 } 2499 }
2499 2500
2500 err = mlx5_encap_alloc(priv->mdev, e->tunnel_type, 2501 err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type,
2501 ipv6_encap_size, encap_header, &e->encap_id); 2502 ipv6_encap_size, encap_header,
2503 &e->encap_id);
2502 if (err) 2504 if (err)
2503 goto destroy_neigh_entry; 2505 goto destroy_neigh_entry;
2504 2506
@@ -2546,7 +2548,7 @@ vxlan_encap_offload_err:
2546 2548
2547 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) && 2549 if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
2548 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) { 2550 MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
2549 tunnel_type = MLX5_HEADER_TYPE_VXLAN; 2551 tunnel_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN;
2550 } else { 2552 } else {
2551 netdev_warn(priv->netdev, 2553 netdev_warn(priv->netdev,
2552 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst)); 2554 "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst));
@@ -2721,7 +2723,7 @@ static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts,
2721 parse_attr->mirred_ifindex = out_dev->ifindex; 2723 parse_attr->mirred_ifindex = out_dev->ifindex;
2722 parse_attr->tun_info = *info; 2724 parse_attr->tun_info = *info;
2723 attr->parse_attr = parse_attr; 2725 attr->parse_attr = parse_attr;
2724 action |= MLX5_FLOW_CONTEXT_ACTION_ENCAP | 2726 action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
2725 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | 2727 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
2726 MLX5_FLOW_CONTEXT_ACTION_COUNT; 2728 MLX5_FLOW_CONTEXT_ACTION_COUNT;
2727 /* attr->out_rep is resolved when we handle encap */ 2729 /* attr->out_rep is resolved when we handle encap */
@@ -2867,7 +2869,8 @@ int mlx5e_configure_flower(struct mlx5e_priv *priv,
2867 flow->flags |= MLX5E_TC_FLOW_OFFLOADED; 2869 flow->flags |= MLX5E_TC_FLOW_OFFLOADED;
2868 2870
2869 if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) || 2871 if (!(flow->flags & MLX5E_TC_FLOW_ESWITCH) ||
2870 !(flow->esw_attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP)) 2872 !(flow->esw_attr->action &
2873 MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT))
2871 kvfree(parse_attr); 2874 kvfree(parse_attr);
2872 2875
2873 err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params); 2876 err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
index 2b252cde5cc2..525b7e43b298 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
@@ -1746,7 +1746,7 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)
1746 esw->enabled_vports = 0; 1746 esw->enabled_vports = 0;
1747 esw->mode = SRIOV_NONE; 1747 esw->mode = SRIOV_NONE;
1748 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE; 1748 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
1749 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) && 1749 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, reformat) &&
1750 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap)) 1750 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))
1751 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC; 1751 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
1752 else 1752 else
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
index ff21807a0c4b..00ec6dd72080 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
@@ -127,8 +127,8 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
127 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) 127 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
128 flow_act.modify_id = attr->mod_hdr_id; 128 flow_act.modify_id = attr->mod_hdr_id;
129 129
130 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) 130 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)
131 flow_act.encap_id = attr->encap_id; 131 flow_act.reformat_id = attr->encap_id;
132 132
133 rule = mlx5_add_flow_rules(ft, spec, &flow_act, dest, i); 133 rule = mlx5_add_flow_rules(ft, spec, &flow_act, dest, i);
134 if (IS_ERR(rule)) 134 if (IS_ERR(rule))
@@ -529,7 +529,7 @@ static int esw_create_offloads_fast_fdb_table(struct mlx5_eswitch *esw)
529 esw_size >>= 1; 529 esw_size >>= 1;
530 530
531 if (esw->offloads.encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE) 531 if (esw->offloads.encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE)
532 flags |= (MLX5_FLOW_TABLE_TUNNEL_EN_ENCAP | 532 flags |= (MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT |
533 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP); 533 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP);
534 534
535 fdb = mlx5_create_auto_grouped_flow_table(root_ns, FDB_FAST_PATH, 535 fdb = mlx5_create_auto_grouped_flow_table(root_ns, FDB_FAST_PATH,
@@ -1245,7 +1245,7 @@ int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap)
1245 return err; 1245 return err;
1246 1246
1247 if (encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE && 1247 if (encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE &&
1248 (!MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) || 1248 (!MLX5_CAP_ESW_FLOWTABLE_FDB(dev, reformat) ||
1249 !MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))) 1249 !MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap)))
1250 return -EOPNOTSUPP; 1250 return -EOPNOTSUPP;
1251 1251
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
index 1698f325a21e..4539b709db20 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
@@ -152,7 +152,7 @@ static int mlx5_cmd_create_flow_table(struct mlx5_core_dev *dev,
152 struct mlx5_flow_table *next_ft, 152 struct mlx5_flow_table *next_ft,
153 unsigned int *table_id, u32 flags) 153 unsigned int *table_id, u32 flags)
154{ 154{
155 int en_encap = !!(flags & MLX5_FLOW_TABLE_TUNNEL_EN_ENCAP); 155 int en_encap = !!(flags & MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT);
156 int en_decap = !!(flags & MLX5_FLOW_TABLE_TUNNEL_EN_DECAP); 156 int en_decap = !!(flags & MLX5_FLOW_TABLE_TUNNEL_EN_DECAP);
157 u32 out[MLX5_ST_SZ_DW(create_flow_table_out)] = {0}; 157 u32 out[MLX5_ST_SZ_DW(create_flow_table_out)] = {0};
158 u32 in[MLX5_ST_SZ_DW(create_flow_table_in)] = {0}; 158 u32 in[MLX5_ST_SZ_DW(create_flow_table_in)] = {0};
@@ -171,7 +171,7 @@ static int mlx5_cmd_create_flow_table(struct mlx5_core_dev *dev,
171 171
172 MLX5_SET(create_flow_table_in, in, flow_table_context.decap_en, 172 MLX5_SET(create_flow_table_in, in, flow_table_context.decap_en,
173 en_decap); 173 en_decap);
174 MLX5_SET(create_flow_table_in, in, flow_table_context.encap_en, 174 MLX5_SET(create_flow_table_in, in, flow_table_context.reformat_en,
175 en_encap); 175 en_encap);
176 176
177 switch (op_mod) { 177 switch (op_mod) {
@@ -344,7 +344,8 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev,
344 344
345 MLX5_SET(flow_context, in_flow_context, flow_tag, fte->action.flow_tag); 345 MLX5_SET(flow_context, in_flow_context, flow_tag, fte->action.flow_tag);
346 MLX5_SET(flow_context, in_flow_context, action, fte->action.action); 346 MLX5_SET(flow_context, in_flow_context, action, fte->action.action);
347 MLX5_SET(flow_context, in_flow_context, encap_id, fte->action.encap_id); 347 MLX5_SET(flow_context, in_flow_context, packet_reformat_id,
348 fte->action.reformat_id);
348 MLX5_SET(flow_context, in_flow_context, modify_header_id, 349 MLX5_SET(flow_context, in_flow_context, modify_header_id,
349 fte->action.modify_id); 350 fte->action.modify_id);
350 351
@@ -595,16 +596,16 @@ void mlx5_cmd_fc_bulk_get(struct mlx5_core_dev *dev,
595 *bytes = MLX5_GET64(traffic_counter, stats, octets); 596 *bytes = MLX5_GET64(traffic_counter, stats, octets);
596} 597}
597 598
598int mlx5_encap_alloc(struct mlx5_core_dev *dev, 599int mlx5_packet_reformat_alloc(struct mlx5_core_dev *dev,
599 int header_type, 600 int reformat_type,
600 size_t size, 601 size_t size,
601 void *encap_header, 602 void *reformat_data,
602 u32 *encap_id) 603 u32 *packet_reformat_id)
603{ 604{
604 int max_encap_size = MLX5_CAP_ESW(dev, max_encap_header_size); 605 int max_encap_size = MLX5_CAP_ESW(dev, max_encap_header_size);
605 u32 out[MLX5_ST_SZ_DW(alloc_encap_header_out)]; 606 u32 out[MLX5_ST_SZ_DW(alloc_packet_reformat_context_out)];
606 void *encap_header_in; 607 void *packet_reformat_context_in;
607 void *header; 608 void *reformat;
608 int inlen; 609 int inlen;
609 int err; 610 int err;
610 u32 *in; 611 u32 *in;
@@ -615,39 +616,47 @@ int mlx5_encap_alloc(struct mlx5_core_dev *dev,
615 return -EINVAL; 616 return -EINVAL;
616 } 617 }
617 618
618 in = kzalloc(MLX5_ST_SZ_BYTES(alloc_encap_header_in) + size, 619 in = kzalloc(MLX5_ST_SZ_BYTES(alloc_packet_reformat_context_in) + size,
619 GFP_KERNEL); 620 GFP_KERNEL);
620 if (!in) 621 if (!in)
621 return -ENOMEM; 622 return -ENOMEM;
622 623
623 encap_header_in = MLX5_ADDR_OF(alloc_encap_header_in, in, encap_header); 624 packet_reformat_context_in = MLX5_ADDR_OF(alloc_packet_reformat_context_in,
624 header = MLX5_ADDR_OF(encap_header_in, encap_header_in, encap_header); 625 in, packet_reformat_context);
625 inlen = header - (void *)in + size; 626 reformat = MLX5_ADDR_OF(packet_reformat_context_in,
627 packet_reformat_context_in,
628 reformat_data);
629 inlen = reformat - (void *)in + size;
626 630
627 memset(in, 0, inlen); 631 memset(in, 0, inlen);
628 MLX5_SET(alloc_encap_header_in, in, opcode, 632 MLX5_SET(alloc_packet_reformat_context_in, in, opcode,
629 MLX5_CMD_OP_ALLOC_ENCAP_HEADER); 633 MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT);
630 MLX5_SET(encap_header_in, encap_header_in, encap_header_size, size); 634 MLX5_SET(packet_reformat_context_in, packet_reformat_context_in,
631 MLX5_SET(encap_header_in, encap_header_in, header_type, header_type); 635 reformat_data_size, size);
632 memcpy(header, encap_header, size); 636 MLX5_SET(packet_reformat_context_in, packet_reformat_context_in,
637 reformat_type, reformat_type);
638 memcpy(reformat, reformat_data, size);
633 639
634 memset(out, 0, sizeof(out)); 640 memset(out, 0, sizeof(out));
635 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out)); 641 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
636 642
637 *encap_id = MLX5_GET(alloc_encap_header_out, out, encap_id); 643 *packet_reformat_id = MLX5_GET(alloc_packet_reformat_context_out,
644 out, packet_reformat_id);
638 kfree(in); 645 kfree(in);
639 return err; 646 return err;
640} 647}
641 648
642void mlx5_encap_dealloc(struct mlx5_core_dev *dev, u32 encap_id) 649void mlx5_packet_reformat_dealloc(struct mlx5_core_dev *dev,
650 u32 packet_reformat_id)
643{ 651{
644 u32 in[MLX5_ST_SZ_DW(dealloc_encap_header_in)]; 652 u32 in[MLX5_ST_SZ_DW(dealloc_packet_reformat_context_in)];
645 u32 out[MLX5_ST_SZ_DW(dealloc_encap_header_out)]; 653 u32 out[MLX5_ST_SZ_DW(dealloc_packet_reformat_context_out)];
646 654
647 memset(in, 0, sizeof(in)); 655 memset(in, 0, sizeof(in));
648 MLX5_SET(dealloc_encap_header_in, in, opcode, 656 MLX5_SET(dealloc_packet_reformat_context_in, in, opcode,
649 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER); 657 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
650 MLX5_SET(dealloc_encap_header_in, in, encap_id, encap_id); 658 MLX5_SET(dealloc_packet_reformat_context_in, in, packet_reformat_id,
659 packet_reformat_id);
651 660
652 mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); 661 mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
653} 662}
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index b7e7eb3535c7..d2b162cfe86b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -1407,7 +1407,7 @@ static bool check_conflicting_actions(u32 action1, u32 action2)
1407 return false; 1407 return false;
1408 1408
1409 if (xored_actions & (MLX5_FLOW_CONTEXT_ACTION_DROP | 1409 if (xored_actions & (MLX5_FLOW_CONTEXT_ACTION_DROP |
1410 MLX5_FLOW_CONTEXT_ACTION_ENCAP | 1410 MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
1411 MLX5_FLOW_CONTEXT_ACTION_DECAP | 1411 MLX5_FLOW_CONTEXT_ACTION_DECAP |
1412 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR | 1412 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
1413 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP | 1413 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
index 649d1bd83a1a..f3c8f51cc9c2 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
@@ -169,12 +169,13 @@ struct mlx5_core_dev *mlx5_get_next_phys_dev(struct mlx5_core_dev *dev);
169void mlx5_dev_list_lock(void); 169void mlx5_dev_list_lock(void);
170void mlx5_dev_list_unlock(void); 170void mlx5_dev_list_unlock(void);
171int mlx5_dev_list_trylock(void); 171int mlx5_dev_list_trylock(void);
172int mlx5_encap_alloc(struct mlx5_core_dev *dev, 172int mlx5_packet_reformat_alloc(struct mlx5_core_dev *dev,
173 int header_type, 173 int reformat_type,
174 size_t size, 174 size_t size,
175 void *encap_header, 175 void *reformat_data,
176 u32 *encap_id); 176 u32 *packet_reformat_id);
177void mlx5_encap_dealloc(struct mlx5_core_dev *dev, u32 encap_id); 177void mlx5_packet_reformat_dealloc(struct mlx5_core_dev *dev,
178 u32 packet_reformat_id);
178 179
179bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv); 180bool mlx5_lag_intf_add(struct mlx5_interface *intf, struct mlx5_priv *priv);
180 181
diff --git a/include/linux/mlx5/fs.h b/include/linux/mlx5/fs.h
index 0194e62ad66a..37d0c08d0966 100644
--- a/include/linux/mlx5/fs.h
+++ b/include/linux/mlx5/fs.h
@@ -45,7 +45,7 @@ enum {
45}; 45};
46 46
47enum { 47enum {
48 MLX5_FLOW_TABLE_TUNNEL_EN_ENCAP = BIT(0), 48 MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT = BIT(0),
49 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP = BIT(1), 49 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP = BIT(1),
50}; 50};
51 51
@@ -160,7 +160,7 @@ struct mlx5_flow_act {
160 u32 action; 160 u32 action;
161 bool has_flow_tag; 161 bool has_flow_tag;
162 u32 flow_tag; 162 u32 flow_tag;
163 u32 encap_id; 163 u32 reformat_id;
164 u32 modify_id; 164 u32 modify_id;
165 uintptr_t esp_id; 165 uintptr_t esp_id;
166 struct mlx5_fs_vlan vlan[MLX5_FS_VLAN_DEPTH]; 166 struct mlx5_fs_vlan vlan[MLX5_FS_VLAN_DEPTH];
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index bd725e0924e5..c79eaae28e59 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -243,8 +243,8 @@ enum {
243 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a, 243 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
244 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b, 244 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
245 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c, 245 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
246 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d, 246 MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT = 0x93d,
247 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e, 247 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT = 0x93e,
248 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940, 248 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
249 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941, 249 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
250 MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT = 0x942, 250 MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT = 0x942,
@@ -336,7 +336,7 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
336 u8 modify_root[0x1]; 336 u8 modify_root[0x1];
337 u8 identified_miss_table_mode[0x1]; 337 u8 identified_miss_table_mode[0x1];
338 u8 flow_table_modify[0x1]; 338 u8 flow_table_modify[0x1];
339 u8 encap[0x1]; 339 u8 reformat[0x1];
340 u8 decap[0x1]; 340 u8 decap[0x1];
341 u8 reserved_at_9[0x1]; 341 u8 reserved_at_9[0x1];
342 u8 pop_vlan[0x1]; 342 u8 pop_vlan[0x1];
@@ -599,7 +599,7 @@ struct mlx5_ifc_e_switch_cap_bits {
599 u8 vxlan_encap_decap[0x1]; 599 u8 vxlan_encap_decap[0x1];
600 u8 nvgre_encap_decap[0x1]; 600 u8 nvgre_encap_decap[0x1];
601 u8 reserved_at_22[0x9]; 601 u8 reserved_at_22[0x9];
602 u8 log_max_encap_headers[0x5]; 602 u8 log_max_packet_reformat_context[0x5];
603 u8 reserved_2b[0x6]; 603 u8 reserved_2b[0x6];
604 u8 max_encap_header_size[0xa]; 604 u8 max_encap_header_size[0xa];
605 605
@@ -2394,7 +2394,7 @@ enum {
2394 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2, 2394 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2395 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4, 2395 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
2396 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8, 2396 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
2397 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10, 2397 MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT = 0x10,
2398 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20, 2398 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
2399 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40, 2399 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
2400 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80, 2400 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
@@ -2427,7 +2427,7 @@ struct mlx5_ifc_flow_context_bits {
2427 u8 reserved_at_a0[0x8]; 2427 u8 reserved_at_a0[0x8];
2428 u8 flow_counter_list_size[0x18]; 2428 u8 flow_counter_list_size[0x18];
2429 2429
2430 u8 encap_id[0x20]; 2430 u8 packet_reformat_id[0x20];
2431 2431
2432 u8 modify_header_id[0x20]; 2432 u8 modify_header_id[0x20];
2433 2433
@@ -4802,19 +4802,19 @@ struct mlx5_ifc_query_eq_in_bits {
4802 u8 reserved_at_60[0x20]; 4802 u8 reserved_at_60[0x20];
4803}; 4803};
4804 4804
4805struct mlx5_ifc_encap_header_in_bits { 4805struct mlx5_ifc_packet_reformat_context_in_bits {
4806 u8 reserved_at_0[0x5]; 4806 u8 reserved_at_0[0x5];
4807 u8 header_type[0x3]; 4807 u8 reformat_type[0x3];
4808 u8 reserved_at_8[0xe]; 4808 u8 reserved_at_8[0xe];
4809 u8 encap_header_size[0xa]; 4809 u8 reformat_data_size[0xa];
4810 4810
4811 u8 reserved_at_20[0x10]; 4811 u8 reserved_at_20[0x10];
4812 u8 encap_header[2][0x8]; 4812 u8 reformat_data[2][0x8];
4813 4813
4814 u8 more_encap_header[0][0x8]; 4814 u8 more_reformat_data[0][0x8];
4815}; 4815};
4816 4816
4817struct mlx5_ifc_query_encap_header_out_bits { 4817struct mlx5_ifc_query_packet_reformat_context_out_bits {
4818 u8 status[0x8]; 4818 u8 status[0x8];
4819 u8 reserved_at_8[0x18]; 4819 u8 reserved_at_8[0x18];
4820 4820
@@ -4822,38 +4822,38 @@ struct mlx5_ifc_query_encap_header_out_bits {
4822 4822
4823 u8 reserved_at_40[0xa0]; 4823 u8 reserved_at_40[0xa0];
4824 4824
4825 struct mlx5_ifc_encap_header_in_bits encap_header[0]; 4825 struct mlx5_ifc_packet_reformat_context_in_bits packet_reformat_context[0];
4826}; 4826};
4827 4827
4828struct mlx5_ifc_query_encap_header_in_bits { 4828struct mlx5_ifc_query_packet_reformat_context_in_bits {
4829 u8 opcode[0x10]; 4829 u8 opcode[0x10];
4830 u8 reserved_at_10[0x10]; 4830 u8 reserved_at_10[0x10];
4831 4831
4832 u8 reserved_at_20[0x10]; 4832 u8 reserved_at_20[0x10];
4833 u8 op_mod[0x10]; 4833 u8 op_mod[0x10];
4834 4834
4835 u8 encap_id[0x20]; 4835 u8 packet_reformat_id[0x20];
4836 4836
4837 u8 reserved_at_60[0xa0]; 4837 u8 reserved_at_60[0xa0];
4838}; 4838};
4839 4839
4840struct mlx5_ifc_alloc_encap_header_out_bits { 4840struct mlx5_ifc_alloc_packet_reformat_context_out_bits {
4841 u8 status[0x8]; 4841 u8 status[0x8];
4842 u8 reserved_at_8[0x18]; 4842 u8 reserved_at_8[0x18];
4843 4843
4844 u8 syndrome[0x20]; 4844 u8 syndrome[0x20];
4845 4845
4846 u8 encap_id[0x20]; 4846 u8 packet_reformat_id[0x20];
4847 4847
4848 u8 reserved_at_60[0x20]; 4848 u8 reserved_at_60[0x20];
4849}; 4849};
4850 4850
4851enum { 4851enum {
4852 MLX5_HEADER_TYPE_VXLAN = 0x0, 4852 MLX5_REFORMAT_TYPE_L2_TO_VXLAN = 0x0,
4853 MLX5_HEADER_TYPE_NVGRE = 0x1, 4853 MLX5_REFORMAT_TYPE_L2_TO_NVGRE = 0x1,
4854}; 4854};
4855 4855
4856struct mlx5_ifc_alloc_encap_header_in_bits { 4856struct mlx5_ifc_alloc_packet_reformat_context_in_bits {
4857 u8 opcode[0x10]; 4857 u8 opcode[0x10];
4858 u8 reserved_at_10[0x10]; 4858 u8 reserved_at_10[0x10];
4859 4859
@@ -4862,10 +4862,10 @@ struct mlx5_ifc_alloc_encap_header_in_bits {
4862 4862
4863 u8 reserved_at_40[0xa0]; 4863 u8 reserved_at_40[0xa0];
4864 4864
4865 struct mlx5_ifc_encap_header_in_bits encap_header; 4865 struct mlx5_ifc_packet_reformat_context_in_bits packet_reformat_context;
4866}; 4866};
4867 4867
4868struct mlx5_ifc_dealloc_encap_header_out_bits { 4868struct mlx5_ifc_dealloc_packet_reformat_context_out_bits {
4869 u8 status[0x8]; 4869 u8 status[0x8];
4870 u8 reserved_at_8[0x18]; 4870 u8 reserved_at_8[0x18];
4871 4871
@@ -4874,14 +4874,14 @@ struct mlx5_ifc_dealloc_encap_header_out_bits {
4874 u8 reserved_at_40[0x40]; 4874 u8 reserved_at_40[0x40];
4875}; 4875};
4876 4876
4877struct mlx5_ifc_dealloc_encap_header_in_bits { 4877struct mlx5_ifc_dealloc_packet_reformat_context_in_bits {
4878 u8 opcode[0x10]; 4878 u8 opcode[0x10];
4879 u8 reserved_at_10[0x10]; 4879 u8 reserved_at_10[0x10];
4880 4880
4881 u8 reserved_20[0x10]; 4881 u8 reserved_20[0x10];
4882 u8 op_mod[0x10]; 4882 u8 op_mod[0x10];
4883 4883
4884 u8 encap_id[0x20]; 4884 u8 packet_reformat_id[0x20];
4885 4885
4886 u8 reserved_60[0x20]; 4886 u8 reserved_60[0x20];
4887}; 4887};
@@ -6983,7 +6983,7 @@ struct mlx5_ifc_create_flow_table_out_bits {
6983}; 6983};
6984 6984
6985struct mlx5_ifc_flow_table_context_bits { 6985struct mlx5_ifc_flow_table_context_bits {
6986 u8 encap_en[0x1]; 6986 u8 reformat_en[0x1];
6987 u8 decap_en[0x1]; 6987 u8 decap_en[0x1];
6988 u8 reserved_at_2[0x2]; 6988 u8 reserved_at_2[0x2];
6989 u8 table_miss_action[0x4]; 6989 u8 table_miss_action[0x4];