diff options
author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2016-06-17 11:14:09 -0400 |
---|---|---|
committer | Andy Gross <andy.gross@linaro.org> | 2016-06-24 23:30:17 -0400 |
commit | 604677b415031918a7c780da91c105c41347ba3e (patch) | |
tree | 3b4a19a20b51110699eea5194fe34f5ef30e3bb8 | |
parent | 9f05d8ff8a15cef16f43992ea636c98b85585417 (diff) |
arm64: dts: msm8996: add support to blsp1_spi0
This patch adds support to blsp1_spi0 which is used on some of APQ8096
based boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 675888fcda67..e0090636491d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi | |||
@@ -151,6 +151,21 @@ | |||
151 | reg = <0x300000 0x90000>; | 151 | reg = <0x300000 0x90000>; |
152 | }; | 152 | }; |
153 | 153 | ||
154 | blsp1_spi0: spi@07575000 { | ||
155 | compatible = "qcom,spi-qup-v2.2.1"; | ||
156 | reg = <0x07575000 0x600>; | ||
157 | interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; | ||
158 | clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, | ||
159 | <&gcc GCC_BLSP1_AHB_CLK>; | ||
160 | clock-names = "core", "iface"; | ||
161 | pinctrl-names = "default", "sleep"; | ||
162 | pinctrl-0 = <&blsp1_spi0_default>; | ||
163 | pinctrl-1 = <&blsp1_spi0_sleep>; | ||
164 | #address-cells = <1>; | ||
165 | #size-cells = <0>; | ||
166 | status = "disabled"; | ||
167 | }; | ||
168 | |||
154 | blsp2_i2c0: i2c@075b5000 { | 169 | blsp2_i2c0: i2c@075b5000 { |
155 | compatible = "qcom,i2c-qup-v2.2.1"; | 170 | compatible = "qcom,i2c-qup-v2.2.1"; |
156 | reg = <0x075b5000 0x1000>; | 171 | reg = <0x075b5000 0x1000>; |