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authorAdrian Hunter <adrian.hunter@intel.com>2019-06-22 05:32:45 -0400
committerArnaldo Carvalho de Melo <acme@redhat.com>2019-06-25 07:47:10 -0400
commit5fe2cf7d19c48f2b53b57e6a5786972bc1b8d738 (patch)
tree4365e1e0b8b5234bcff2024e63728a3f71702aee
parent51b091861828f5801207a00211ea4e94102389c3 (diff)
perf intel-pt: Synthesize CBR events when last seen value changes
The first core-to-bus ratio (CBR) event will not be shown if --itrace 's' option (skip initial number of events) is used, nor if time intervals are specified that do not include the start of tracing. Change the logic to record the last CBR value seen by the user, and synthesize CBR events whenever that changes. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Link: http://lkml.kernel.org/r/20190622093248.581-5-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
-rw-r--r--tools/perf/util/intel-pt.c65
1 files changed, 41 insertions, 24 deletions
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 550db6e77968..470aaae9d930 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -171,6 +171,7 @@ struct intel_pt_queue {
171 u64 last_in_cyc_cnt; 171 u64 last_in_cyc_cnt;
172 u64 last_br_insn_cnt; 172 u64 last_br_insn_cnt;
173 u64 last_br_cyc_cnt; 173 u64 last_br_cyc_cnt;
174 unsigned int cbr_seen;
174 char insn[INTEL_PT_INSN_BUF_SZ]; 175 char insn[INTEL_PT_INSN_BUF_SZ];
175}; 176};
176 177
@@ -1052,6 +1053,8 @@ static int intel_pt_setup_queue(struct intel_pt *pt,
1052 ptq->cpu = queue->cpu; 1053 ptq->cpu = queue->cpu;
1053 ptq->tid = queue->tid; 1054 ptq->tid = queue->tid;
1054 1055
1056 ptq->cbr_seen = UINT_MAX;
1057
1055 if (pt->sampling_mode && !pt->snapshot_mode && 1058 if (pt->sampling_mode && !pt->snapshot_mode &&
1056 pt->timeless_decoding) 1059 pt->timeless_decoding)
1057 ptq->step_through_buffers = true; 1060 ptq->step_through_buffers = true;
@@ -1184,6 +1187,17 @@ static inline bool intel_pt_skip_event(struct intel_pt *pt)
1184 pt->num_events++ < pt->synth_opts.initial_skip; 1187 pt->num_events++ < pt->synth_opts.initial_skip;
1185} 1188}
1186 1189
1190/*
1191 * Cannot count CBR as skipped because it won't go away until cbr == cbr_seen.
1192 * Also ensure CBR is first non-skipped event by allowing for 4 more samples
1193 * from this decoder state.
1194 */
1195static inline bool intel_pt_skip_cbr_event(struct intel_pt *pt)
1196{
1197 return pt->synth_opts.initial_skip &&
1198 pt->num_events + 4 < pt->synth_opts.initial_skip;
1199}
1200
1187static void intel_pt_prep_a_sample(struct intel_pt_queue *ptq, 1201static void intel_pt_prep_a_sample(struct intel_pt_queue *ptq,
1188 union perf_event *event, 1202 union perf_event *event,
1189 struct perf_sample *sample) 1203 struct perf_sample *sample)
@@ -1429,9 +1443,11 @@ static int intel_pt_synth_cbr_sample(struct intel_pt_queue *ptq)
1429 struct perf_synth_intel_cbr raw; 1443 struct perf_synth_intel_cbr raw;
1430 u32 flags; 1444 u32 flags;
1431 1445
1432 if (intel_pt_skip_event(pt)) 1446 if (intel_pt_skip_cbr_event(pt))
1433 return 0; 1447 return 0;
1434 1448
1449 ptq->cbr_seen = ptq->state->cbr;
1450
1435 intel_pt_prep_p_sample(pt, ptq, event, &sample); 1451 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1436 1452
1437 sample.id = ptq->pt->cbr_id; 1453 sample.id = ptq->pt->cbr_id;
@@ -1868,8 +1884,7 @@ static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1868} 1884}
1869 1885
1870#define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \ 1886#define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \
1871 INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT | \ 1887 INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT)
1872 INTEL_PT_CBR_CHG)
1873 1888
1874static int intel_pt_sample(struct intel_pt_queue *ptq) 1889static int intel_pt_sample(struct intel_pt_queue *ptq)
1875{ 1890{
@@ -1901,31 +1916,33 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)
1901 return err; 1916 return err;
1902 } 1917 }
1903 1918
1904 if (pt->sample_pwr_events && (state->type & INTEL_PT_PWR_EVT)) { 1919 if (pt->sample_pwr_events) {
1905 if (state->type & INTEL_PT_CBR_CHG) { 1920 if (ptq->state->cbr != ptq->cbr_seen) {
1906 err = intel_pt_synth_cbr_sample(ptq); 1921 err = intel_pt_synth_cbr_sample(ptq);
1907 if (err) 1922 if (err)
1908 return err; 1923 return err;
1909 } 1924 }
1910 if (state->type & INTEL_PT_MWAIT_OP) { 1925 if (state->type & INTEL_PT_PWR_EVT) {
1911 err = intel_pt_synth_mwait_sample(ptq); 1926 if (state->type & INTEL_PT_MWAIT_OP) {
1912 if (err) 1927 err = intel_pt_synth_mwait_sample(ptq);
1913 return err; 1928 if (err)
1914 } 1929 return err;
1915 if (state->type & INTEL_PT_PWR_ENTRY) { 1930 }
1916 err = intel_pt_synth_pwre_sample(ptq); 1931 if (state->type & INTEL_PT_PWR_ENTRY) {
1917 if (err) 1932 err = intel_pt_synth_pwre_sample(ptq);
1918 return err; 1933 if (err)
1919 } 1934 return err;
1920 if (state->type & INTEL_PT_EX_STOP) { 1935 }
1921 err = intel_pt_synth_exstop_sample(ptq); 1936 if (state->type & INTEL_PT_EX_STOP) {
1922 if (err) 1937 err = intel_pt_synth_exstop_sample(ptq);
1923 return err; 1938 if (err)
1924 } 1939 return err;
1925 if (state->type & INTEL_PT_PWR_EXIT) { 1940 }
1926 err = intel_pt_synth_pwrx_sample(ptq); 1941 if (state->type & INTEL_PT_PWR_EXIT) {
1927 if (err) 1942 err = intel_pt_synth_pwrx_sample(ptq);
1928 return err; 1943 if (err)
1944 return err;
1945 }
1929 } 1946 }
1930 } 1947 }
1931 1948