diff options
author | Biju Das <biju.das@bp.renesas.com> | 2018-08-07 03:57:04 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2018-08-27 09:02:13 -0400 |
commit | 5fcd4bfe03913301bab34e2934c838eb4173a475 (patch) | |
tree | ecc0344d43926d6c4a4877635b6434708e9c4695 | |
parent | bce6d67d035eeaea20dcee12b1362cebde6d9b35 (diff) |
ARM: dts: r8a77470: Add GPIO support
Describe GPIO blocks in the R8A77470 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r8a77470.dtsi | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index af65fa031d84..c053a28cd132 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi | |||
@@ -61,6 +61,97 @@ | |||
61 | #size-cells = <2>; | 61 | #size-cells = <2>; |
62 | ranges; | 62 | ranges; |
63 | 63 | ||
64 | gpio0: gpio@e6050000 { | ||
65 | compatible = "renesas,gpio-r8a77470", | ||
66 | "renesas,rcar-gen2-gpio"; | ||
67 | reg = <0 0xe6050000 0 0x50>; | ||
68 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | ||
69 | #gpio-cells = <2>; | ||
70 | gpio-controller; | ||
71 | gpio-ranges = <&pfc 0 0 23>; | ||
72 | #interrupt-cells = <2>; | ||
73 | interrupt-controller; | ||
74 | clocks = <&cpg CPG_MOD 912>; | ||
75 | power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | ||
76 | resets = <&cpg 912>; | ||
77 | }; | ||
78 | |||
79 | gpio1: gpio@e6051000 { | ||
80 | compatible = "renesas,gpio-r8a77470", | ||
81 | "renesas,rcar-gen2-gpio"; | ||
82 | reg = <0 0xe6051000 0 0x50>; | ||
83 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | ||
84 | #gpio-cells = <2>; | ||
85 | gpio-controller; | ||
86 | gpio-ranges = <&pfc 0 32 23>; | ||
87 | #interrupt-cells = <2>; | ||
88 | interrupt-controller; | ||
89 | clocks = <&cpg CPG_MOD 911>; | ||
90 | power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | ||
91 | resets = <&cpg 911>; | ||
92 | }; | ||
93 | |||
94 | gpio2: gpio@e6052000 { | ||
95 | compatible = "renesas,gpio-r8a77470", | ||
96 | "renesas,rcar-gen2-gpio"; | ||
97 | reg = <0 0xe6052000 0 0x50>; | ||
98 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | ||
99 | #gpio-cells = <2>; | ||
100 | gpio-controller; | ||
101 | gpio-ranges = <&pfc 0 64 32>; | ||
102 | #interrupt-cells = <2>; | ||
103 | interrupt-controller; | ||
104 | clocks = <&cpg CPG_MOD 910>; | ||
105 | power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | ||
106 | resets = <&cpg 910>; | ||
107 | }; | ||
108 | |||
109 | gpio3: gpio@e6053000 { | ||
110 | compatible = "renesas,gpio-r8a77470", | ||
111 | "renesas,rcar-gen2-gpio"; | ||
112 | reg = <0 0xe6053000 0 0x50>; | ||
113 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | ||
114 | #gpio-cells = <2>; | ||
115 | gpio-controller; | ||
116 | gpio-ranges = <&pfc 0 96 30>; | ||
117 | gpio-reserved-ranges = <17 10>; | ||
118 | #interrupt-cells = <2>; | ||
119 | interrupt-controller; | ||
120 | clocks = <&cpg CPG_MOD 909>; | ||
121 | power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | ||
122 | resets = <&cpg 909>; | ||
123 | }; | ||
124 | |||
125 | gpio4: gpio@e6054000 { | ||
126 | compatible = "renesas,gpio-r8a77470", | ||
127 | "renesas,rcar-gen2-gpio"; | ||
128 | reg = <0 0xe6054000 0 0x50>; | ||
129 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | ||
130 | #gpio-cells = <2>; | ||
131 | gpio-controller; | ||
132 | gpio-ranges = <&pfc 0 128 26>; | ||
133 | #interrupt-cells = <2>; | ||
134 | interrupt-controller; | ||
135 | clocks = <&cpg CPG_MOD 908>; | ||
136 | power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | ||
137 | resets = <&cpg 908>; | ||
138 | }; | ||
139 | |||
140 | gpio5: gpio@e6055000 { | ||
141 | compatible = "renesas,gpio-r8a77470", | ||
142 | "renesas,rcar-gen2-gpio"; | ||
143 | reg = <0 0xe6055000 0 0x50>; | ||
144 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | ||
145 | #gpio-cells = <2>; | ||
146 | gpio-controller; | ||
147 | gpio-ranges = <&pfc 0 160 32>; | ||
148 | #interrupt-cells = <2>; | ||
149 | interrupt-controller; | ||
150 | clocks = <&cpg CPG_MOD 907>; | ||
151 | power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | ||
152 | resets = <&cpg 907>; | ||
153 | }; | ||
154 | |||
64 | pfc: pin-controller@e6060000 { | 155 | pfc: pin-controller@e6060000 { |
65 | compatible = "renesas,pfc-r8a77470"; | 156 | compatible = "renesas,pfc-r8a77470"; |
66 | reg = <0 0xe6060000 0 0x118>; | 157 | reg = <0 0xe6060000 0 0x118>; |