diff options
author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2015-08-24 19:48:44 -0400 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2015-08-26 02:55:48 -0400 |
commit | 5f8b253147c27b8244451ee28aeb3429c5aa2e52 (patch) | |
tree | 7f2a6a02d0bf0f9a9e7750081d03d5d147ccb659 | |
parent | e2d6cf7f3696c87546f7fefe9bac79ee09db4bef (diff) |
drm/i915/skl: Update DDI buffer translation programming.
SKL-Y can now use the same programming for all VccIO values after an
adjustment to I_boost. SKL-U DP table adjustments.
1. Remove SKL Y 0.95V from "SKL H and S" columns in all tables. The
other SKL Y column removes the "0.85V VccIO" so it now applies to all
voltages.
2. DP table changes SKL U 400mV+0db dword 0 value from 2016h to 201Bh.
3. DP table changes SKL U 600mv+0db dword 0 value from 2016h to 201Bh.
4. DP table increases I_boost to level 3 for SKL Y 400mv+9.5db.
v2: Fix compilation warnings as pointed by Paulo.
Reference: Graphics Spec Change r97962
Cc: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[Jani: reformatted commit message for shorter lines.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 75 |
1 files changed, 25 insertions, 50 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 6cfe65d6a8cf..19004557c868 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -128,7 +128,7 @@ static const struct ddi_buf_trans bdw_ddi_translations_hdmi[] = { | |||
128 | { 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */ | 128 | { 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */ |
129 | }; | 129 | }; |
130 | 130 | ||
131 | /* Skylake H, S, and Skylake Y with 0.95V VccIO */ | 131 | /* Skylake H and S */ |
132 | static const struct ddi_buf_trans skl_ddi_translations_dp[] = { | 132 | static const struct ddi_buf_trans skl_ddi_translations_dp[] = { |
133 | { 0x00002016, 0x000000A0, 0x0 }, | 133 | { 0x00002016, 0x000000A0, 0x0 }, |
134 | { 0x00005012, 0x0000009B, 0x0 }, | 134 | { 0x00005012, 0x0000009B, 0x0 }, |
@@ -143,23 +143,23 @@ static const struct ddi_buf_trans skl_ddi_translations_dp[] = { | |||
143 | 143 | ||
144 | /* Skylake U */ | 144 | /* Skylake U */ |
145 | static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = { | 145 | static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = { |
146 | { 0x00002016, 0x000000A2, 0x0 }, | 146 | { 0x0000201B, 0x000000A2, 0x0 }, |
147 | { 0x00005012, 0x00000088, 0x0 }, | 147 | { 0x00005012, 0x00000088, 0x0 }, |
148 | { 0x00007011, 0x00000087, 0x0 }, | 148 | { 0x00007011, 0x00000087, 0x0 }, |
149 | { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */ | 149 | { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost level 0x1 */ |
150 | { 0x00002016, 0x0000009D, 0x0 }, | 150 | { 0x0000201B, 0x0000009D, 0x0 }, |
151 | { 0x00005012, 0x000000C7, 0x0 }, | 151 | { 0x00005012, 0x000000C7, 0x0 }, |
152 | { 0x00007011, 0x000000C7, 0x0 }, | 152 | { 0x00007011, 0x000000C7, 0x0 }, |
153 | { 0x00002016, 0x00000088, 0x0 }, | 153 | { 0x00002016, 0x00000088, 0x0 }, |
154 | { 0x00005012, 0x000000C7, 0x0 }, | 154 | { 0x00005012, 0x000000C7, 0x0 }, |
155 | }; | 155 | }; |
156 | 156 | ||
157 | /* Skylake Y with 0.85V VccIO */ | 157 | /* Skylake Y */ |
158 | static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = { | 158 | static const struct ddi_buf_trans skl_y_ddi_translations_dp[] = { |
159 | { 0x00000018, 0x000000A2, 0x0 }, | 159 | { 0x00000018, 0x000000A2, 0x0 }, |
160 | { 0x00005012, 0x00000088, 0x0 }, | 160 | { 0x00005012, 0x00000088, 0x0 }, |
161 | { 0x00007011, 0x00000087, 0x0 }, | 161 | { 0x00007011, 0x00000087, 0x0 }, |
162 | { 0x80009010, 0x000000C7, 0x1 }, /* Uses I_boost */ | 162 | { 0x80009010, 0x000000C7, 0x3 }, /* Uses I_boost level 0x3 */ |
163 | { 0x00000018, 0x0000009D, 0x0 }, | 163 | { 0x00000018, 0x0000009D, 0x0 }, |
164 | { 0x00005012, 0x000000C7, 0x0 }, | 164 | { 0x00005012, 0x000000C7, 0x0 }, |
165 | { 0x00007011, 0x000000C7, 0x0 }, | 165 | { 0x00007011, 0x000000C7, 0x0 }, |
@@ -168,7 +168,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_dp[] = { | |||
168 | }; | 168 | }; |
169 | 169 | ||
170 | /* | 170 | /* |
171 | * Skylake H and S, and Skylake Y with 0.95V VccIO | 171 | * Skylake H and S |
172 | * eDP 1.4 low vswing translation parameters | 172 | * eDP 1.4 low vswing translation parameters |
173 | */ | 173 | */ |
174 | static const struct ddi_buf_trans skl_ddi_translations_edp[] = { | 174 | static const struct ddi_buf_trans skl_ddi_translations_edp[] = { |
@@ -202,10 +202,10 @@ static const struct ddi_buf_trans skl_u_ddi_translations_edp[] = { | |||
202 | }; | 202 | }; |
203 | 203 | ||
204 | /* | 204 | /* |
205 | * Skylake Y with 0.95V VccIO | 205 | * Skylake Y |
206 | * eDP 1.4 low vswing translation parameters | 206 | * eDP 1.4 low vswing translation parameters |
207 | */ | 207 | */ |
208 | static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = { | 208 | static const struct ddi_buf_trans skl_y_ddi_translations_edp[] = { |
209 | { 0x00000018, 0x000000A8, 0x0 }, | 209 | { 0x00000018, 0x000000A8, 0x0 }, |
210 | { 0x00004013, 0x000000AB, 0x0 }, | 210 | { 0x00004013, 0x000000AB, 0x0 }, |
211 | { 0x00007011, 0x000000A4, 0x0 }, | 211 | { 0x00007011, 0x000000A4, 0x0 }, |
@@ -218,7 +218,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_edp[] = { | |||
218 | { 0x00000018, 0x0000008A, 0x0 }, | 218 | { 0x00000018, 0x0000008A, 0x0 }, |
219 | }; | 219 | }; |
220 | 220 | ||
221 | /* Skylake H, S and U, and Skylake Y with 0.95V VccIO */ | 221 | /* Skylake U, H and S */ |
222 | static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = { | 222 | static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = { |
223 | { 0x00000018, 0x000000AC, 0x0 }, | 223 | { 0x00000018, 0x000000AC, 0x0 }, |
224 | { 0x00005012, 0x0000009D, 0x0 }, | 224 | { 0x00005012, 0x0000009D, 0x0 }, |
@@ -233,8 +233,8 @@ static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = { | |||
233 | { 0x00000018, 0x000000C7, 0x0 }, | 233 | { 0x00000018, 0x000000C7, 0x0 }, |
234 | }; | 234 | }; |
235 | 235 | ||
236 | /* Skylake Y with 0.85V VccIO */ | 236 | /* Skylake Y */ |
237 | static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = { | 237 | static const struct ddi_buf_trans skl_y_ddi_translations_hdmi[] = { |
238 | { 0x00000018, 0x000000A1, 0x0 }, | 238 | { 0x00000018, 0x000000A1, 0x0 }, |
239 | { 0x00005012, 0x000000DF, 0x0 }, | 239 | { 0x00005012, 0x000000DF, 0x0 }, |
240 | { 0x00007011, 0x00000084, 0x0 }, | 240 | { 0x00007011, 0x00000084, 0x0 }, |
@@ -244,7 +244,7 @@ static const struct ddi_buf_trans skl_y_085v_ddi_translations_hdmi[] = { | |||
244 | { 0x00006013, 0x000000C7, 0x0 }, | 244 | { 0x00006013, 0x000000C7, 0x0 }, |
245 | { 0x00000018, 0x0000008A, 0x0 }, | 245 | { 0x00000018, 0x0000008A, 0x0 }, |
246 | { 0x00003015, 0x000000C7, 0x0 }, /* Default */ | 246 | { 0x00003015, 0x000000C7, 0x0 }, /* Default */ |
247 | { 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost */ | 247 | { 0x80003015, 0x000000C7, 0x7 }, /* Uses I_boost level 0x7 */ |
248 | { 0x00000018, 0x000000C7, 0x0 }, | 248 | { 0x00000018, 0x000000C7, 0x0 }, |
249 | }; | 249 | }; |
250 | 250 | ||
@@ -335,19 +335,11 @@ intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port) | |||
335 | static const struct ddi_buf_trans *skl_get_buf_trans_dp(struct drm_device *dev, | 335 | static const struct ddi_buf_trans *skl_get_buf_trans_dp(struct drm_device *dev, |
336 | int *n_entries) | 336 | int *n_entries) |
337 | { | 337 | { |
338 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
339 | const struct ddi_buf_trans *ddi_translations; | 338 | const struct ddi_buf_trans *ddi_translations; |
340 | static int is_095v = -1; | ||
341 | |||
342 | if (is_095v == -1) { | ||
343 | u32 spr1 = I915_READ(UAIMI_SPR1); | ||
344 | |||
345 | is_095v = spr1 & SKL_VCCIO_MASK; | ||
346 | } | ||
347 | 339 | ||
348 | if (IS_SKL_ULX(dev) && !is_095v) { | 340 | if (IS_SKL_ULX(dev)) { |
349 | ddi_translations = skl_y_085v_ddi_translations_dp; | 341 | ddi_translations = skl_y_ddi_translations_dp; |
350 | *n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_dp); | 342 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp); |
351 | } else if (IS_SKL_ULT(dev)) { | 343 | } else if (IS_SKL_ULT(dev)) { |
352 | ddi_translations = skl_u_ddi_translations_dp; | 344 | ddi_translations = skl_u_ddi_translations_dp; |
353 | *n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp); | 345 | *n_entries = ARRAY_SIZE(skl_u_ddi_translations_dp); |
@@ -364,23 +356,14 @@ static const struct ddi_buf_trans *skl_get_buf_trans_edp(struct drm_device *dev, | |||
364 | { | 356 | { |
365 | struct drm_i915_private *dev_priv = dev->dev_private; | 357 | struct drm_i915_private *dev_priv = dev->dev_private; |
366 | const struct ddi_buf_trans *ddi_translations; | 358 | const struct ddi_buf_trans *ddi_translations; |
367 | static int is_095v = -1; | ||
368 | |||
369 | if (is_095v == -1) { | ||
370 | u32 spr1 = I915_READ(UAIMI_SPR1); | ||
371 | 359 | ||
372 | is_095v = spr1 & SKL_VCCIO_MASK; | 360 | if (IS_SKL_ULX(dev)) { |
373 | } | ||
374 | |||
375 | if (IS_SKL_ULX(dev) && !is_095v) { | ||
376 | if (dev_priv->edp_low_vswing) { | 361 | if (dev_priv->edp_low_vswing) { |
377 | ddi_translations = skl_y_085v_ddi_translations_edp; | 362 | ddi_translations = skl_y_ddi_translations_edp; |
378 | *n_entries = | 363 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_edp); |
379 | ARRAY_SIZE(skl_y_085v_ddi_translations_edp); | ||
380 | } else { | 364 | } else { |
381 | ddi_translations = skl_y_085v_ddi_translations_dp; | 365 | ddi_translations = skl_y_ddi_translations_dp; |
382 | *n_entries = | 366 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_dp); |
383 | ARRAY_SIZE(skl_y_085v_ddi_translations_dp); | ||
384 | } | 367 | } |
385 | } else if (IS_SKL_ULT(dev)) { | 368 | } else if (IS_SKL_ULT(dev)) { |
386 | if (dev_priv->edp_low_vswing) { | 369 | if (dev_priv->edp_low_vswing) { |
@@ -407,19 +390,11 @@ static const struct ddi_buf_trans * | |||
407 | skl_get_buf_trans_hdmi(struct drm_device *dev, | 390 | skl_get_buf_trans_hdmi(struct drm_device *dev, |
408 | int *n_entries) | 391 | int *n_entries) |
409 | { | 392 | { |
410 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
411 | const struct ddi_buf_trans *ddi_translations; | 393 | const struct ddi_buf_trans *ddi_translations; |
412 | static int is_095v = -1; | ||
413 | |||
414 | if (is_095v == -1) { | ||
415 | u32 spr1 = I915_READ(UAIMI_SPR1); | ||
416 | |||
417 | is_095v = spr1 & SKL_VCCIO_MASK; | ||
418 | } | ||
419 | 394 | ||
420 | if (IS_SKL_ULX(dev) && !is_095v) { | 395 | if (IS_SKL_ULX(dev)) { |
421 | ddi_translations = skl_y_085v_ddi_translations_hdmi; | 396 | ddi_translations = skl_y_ddi_translations_hdmi; |
422 | *n_entries = ARRAY_SIZE(skl_y_085v_ddi_translations_hdmi); | 397 | *n_entries = ARRAY_SIZE(skl_y_ddi_translations_hdmi); |
423 | } else { | 398 | } else { |
424 | ddi_translations = skl_ddi_translations_hdmi; | 399 | ddi_translations = skl_ddi_translations_hdmi; |
425 | *n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi); | 400 | *n_entries = ARRAY_SIZE(skl_ddi_translations_hdmi); |