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authorDave Airlie <airlied@redhat.com>2016-10-31 19:05:54 -0400
committerDave Airlie <airlied@redhat.com>2016-10-31 19:05:54 -0400
commit5f7f8f6edbf860abf18149a64be036d4be5e2993 (patch)
tree4dc508b8b13431758db78f7ada3e7d0a505c3323
parenta909d3e636995ba7c349e2ca5dbb528154d4ac30 (diff)
parent1cfa126c52af20c36e6a618e45c5449d1025ae55 (diff)
Merge branch 'drm-fixes-staging' of ssh://people.freedesktop.org/~/linux into drm-fixes
Pull the staging fixes tree I had into rc3 to make real -fixes again.
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c9
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/ci_dpm.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v10_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v11_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v6_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v8_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/kv_dpm.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/si_dpm.c61
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vce_v3_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vi.c2
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c2
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c3
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c9
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c17
-rw-r--r--drivers/gpu/drm/amd/scheduler/gpu_scheduler.c1
-rw-r--r--drivers/gpu/drm/amd/scheduler/sched_fence.c4
-rw-r--r--drivers/gpu/drm/drm_atomic.c9
-rw-r--r--drivers/gpu/drm/drm_atomic_helper.c4
-rw-r--r--drivers/gpu/drm/drm_dp_mst_topology.c6
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c68
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.c20
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.h1
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fb.c2
-rw-r--r--drivers/gpu/drm/radeon/ni.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_dp_auxch.c2
-rw-r--r--drivers/gpu/drm/radeon/si_dpm.c53
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_du_kms.c12
-rw-r--r--drivers/gpu/drm/sti/sti_drv.c22
-rw-r--r--include/drm/drm_plane.h8
36 files changed, 250 insertions, 120 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index b0f6e6957536..82dc8d20e28a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -519,7 +519,8 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
519 r = ttm_eu_reserve_buffers(&p->ticket, &p->validated, true, 519 r = ttm_eu_reserve_buffers(&p->ticket, &p->validated, true,
520 &duplicates); 520 &duplicates);
521 if (unlikely(r != 0)) { 521 if (unlikely(r != 0)) {
522 DRM_ERROR("ttm_eu_reserve_buffers failed.\n"); 522 if (r != -ERESTARTSYS)
523 DRM_ERROR("ttm_eu_reserve_buffers failed.\n");
523 goto error_free_pages; 524 goto error_free_pages;
524 } 525 }
525 526
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index b4f4a9239069..7ca07e7b25c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1959,6 +1959,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool suspend, bool fbcon)
1959 /* evict remaining vram memory */ 1959 /* evict remaining vram memory */
1960 amdgpu_bo_evict_vram(adev); 1960 amdgpu_bo_evict_vram(adev);
1961 1961
1962 amdgpu_atombios_scratch_regs_save(adev);
1962 pci_save_state(dev->pdev); 1963 pci_save_state(dev->pdev);
1963 if (suspend) { 1964 if (suspend) {
1964 /* Shut down the device */ 1965 /* Shut down the device */
@@ -2010,6 +2011,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
2010 return r; 2011 return r;
2011 } 2012 }
2012 } 2013 }
2014 amdgpu_atombios_scratch_regs_restore(adev);
2013 2015
2014 /* post card */ 2016 /* post card */
2015 if (!amdgpu_card_posted(adev) || !resume) { 2017 if (!amdgpu_card_posted(adev) || !resume) {
@@ -2268,8 +2270,6 @@ int amdgpu_gpu_reset(struct amdgpu_device *adev)
2268 } 2270 }
2269 2271
2270 if (need_full_reset) { 2272 if (need_full_reset) {
2271 /* save scratch */
2272 amdgpu_atombios_scratch_regs_save(adev);
2273 r = amdgpu_suspend(adev); 2273 r = amdgpu_suspend(adev);
2274 2274
2275retry: 2275retry:
@@ -2279,8 +2279,9 @@ retry:
2279 amdgpu_display_stop_mc_access(adev, &save); 2279 amdgpu_display_stop_mc_access(adev, &save);
2280 amdgpu_wait_for_idle(adev, AMD_IP_BLOCK_TYPE_GMC); 2280 amdgpu_wait_for_idle(adev, AMD_IP_BLOCK_TYPE_GMC);
2281 } 2281 }
2282 2282 amdgpu_atombios_scratch_regs_save(adev);
2283 r = amdgpu_asic_reset(adev); 2283 r = amdgpu_asic_reset(adev);
2284 amdgpu_atombios_scratch_regs_restore(adev);
2284 /* post card */ 2285 /* post card */
2285 amdgpu_atom_asic_init(adev->mode_info.atom_context); 2286 amdgpu_atom_asic_init(adev->mode_info.atom_context);
2286 2287
@@ -2288,8 +2289,6 @@ retry:
2288 dev_info(adev->dev, "GPU reset succeeded, trying to resume\n"); 2289 dev_info(adev->dev, "GPU reset succeeded, trying to resume\n");
2289 r = amdgpu_resume(adev); 2290 r = amdgpu_resume(adev);
2290 } 2291 }
2291 /* restore scratch */
2292 amdgpu_atombios_scratch_regs_restore(adev);
2293 } 2292 }
2294 if (!r) { 2293 if (!r) {
2295 amdgpu_irq_gpu_reset_resume_helper(adev); 2294 amdgpu_irq_gpu_reset_resume_helper(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 3a2e42f4b897..77b34ec92632 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -68,6 +68,7 @@ int amdgpu_fence_slab_init(void)
68 68
69void amdgpu_fence_slab_fini(void) 69void amdgpu_fence_slab_fini(void)
70{ 70{
71 rcu_barrier();
71 kmem_cache_destroy(amdgpu_fence_slab); 72 kmem_cache_destroy(amdgpu_fence_slab);
72} 73}
73/* 74/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 278708f5a744..9fa809876339 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -239,6 +239,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
239 if (r) { 239 if (r) {
240 adev->irq.installed = false; 240 adev->irq.installed = false;
241 flush_work(&adev->hotplug_work); 241 flush_work(&adev->hotplug_work);
242 cancel_work_sync(&adev->reset_work);
242 return r; 243 return r;
243 } 244 }
244 245
@@ -264,6 +265,7 @@ void amdgpu_irq_fini(struct amdgpu_device *adev)
264 if (adev->irq.msi_enabled) 265 if (adev->irq.msi_enabled)
265 pci_disable_msi(adev->pdev); 266 pci_disable_msi(adev->pdev);
266 flush_work(&adev->hotplug_work); 267 flush_work(&adev->hotplug_work);
268 cancel_work_sync(&adev->reset_work);
267 } 269 }
268 270
269 for (i = 0; i < AMDGPU_MAX_IRQ_SRC_ID; ++i) { 271 for (i = 0; i < AMDGPU_MAX_IRQ_SRC_ID; ++i) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index c2c7fb140338..203d98b00555 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -459,10 +459,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
459 /* return all clocks in KHz */ 459 /* return all clocks in KHz */
460 dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10; 460 dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;
461 if (adev->pm.dpm_enabled) { 461 if (adev->pm.dpm_enabled) {
462 dev_info.max_engine_clock = 462 dev_info.max_engine_clock = amdgpu_dpm_get_sclk(adev, false) * 10;
463 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10; 463 dev_info.max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10;
464 dev_info.max_memory_clock =
465 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk * 10;
466 } else { 464 } else {
467 dev_info.max_engine_clock = adev->pm.default_sclk * 10; 465 dev_info.max_engine_clock = adev->pm.default_sclk * 10;
468 dev_info.max_memory_clock = adev->pm.default_mclk * 10; 466 dev_info.max_memory_clock = adev->pm.default_mclk * 10;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 06f24322e7c3..968c4260d7a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1758,5 +1758,6 @@ void amdgpu_vm_manager_fini(struct amdgpu_device *adev)
1758 fence_put(adev->vm_manager.ids[i].first); 1758 fence_put(adev->vm_manager.ids[i].first);
1759 amdgpu_sync_free(&adev->vm_manager.ids[i].active); 1759 amdgpu_sync_free(&adev->vm_manager.ids[i].active);
1760 fence_put(id->flushed_updates); 1760 fence_put(id->flushed_updates);
1761 fence_put(id->last_flush);
1761 } 1762 }
1762} 1763}
diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 1d8c375a3561..5be788b269e2 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -4075,7 +4075,7 @@ static int ci_enable_uvd_dpm(struct amdgpu_device *adev, bool enable)
4075 pi->dpm_level_enable_mask.mclk_dpm_enable_mask); 4075 pi->dpm_level_enable_mask.mclk_dpm_enable_mask);
4076 } 4076 }
4077 } else { 4077 } else {
4078 if (pi->last_mclk_dpm_enable_mask & 0x1) { 4078 if (pi->uvd_enabled) {
4079 pi->uvd_enabled = false; 4079 pi->uvd_enabled = false;
4080 pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1; 4080 pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1;
4081 amdgpu_ci_send_msg_to_smc_with_parameter(adev, 4081 amdgpu_ci_send_msg_to_smc_with_parameter(adev,
@@ -6236,6 +6236,8 @@ static int ci_dpm_sw_fini(void *handle)
6236{ 6236{
6237 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 6237 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
6238 6238
6239 flush_work(&adev->pm.dpm.thermal.work);
6240
6239 mutex_lock(&adev->pm.mutex); 6241 mutex_lock(&adev->pm.mutex);
6240 amdgpu_pm_sysfs_fini(adev); 6242 amdgpu_pm_sysfs_fini(adev);
6241 ci_dpm_fini(adev); 6243 ci_dpm_fini(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 4108c686aa7c..9260caef74fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -3151,10 +3151,6 @@ static int dce_v10_0_hw_fini(void *handle)
3151 3151
3152static int dce_v10_0_suspend(void *handle) 3152static int dce_v10_0_suspend(void *handle)
3153{ 3153{
3154 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3155
3156 amdgpu_atombios_scratch_regs_save(adev);
3157
3158 return dce_v10_0_hw_fini(handle); 3154 return dce_v10_0_hw_fini(handle);
3159} 3155}
3160 3156
@@ -3165,8 +3161,6 @@ static int dce_v10_0_resume(void *handle)
3165 3161
3166 ret = dce_v10_0_hw_init(handle); 3162 ret = dce_v10_0_hw_init(handle);
3167 3163
3168 amdgpu_atombios_scratch_regs_restore(adev);
3169
3170 /* turn on the BL */ 3164 /* turn on the BL */
3171 if (adev->mode_info.bl_encoder) { 3165 if (adev->mode_info.bl_encoder) {
3172 u8 bl_level = amdgpu_display_backlight_get_level(adev, 3166 u8 bl_level = amdgpu_display_backlight_get_level(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index f264b8f17ad1..367739bd1927 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -3215,10 +3215,6 @@ static int dce_v11_0_hw_fini(void *handle)
3215 3215
3216static int dce_v11_0_suspend(void *handle) 3216static int dce_v11_0_suspend(void *handle)
3217{ 3217{
3218 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3219
3220 amdgpu_atombios_scratch_regs_save(adev);
3221
3222 return dce_v11_0_hw_fini(handle); 3218 return dce_v11_0_hw_fini(handle);
3223} 3219}
3224 3220
@@ -3229,8 +3225,6 @@ static int dce_v11_0_resume(void *handle)
3229 3225
3230 ret = dce_v11_0_hw_init(handle); 3226 ret = dce_v11_0_hw_init(handle);
3231 3227
3232 amdgpu_atombios_scratch_regs_restore(adev);
3233
3234 /* turn on the BL */ 3228 /* turn on the BL */
3235 if (adev->mode_info.bl_encoder) { 3229 if (adev->mode_info.bl_encoder) {
3236 u8 bl_level = amdgpu_display_backlight_get_level(adev, 3230 u8 bl_level = amdgpu_display_backlight_get_level(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index b948d6cb1399..15f9fc0514b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2482,10 +2482,6 @@ static int dce_v6_0_hw_fini(void *handle)
2482 2482
2483static int dce_v6_0_suspend(void *handle) 2483static int dce_v6_0_suspend(void *handle)
2484{ 2484{
2485 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2486
2487 amdgpu_atombios_scratch_regs_save(adev);
2488
2489 return dce_v6_0_hw_fini(handle); 2485 return dce_v6_0_hw_fini(handle);
2490} 2486}
2491 2487
@@ -2496,8 +2492,6 @@ static int dce_v6_0_resume(void *handle)
2496 2492
2497 ret = dce_v6_0_hw_init(handle); 2493 ret = dce_v6_0_hw_init(handle);
2498 2494
2499 amdgpu_atombios_scratch_regs_restore(adev);
2500
2501 /* turn on the BL */ 2495 /* turn on the BL */
2502 if (adev->mode_info.bl_encoder) { 2496 if (adev->mode_info.bl_encoder) {
2503 u8 bl_level = amdgpu_display_backlight_get_level(adev, 2497 u8 bl_level = amdgpu_display_backlight_get_level(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 5966166ec94c..8c4d808db0f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -3033,10 +3033,6 @@ static int dce_v8_0_hw_fini(void *handle)
3033 3033
3034static int dce_v8_0_suspend(void *handle) 3034static int dce_v8_0_suspend(void *handle)
3035{ 3035{
3036 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3037
3038 amdgpu_atombios_scratch_regs_save(adev);
3039
3040 return dce_v8_0_hw_fini(handle); 3036 return dce_v8_0_hw_fini(handle);
3041} 3037}
3042 3038
@@ -3047,8 +3043,6 @@ static int dce_v8_0_resume(void *handle)
3047 3043
3048 ret = dce_v8_0_hw_init(handle); 3044 ret = dce_v8_0_hw_init(handle);
3049 3045
3050 amdgpu_atombios_scratch_regs_restore(adev);
3051
3052 /* turn on the BL */ 3046 /* turn on the BL */
3053 if (adev->mode_info.bl_encoder) { 3047 if (adev->mode_info.bl_encoder) {
3054 u8 bl_level = amdgpu_display_backlight_get_level(adev, 3048 u8 bl_level = amdgpu_display_backlight_get_level(adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ee6a48a09214..bb97182dc749 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -640,7 +640,6 @@ static const u32 stoney_mgcg_cgcg_init[] =
640 mmCP_MEM_SLP_CNTL, 0xffffffff, 0x00020201, 640 mmCP_MEM_SLP_CNTL, 0xffffffff, 0x00020201,
641 mmRLC_MEM_SLP_CNTL, 0xffffffff, 0x00020201, 641 mmRLC_MEM_SLP_CNTL, 0xffffffff, 0x00020201,
642 mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200, 642 mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200,
643 mmATC_MISC_CG, 0xffffffff, 0x000c0200,
644}; 643};
645 644
646static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev); 645static void gfx_v8_0_set_ring_funcs(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index c22ef140a542..a16b2201d52c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -100,6 +100,7 @@ static const u32 cz_mgcg_cgcg_init[] =
100 100
101static const u32 stoney_mgcg_cgcg_init[] = 101static const u32 stoney_mgcg_cgcg_init[] =
102{ 102{
103 mmATC_MISC_CG, 0xffffffff, 0x000c0200,
103 mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104 104 mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104
104}; 105};
105 106
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index f8618a3881a8..71d2856222fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -3063,6 +3063,8 @@ static int kv_dpm_sw_fini(void *handle)
3063{ 3063{
3064 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 3064 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3065 3065
3066 flush_work(&adev->pm.dpm.thermal.work);
3067
3066 mutex_lock(&adev->pm.mutex); 3068 mutex_lock(&adev->pm.mutex);
3067 amdgpu_pm_sysfs_fini(adev); 3069 amdgpu_pm_sysfs_fini(adev);
3068 kv_dpm_fini(adev); 3070 kv_dpm_fini(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index 3de7bca5854b..d6f85b1a0b93 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -3477,6 +3477,49 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
3477 int i; 3477 int i;
3478 struct si_dpm_quirk *p = si_dpm_quirk_list; 3478 struct si_dpm_quirk *p = si_dpm_quirk_list;
3479 3479
3480 /* limit all SI kickers */
3481 if (adev->asic_type == CHIP_PITCAIRN) {
3482 if ((adev->pdev->revision == 0x81) ||
3483 (adev->pdev->device == 0x6810) ||
3484 (adev->pdev->device == 0x6811) ||
3485 (adev->pdev->device == 0x6816) ||
3486 (adev->pdev->device == 0x6817) ||
3487 (adev->pdev->device == 0x6806))
3488 max_mclk = 120000;
3489 } else if (adev->asic_type == CHIP_VERDE) {
3490 if ((adev->pdev->revision == 0x81) ||
3491 (adev->pdev->revision == 0x83) ||
3492 (adev->pdev->revision == 0x87) ||
3493 (adev->pdev->device == 0x6820) ||
3494 (adev->pdev->device == 0x6821) ||
3495 (adev->pdev->device == 0x6822) ||
3496 (adev->pdev->device == 0x6823) ||
3497 (adev->pdev->device == 0x682A) ||
3498 (adev->pdev->device == 0x682B)) {
3499 max_sclk = 75000;
3500 max_mclk = 80000;
3501 }
3502 } else if (adev->asic_type == CHIP_OLAND) {
3503 if ((adev->pdev->revision == 0xC7) ||
3504 (adev->pdev->revision == 0x80) ||
3505 (adev->pdev->revision == 0x81) ||
3506 (adev->pdev->revision == 0x83) ||
3507 (adev->pdev->device == 0x6604) ||
3508 (adev->pdev->device == 0x6605)) {
3509 max_sclk = 75000;
3510 max_mclk = 80000;
3511 }
3512 } else if (adev->asic_type == CHIP_HAINAN) {
3513 if ((adev->pdev->revision == 0x81) ||
3514 (adev->pdev->revision == 0x83) ||
3515 (adev->pdev->revision == 0xC3) ||
3516 (adev->pdev->device == 0x6664) ||
3517 (adev->pdev->device == 0x6665) ||
3518 (adev->pdev->device == 0x6667)) {
3519 max_sclk = 75000;
3520 max_mclk = 80000;
3521 }
3522 }
3480 /* Apply dpm quirks */ 3523 /* Apply dpm quirks */
3481 while (p && p->chip_device != 0) { 3524 while (p && p->chip_device != 0) {
3482 if (adev->pdev->vendor == p->chip_vendor && 3525 if (adev->pdev->vendor == p->chip_vendor &&
@@ -3489,22 +3532,6 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
3489 } 3532 }
3490 ++p; 3533 ++p;
3491 } 3534 }
3492 /* limit mclk on all R7 370 parts for stability */
3493 if (adev->pdev->device == 0x6811 &&
3494 adev->pdev->revision == 0x81)
3495 max_mclk = 120000;
3496 /* limit sclk/mclk on Jet parts for stability */
3497 if (adev->pdev->device == 0x6665 &&
3498 adev->pdev->revision == 0xc3) {
3499 max_sclk = 75000;
3500 max_mclk = 80000;
3501 }
3502 /* Limit clocks for some HD8600 parts */
3503 if (adev->pdev->device == 0x6660 &&
3504 adev->pdev->revision == 0x83) {
3505 max_sclk = 75000;
3506 max_mclk = 80000;
3507 }
3508 3535
3509 if (rps->vce_active) { 3536 if (rps->vce_active) {
3510 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; 3537 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
@@ -7777,6 +7804,8 @@ static int si_dpm_sw_fini(void *handle)
7777{ 7804{
7778 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 7805 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
7779 7806
7807 flush_work(&adev->pm.dpm.thermal.work);
7808
7780 mutex_lock(&adev->pm.mutex); 7809 mutex_lock(&adev->pm.mutex);
7781 amdgpu_pm_sysfs_fini(adev); 7810 amdgpu_pm_sysfs_fini(adev);
7782 si_dpm_fini(adev); 7811 si_dpm_fini(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index 8533269ec160..6feed726e299 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -52,6 +52,8 @@
52#define VCE_V3_0_STACK_SIZE (64 * 1024) 52#define VCE_V3_0_STACK_SIZE (64 * 1024)
53#define VCE_V3_0_DATA_SIZE ((16 * 1024 * AMDGPU_MAX_VCE_HANDLES) + (52 * 1024)) 53#define VCE_V3_0_DATA_SIZE ((16 * 1024 * AMDGPU_MAX_VCE_HANDLES) + (52 * 1024))
54 54
55#define FW_52_8_3 ((52 << 24) | (8 << 16) | (3 << 8))
56
55static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx); 57static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx);
56static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev); 58static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev);
57static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev); 59static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev);
@@ -382,6 +384,10 @@ static int vce_v3_0_sw_init(void *handle)
382 if (r) 384 if (r)
383 return r; 385 return r;
384 386
387 /* 52.8.3 required for 3 ring support */
388 if (adev->vce.fw_version < FW_52_8_3)
389 adev->vce.num_rings = 2;
390
385 r = amdgpu_vce_resume(adev); 391 r = amdgpu_vce_resume(adev);
386 if (r) 392 if (r)
387 return r; 393 return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index c0d9aad7126f..7c13090df7c0 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1651,7 +1651,7 @@ static int vi_common_early_init(void *handle)
1651 AMD_CG_SUPPORT_SDMA_MGCG | 1651 AMD_CG_SUPPORT_SDMA_MGCG |
1652 AMD_CG_SUPPORT_SDMA_LS | 1652 AMD_CG_SUPPORT_SDMA_LS |
1653 AMD_CG_SUPPORT_VCE_MGCG; 1653 AMD_CG_SUPPORT_VCE_MGCG;
1654 adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | 1654 adev->pg_flags = AMD_PG_SUPPORT_GFX_PG |
1655 AMD_PG_SUPPORT_GFX_SMG | 1655 AMD_PG_SUPPORT_GFX_SMG |
1656 AMD_PG_SUPPORT_GFX_PIPELINE | 1656 AMD_PG_SUPPORT_GFX_PIPELINE |
1657 AMD_PG_SUPPORT_UVD | 1657 AMD_PG_SUPPORT_UVD |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
index 1167205057b3..2ba7937d2545 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
@@ -716,7 +716,7 @@ int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
716 *voltage = 1150; 716 *voltage = 1150;
717 } else { 717 } else {
718 ret = atomctrl_get_voltage_evv_on_sclk_ai(hwmgr, voltage_type, sclk, id, &vol); 718 ret = atomctrl_get_voltage_evv_on_sclk_ai(hwmgr, voltage_type, sclk, id, &vol);
719 *voltage = (uint16_t)vol/100; 719 *voltage = (uint16_t)(vol/100);
720 } 720 }
721 return ret; 721 return ret;
722} 722}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
index 1126bd4f74dc..0894527d932f 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
@@ -1320,7 +1320,8 @@ int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_
1320 if (0 != result) 1320 if (0 != result)
1321 return result; 1321 return result;
1322 1322
1323 *voltage = le32_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)(&get_voltage_info_param_space))->ulVoltageLevel); 1323 *voltage = le32_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)
1324 (&get_voltage_info_param_space))->ulVoltageLevel);
1324 1325
1325 return result; 1326 return result;
1326} 1327}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
index 7de701d8a450..4477c55a58e3 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
@@ -1201,12 +1201,15 @@ static uint32_t make_classification_flags(struct pp_hwmgr *hwmgr,
1201static int ppt_get_num_of_vce_state_table_entries_v1_0(struct pp_hwmgr *hwmgr) 1201static int ppt_get_num_of_vce_state_table_entries_v1_0(struct pp_hwmgr *hwmgr)
1202{ 1202{
1203 const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr); 1203 const ATOM_Tonga_POWERPLAYTABLE *pp_table = get_powerplay_table(hwmgr);
1204 const ATOM_Tonga_VCE_State_Table *vce_state_table = 1204 const ATOM_Tonga_VCE_State_Table *vce_state_table;
1205 (ATOM_Tonga_VCE_State_Table *)(((unsigned long)pp_table) + le16_to_cpu(pp_table->usVCEStateTableOffset));
1206 1205
1207 if (vce_state_table == NULL) 1206
1207 if (pp_table == NULL)
1208 return 0; 1208 return 0;
1209 1209
1210 vce_state_table = (void *)pp_table +
1211 le16_to_cpu(pp_table->usVCEStateTableOffset);
1212
1210 return vce_state_table->ucNumEntries; 1213 return vce_state_table->ucNumEntries;
1211} 1214}
1212 1215
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 609996c84ad5..75854021f403 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -1168,8 +1168,8 @@ int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
1168 1168
1169 tmp_result = (!smum_is_dpm_running(hwmgr)) ? 0 : -1; 1169 tmp_result = (!smum_is_dpm_running(hwmgr)) ? 0 : -1;
1170 PP_ASSERT_WITH_CODE(tmp_result == 0, 1170 PP_ASSERT_WITH_CODE(tmp_result == 0,
1171 "DPM is already running right now, no need to enable DPM!", 1171 "DPM is already running",
1172 return 0); 1172 );
1173 1173
1174 if (smu7_voltage_control(hwmgr)) { 1174 if (smu7_voltage_control(hwmgr)) {
1175 tmp_result = smu7_enable_voltage_control(hwmgr); 1175 tmp_result = smu7_enable_voltage_control(hwmgr);
@@ -2127,15 +2127,18 @@ static int smu7_patch_acp_vddc(struct pp_hwmgr *hwmgr,
2127} 2127}
2128 2128
2129static int smu7_patch_limits_vddc(struct pp_hwmgr *hwmgr, 2129static int smu7_patch_limits_vddc(struct pp_hwmgr *hwmgr,
2130 struct phm_clock_and_voltage_limits *tab) 2130 struct phm_clock_and_voltage_limits *tab)
2131{ 2131{
2132 uint32_t vddc, vddci;
2132 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); 2133 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
2133 2134
2134 if (tab) { 2135 if (tab) {
2135 smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddc, 2136 smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddc,
2136 &data->vddc_leakage); 2137 &data->vddc_leakage);
2137 smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, (uint32_t *)&tab->vddci, 2138 tab->vddc = vddc;
2138 &data->vddci_leakage); 2139 smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddci,
2140 &data->vddci_leakage);
2141 tab->vddci = vddci;
2139 } 2142 }
2140 2143
2141 return 0; 2144 return 0;
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
index 963a24d46a93..910b8d5b21c5 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
@@ -645,6 +645,7 @@ void amd_sched_fini(struct amd_gpu_scheduler *sched)
645{ 645{
646 if (sched->thread) 646 if (sched->thread)
647 kthread_stop(sched->thread); 647 kthread_stop(sched->thread);
648 rcu_barrier();
648 if (atomic_dec_and_test(&sched_fence_slab_ref)) 649 if (atomic_dec_and_test(&sched_fence_slab_ref))
649 kmem_cache_destroy(sched_fence_slab); 650 kmem_cache_destroy(sched_fence_slab);
650} 651}
diff --git a/drivers/gpu/drm/amd/scheduler/sched_fence.c b/drivers/gpu/drm/amd/scheduler/sched_fence.c
index 6b63beaf7574..3653b5a40494 100644
--- a/drivers/gpu/drm/amd/scheduler/sched_fence.c
+++ b/drivers/gpu/drm/amd/scheduler/sched_fence.c
@@ -103,7 +103,7 @@ static void amd_sched_fence_free(struct rcu_head *rcu)
103} 103}
104 104
105/** 105/**
106 * amd_sched_fence_release - callback that fence can be freed 106 * amd_sched_fence_release_scheduled - callback that fence can be freed
107 * 107 *
108 * @fence: fence 108 * @fence: fence
109 * 109 *
@@ -118,7 +118,7 @@ static void amd_sched_fence_release_scheduled(struct fence *f)
118} 118}
119 119
120/** 120/**
121 * amd_sched_fence_release_scheduled - drop extra reference 121 * amd_sched_fence_release_finished - drop extra reference
122 * 122 *
123 * @f: fence 123 * @f: fence
124 * 124 *
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 23739609427d..e6862a744210 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -420,18 +420,21 @@ drm_atomic_replace_property_blob_from_id(struct drm_crtc *crtc,
420 ssize_t expected_size, 420 ssize_t expected_size,
421 bool *replaced) 421 bool *replaced)
422{ 422{
423 struct drm_device *dev = crtc->dev;
424 struct drm_property_blob *new_blob = NULL; 423 struct drm_property_blob *new_blob = NULL;
425 424
426 if (blob_id != 0) { 425 if (blob_id != 0) {
427 new_blob = drm_property_lookup_blob(dev, blob_id); 426 new_blob = drm_property_lookup_blob(crtc->dev, blob_id);
428 if (new_blob == NULL) 427 if (new_blob == NULL)
429 return -EINVAL; 428 return -EINVAL;
430 if (expected_size > 0 && expected_size != new_blob->length) 429
430 if (expected_size > 0 && expected_size != new_blob->length) {
431 drm_property_unreference_blob(new_blob);
431 return -EINVAL; 432 return -EINVAL;
433 }
432 } 434 }
433 435
434 drm_atomic_replace_property_blob(blob, new_blob, replaced); 436 drm_atomic_replace_property_blob(blob, new_blob, replaced);
437 drm_property_unreference_blob(new_blob);
435 438
436 return 0; 439 return 0;
437} 440}
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index c3f83476f996..21f992605541 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -594,10 +594,6 @@ drm_atomic_helper_check_planes(struct drm_device *dev,
594 struct drm_plane_state *plane_state; 594 struct drm_plane_state *plane_state;
595 int i, ret = 0; 595 int i, ret = 0;
596 596
597 ret = drm_atomic_normalize_zpos(dev, state);
598 if (ret)
599 return ret;
600
601 for_each_plane_in_state(state, plane, plane_state, i) { 597 for_each_plane_in_state(state, plane, plane_state, i) {
602 const struct drm_plane_helper_funcs *funcs; 598 const struct drm_plane_helper_funcs *funcs;
603 599
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index 04e457117980..aa644487749c 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -914,6 +914,7 @@ static void drm_dp_destroy_port(struct kref *kref)
914 /* no need to clean up vcpi 914 /* no need to clean up vcpi
915 * as if we have no connector we never setup a vcpi */ 915 * as if we have no connector we never setup a vcpi */
916 drm_dp_port_teardown_pdt(port, port->pdt); 916 drm_dp_port_teardown_pdt(port, port->pdt);
917 port->pdt = DP_PEER_DEVICE_NONE;
917 } 918 }
918 kfree(port); 919 kfree(port);
919} 920}
@@ -1159,7 +1160,9 @@ static void drm_dp_add_port(struct drm_dp_mst_branch *mstb,
1159 drm_dp_put_port(port); 1160 drm_dp_put_port(port);
1160 goto out; 1161 goto out;
1161 } 1162 }
1162 if (port->port_num >= DP_MST_LOGICAL_PORT_0) { 1163 if ((port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV ||
1164 port->pdt == DP_PEER_DEVICE_SST_SINK) &&
1165 port->port_num >= DP_MST_LOGICAL_PORT_0) {
1163 port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc); 1166 port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc);
1164 drm_mode_connector_set_tile_property(port->connector); 1167 drm_mode_connector_set_tile_property(port->connector);
1165 } 1168 }
@@ -2919,6 +2922,7 @@ static void drm_dp_destroy_connector_work(struct work_struct *work)
2919 mgr->cbs->destroy_connector(mgr, port->connector); 2922 mgr->cbs->destroy_connector(mgr, port->connector);
2920 2923
2921 drm_dp_port_teardown_pdt(port, port->pdt); 2924 drm_dp_port_teardown_pdt(port, port->pdt);
2925 port->pdt = DP_PEER_DEVICE_NONE;
2922 2926
2923 if (!port->input && port->vcpi.vcpi > 0) { 2927 if (!port->input && port->vcpi.vcpi > 0) {
2924 drm_dp_mst_reset_vcpi_slots(mgr, port); 2928 drm_dp_mst_reset_vcpi_slots(mgr, port);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 03414bde1f15..6c75e62c0b22 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -131,7 +131,12 @@ int drm_fb_helper_single_add_all_connectors(struct drm_fb_helper *fb_helper)
131 return 0; 131 return 0;
132fail: 132fail:
133 for (i = 0; i < fb_helper->connector_count; i++) { 133 for (i = 0; i < fb_helper->connector_count; i++) {
134 kfree(fb_helper->connector_info[i]); 134 struct drm_fb_helper_connector *fb_helper_connector =
135 fb_helper->connector_info[i];
136
137 drm_connector_unreference(fb_helper_connector->connector);
138
139 kfree(fb_helper_connector);
135 fb_helper->connector_info[i] = NULL; 140 fb_helper->connector_info[i] = NULL;
136 } 141 }
137 fb_helper->connector_count = 0; 142 fb_helper->connector_count = 0;
@@ -603,6 +608,24 @@ int drm_fb_helper_blank(int blank, struct fb_info *info)
603} 608}
604EXPORT_SYMBOL(drm_fb_helper_blank); 609EXPORT_SYMBOL(drm_fb_helper_blank);
605 610
611static void drm_fb_helper_modeset_release(struct drm_fb_helper *helper,
612 struct drm_mode_set *modeset)
613{
614 int i;
615
616 for (i = 0; i < modeset->num_connectors; i++) {
617 drm_connector_unreference(modeset->connectors[i]);
618 modeset->connectors[i] = NULL;
619 }
620 modeset->num_connectors = 0;
621
622 drm_mode_destroy(helper->dev, modeset->mode);
623 modeset->mode = NULL;
624
625 /* FIXME should hold a ref? */
626 modeset->fb = NULL;
627}
628
606static void drm_fb_helper_crtc_free(struct drm_fb_helper *helper) 629static void drm_fb_helper_crtc_free(struct drm_fb_helper *helper)
607{ 630{
608 int i; 631 int i;
@@ -612,10 +635,12 @@ static void drm_fb_helper_crtc_free(struct drm_fb_helper *helper)
612 kfree(helper->connector_info[i]); 635 kfree(helper->connector_info[i]);
613 } 636 }
614 kfree(helper->connector_info); 637 kfree(helper->connector_info);
638
615 for (i = 0; i < helper->crtc_count; i++) { 639 for (i = 0; i < helper->crtc_count; i++) {
616 kfree(helper->crtc_info[i].mode_set.connectors); 640 struct drm_mode_set *modeset = &helper->crtc_info[i].mode_set;
617 if (helper->crtc_info[i].mode_set.mode) 641
618 drm_mode_destroy(helper->dev, helper->crtc_info[i].mode_set.mode); 642 drm_fb_helper_modeset_release(helper, modeset);
643 kfree(modeset->connectors);
619 } 644 }
620 kfree(helper->crtc_info); 645 kfree(helper->crtc_info);
621} 646}
@@ -644,7 +669,9 @@ static void drm_fb_helper_dirty_work(struct work_struct *work)
644 clip->x2 = clip->y2 = 0; 669 clip->x2 = clip->y2 = 0;
645 spin_unlock_irqrestore(&helper->dirty_lock, flags); 670 spin_unlock_irqrestore(&helper->dirty_lock, flags);
646 671
647 helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, &clip_copy, 1); 672 /* call dirty callback only when it has been really touched */
673 if (clip_copy.x1 < clip_copy.x2 && clip_copy.y1 < clip_copy.y2)
674 helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, &clip_copy, 1);
648} 675}
649 676
650/** 677/**
@@ -2088,7 +2115,6 @@ static void drm_setup_crtcs(struct drm_fb_helper *fb_helper)
2088 struct drm_fb_helper_crtc **crtcs; 2115 struct drm_fb_helper_crtc **crtcs;
2089 struct drm_display_mode **modes; 2116 struct drm_display_mode **modes;
2090 struct drm_fb_offset *offsets; 2117 struct drm_fb_offset *offsets;
2091 struct drm_mode_set *modeset;
2092 bool *enabled; 2118 bool *enabled;
2093 int width, height; 2119 int width, height;
2094 int i; 2120 int i;
@@ -2136,45 +2162,35 @@ static void drm_setup_crtcs(struct drm_fb_helper *fb_helper)
2136 2162
2137 /* need to set the modesets up here for use later */ 2163 /* need to set the modesets up here for use later */
2138 /* fill out the connector<->crtc mappings into the modesets */ 2164 /* fill out the connector<->crtc mappings into the modesets */
2139 for (i = 0; i < fb_helper->crtc_count; i++) { 2165 for (i = 0; i < fb_helper->crtc_count; i++)
2140 modeset = &fb_helper->crtc_info[i].mode_set; 2166 drm_fb_helper_modeset_release(fb_helper,
2141 modeset->num_connectors = 0; 2167 &fb_helper->crtc_info[i].mode_set);
2142 modeset->fb = NULL;
2143 }
2144 2168
2145 for (i = 0; i < fb_helper->connector_count; i++) { 2169 for (i = 0; i < fb_helper->connector_count; i++) {
2146 struct drm_display_mode *mode = modes[i]; 2170 struct drm_display_mode *mode = modes[i];
2147 struct drm_fb_helper_crtc *fb_crtc = crtcs[i]; 2171 struct drm_fb_helper_crtc *fb_crtc = crtcs[i];
2148 struct drm_fb_offset *offset = &offsets[i]; 2172 struct drm_fb_offset *offset = &offsets[i];
2149 modeset = &fb_crtc->mode_set; 2173 struct drm_mode_set *modeset = &fb_crtc->mode_set;
2150 2174
2151 if (mode && fb_crtc) { 2175 if (mode && fb_crtc) {
2176 struct drm_connector *connector =
2177 fb_helper->connector_info[i]->connector;
2178
2152 DRM_DEBUG_KMS("desired mode %s set on crtc %d (%d,%d)\n", 2179 DRM_DEBUG_KMS("desired mode %s set on crtc %d (%d,%d)\n",
2153 mode->name, fb_crtc->mode_set.crtc->base.id, offset->x, offset->y); 2180 mode->name, fb_crtc->mode_set.crtc->base.id, offset->x, offset->y);
2181
2154 fb_crtc->desired_mode = mode; 2182 fb_crtc->desired_mode = mode;
2155 fb_crtc->x = offset->x; 2183 fb_crtc->x = offset->x;
2156 fb_crtc->y = offset->y; 2184 fb_crtc->y = offset->y;
2157 if (modeset->mode)
2158 drm_mode_destroy(dev, modeset->mode);
2159 modeset->mode = drm_mode_duplicate(dev, 2185 modeset->mode = drm_mode_duplicate(dev,
2160 fb_crtc->desired_mode); 2186 fb_crtc->desired_mode);
2161 modeset->connectors[modeset->num_connectors++] = fb_helper->connector_info[i]->connector; 2187 drm_connector_reference(connector);
2188 modeset->connectors[modeset->num_connectors++] = connector;
2162 modeset->fb = fb_helper->fb; 2189 modeset->fb = fb_helper->fb;
2163 modeset->x = offset->x; 2190 modeset->x = offset->x;
2164 modeset->y = offset->y; 2191 modeset->y = offset->y;
2165 } 2192 }
2166 } 2193 }
2167
2168 /* Clear out any old modes if there are no more connected outputs. */
2169 for (i = 0; i < fb_helper->crtc_count; i++) {
2170 modeset = &fb_helper->crtc_info[i].mode_set;
2171 if (modeset->num_connectors == 0) {
2172 BUG_ON(modeset->fb);
2173 if (modeset->mode)
2174 drm_mode_destroy(dev, modeset->mode);
2175 modeset->mode = NULL;
2176 }
2177 }
2178out: 2194out:
2179 kfree(crtcs); 2195 kfree(crtcs);
2180 kfree(modes); 2196 kfree(modes);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index def78c8c1780..f86e7c846678 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -262,6 +262,26 @@ int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
262 return 0; 262 return 0;
263} 263}
264 264
265int exynos_atomic_check(struct drm_device *dev,
266 struct drm_atomic_state *state)
267{
268 int ret;
269
270 ret = drm_atomic_helper_check_modeset(dev, state);
271 if (ret)
272 return ret;
273
274 ret = drm_atomic_normalize_zpos(dev, state);
275 if (ret)
276 return ret;
277
278 ret = drm_atomic_helper_check_planes(dev, state);
279 if (ret)
280 return ret;
281
282 return ret;
283}
284
265static int exynos_drm_open(struct drm_device *dev, struct drm_file *file) 285static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
266{ 286{
267 struct drm_exynos_file_private *file_priv; 287 struct drm_exynos_file_private *file_priv;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index d215149e737b..80c4d5b81689 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -301,6 +301,7 @@ static inline int exynos_dpi_bind(struct drm_device *dev,
301 301
302int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state, 302int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
303 bool nonblock); 303 bool nonblock);
304int exynos_atomic_check(struct drm_device *dev, struct drm_atomic_state *state);
304 305
305 306
306extern struct platform_driver fimd_driver; 307extern struct platform_driver fimd_driver;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index 40ce841eb952..23cce0a3f5fc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -190,7 +190,7 @@ dma_addr_t exynos_drm_fb_dma_addr(struct drm_framebuffer *fb, int index)
190static const struct drm_mode_config_funcs exynos_drm_mode_config_funcs = { 190static const struct drm_mode_config_funcs exynos_drm_mode_config_funcs = {
191 .fb_create = exynos_user_fb_create, 191 .fb_create = exynos_user_fb_create,
192 .output_poll_changed = exynos_drm_output_poll_changed, 192 .output_poll_changed = exynos_drm_output_poll_changed,
193 .atomic_check = drm_atomic_helper_check, 193 .atomic_check = exynos_atomic_check,
194 .atomic_commit = exynos_atomic_commit, 194 .atomic_commit = exynos_atomic_commit,
195}; 195};
196 196
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 103fc8650197..a0d4a0522fdc 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1396,9 +1396,7 @@ static void cayman_pcie_gart_fini(struct radeon_device *rdev)
1396void cayman_cp_int_cntl_setup(struct radeon_device *rdev, 1396void cayman_cp_int_cntl_setup(struct radeon_device *rdev,
1397 int ring, u32 cp_int_cntl) 1397 int ring, u32 cp_int_cntl)
1398{ 1398{
1399 u32 srbm_gfx_cntl = RREG32(SRBM_GFX_CNTL) & ~3; 1399 WREG32(SRBM_GFX_CNTL, RINGID(ring));
1400
1401 WREG32(SRBM_GFX_CNTL, srbm_gfx_cntl | (ring & 3));
1402 WREG32(CP_INT_CNTL, cp_int_cntl); 1400 WREG32(CP_INT_CNTL, cp_int_cntl);
1403} 1401}
1404 1402
diff --git a/drivers/gpu/drm/radeon/radeon_dp_auxch.c b/drivers/gpu/drm/radeon/radeon_dp_auxch.c
index 2d465648856a..474a8a1886f7 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_auxch.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_auxch.c
@@ -105,7 +105,7 @@ radeon_dp_aux_transfer_native(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg
105 105
106 tmp &= AUX_HPD_SEL(0x7); 106 tmp &= AUX_HPD_SEL(0x7);
107 tmp |= AUX_HPD_SEL(chan->rec.hpd); 107 tmp |= AUX_HPD_SEL(chan->rec.hpd);
108 tmp |= AUX_EN | AUX_LS_READ_EN | AUX_HPD_DISCON(0x1); 108 tmp |= AUX_EN | AUX_LS_READ_EN;
109 109
110 WREG32(AUX_CONTROL + aux_offset[instance], tmp); 110 WREG32(AUX_CONTROL + aux_offset[instance], tmp);
111 111
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 89bdf20344ae..c49934527a87 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -2999,6 +2999,49 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
2999 int i; 2999 int i;
3000 struct si_dpm_quirk *p = si_dpm_quirk_list; 3000 struct si_dpm_quirk *p = si_dpm_quirk_list;
3001 3001
3002 /* limit all SI kickers */
3003 if (rdev->family == CHIP_PITCAIRN) {
3004 if ((rdev->pdev->revision == 0x81) ||
3005 (rdev->pdev->device == 0x6810) ||
3006 (rdev->pdev->device == 0x6811) ||
3007 (rdev->pdev->device == 0x6816) ||
3008 (rdev->pdev->device == 0x6817) ||
3009 (rdev->pdev->device == 0x6806))
3010 max_mclk = 120000;
3011 } else if (rdev->family == CHIP_VERDE) {
3012 if ((rdev->pdev->revision == 0x81) ||
3013 (rdev->pdev->revision == 0x83) ||
3014 (rdev->pdev->revision == 0x87) ||
3015 (rdev->pdev->device == 0x6820) ||
3016 (rdev->pdev->device == 0x6821) ||
3017 (rdev->pdev->device == 0x6822) ||
3018 (rdev->pdev->device == 0x6823) ||
3019 (rdev->pdev->device == 0x682A) ||
3020 (rdev->pdev->device == 0x682B)) {
3021 max_sclk = 75000;
3022 max_mclk = 80000;
3023 }
3024 } else if (rdev->family == CHIP_OLAND) {
3025 if ((rdev->pdev->revision == 0xC7) ||
3026 (rdev->pdev->revision == 0x80) ||
3027 (rdev->pdev->revision == 0x81) ||
3028 (rdev->pdev->revision == 0x83) ||
3029 (rdev->pdev->device == 0x6604) ||
3030 (rdev->pdev->device == 0x6605)) {
3031 max_sclk = 75000;
3032 max_mclk = 80000;
3033 }
3034 } else if (rdev->family == CHIP_HAINAN) {
3035 if ((rdev->pdev->revision == 0x81) ||
3036 (rdev->pdev->revision == 0x83) ||
3037 (rdev->pdev->revision == 0xC3) ||
3038 (rdev->pdev->device == 0x6664) ||
3039 (rdev->pdev->device == 0x6665) ||
3040 (rdev->pdev->device == 0x6667)) {
3041 max_sclk = 75000;
3042 max_mclk = 80000;
3043 }
3044 }
3002 /* Apply dpm quirks */ 3045 /* Apply dpm quirks */
3003 while (p && p->chip_device != 0) { 3046 while (p && p->chip_device != 0) {
3004 if (rdev->pdev->vendor == p->chip_vendor && 3047 if (rdev->pdev->vendor == p->chip_vendor &&
@@ -3011,16 +3054,6 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev,
3011 } 3054 }
3012 ++p; 3055 ++p;
3013 } 3056 }
3014 /* limit mclk on all R7 370 parts for stability */
3015 if (rdev->pdev->device == 0x6811 &&
3016 rdev->pdev->revision == 0x81)
3017 max_mclk = 120000;
3018 /* limit sclk/mclk on Jet parts for stability */
3019 if (rdev->pdev->device == 0x6665 &&
3020 rdev->pdev->revision == 0xc3) {
3021 max_sclk = 75000;
3022 max_mclk = 80000;
3023 }
3024 3057
3025 if (rps->vce_active) { 3058 if (rps->vce_active) {
3026 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; 3059 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index bd9c3bb9252c..392c7e6de042 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -231,8 +231,16 @@ static int rcar_du_atomic_check(struct drm_device *dev,
231 struct rcar_du_device *rcdu = dev->dev_private; 231 struct rcar_du_device *rcdu = dev->dev_private;
232 int ret; 232 int ret;
233 233
234 ret = drm_atomic_helper_check(dev, state); 234 ret = drm_atomic_helper_check_modeset(dev, state);
235 if (ret < 0) 235 if (ret)
236 return ret;
237
238 ret = drm_atomic_normalize_zpos(dev, state);
239 if (ret)
240 return ret;
241
242 ret = drm_atomic_helper_check_planes(dev, state);
243 if (ret)
236 return ret; 244 return ret;
237 245
238 if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) 246 if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c
index 2784919a7366..9df308565f6c 100644
--- a/drivers/gpu/drm/sti/sti_drv.c
+++ b/drivers/gpu/drm/sti/sti_drv.c
@@ -195,6 +195,26 @@ static void sti_atomic_work(struct work_struct *work)
195 sti_atomic_complete(private, private->commit.state); 195 sti_atomic_complete(private, private->commit.state);
196} 196}
197 197
198static int sti_atomic_check(struct drm_device *dev,
199 struct drm_atomic_state *state)
200{
201 int ret;
202
203 ret = drm_atomic_helper_check_modeset(dev, state);
204 if (ret)
205 return ret;
206
207 ret = drm_atomic_normalize_zpos(dev, state);
208 if (ret)
209 return ret;
210
211 ret = drm_atomic_helper_check_planes(dev, state);
212 if (ret)
213 return ret;
214
215 return ret;
216}
217
198static int sti_atomic_commit(struct drm_device *drm, 218static int sti_atomic_commit(struct drm_device *drm,
199 struct drm_atomic_state *state, bool nonblock) 219 struct drm_atomic_state *state, bool nonblock)
200{ 220{
@@ -248,7 +268,7 @@ static void sti_output_poll_changed(struct drm_device *ddev)
248static const struct drm_mode_config_funcs sti_mode_config_funcs = { 268static const struct drm_mode_config_funcs sti_mode_config_funcs = {
249 .fb_create = drm_fb_cma_create, 269 .fb_create = drm_fb_cma_create,
250 .output_poll_changed = sti_output_poll_changed, 270 .output_poll_changed = sti_output_poll_changed,
251 .atomic_check = drm_atomic_helper_check, 271 .atomic_check = sti_atomic_check,
252 .atomic_commit = sti_atomic_commit, 272 .atomic_commit = sti_atomic_commit,
253}; 273};
254 274
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 43cf193e54d6..8b4dc62470ff 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -47,8 +47,14 @@ struct drm_crtc;
47 * @src_h: height of visible portion of plane (in 16.16) 47 * @src_h: height of visible portion of plane (in 16.16)
48 * @rotation: rotation of the plane 48 * @rotation: rotation of the plane
49 * @zpos: priority of the given plane on crtc (optional) 49 * @zpos: priority of the given plane on crtc (optional)
50 * Note that multiple active planes on the same crtc can have an identical
51 * zpos value. The rule to solving the conflict is to compare the plane
52 * object IDs; the plane with a higher ID must be stacked on top of a
53 * plane with a lower ID.
50 * @normalized_zpos: normalized value of zpos: unique, range from 0 to N-1 54 * @normalized_zpos: normalized value of zpos: unique, range from 0 to N-1
51 * where N is the number of active planes for given crtc 55 * where N is the number of active planes for given crtc. Note that
56 * the driver must call drm_atomic_normalize_zpos() to update this before
57 * it can be trusted.
52 * @src: clipped source coordinates of the plane (in 16.16) 58 * @src: clipped source coordinates of the plane (in 16.16)
53 * @dst: clipped destination coordinates of the plane 59 * @dst: clipped destination coordinates of the plane
54 * @visible: visibility of the plane 60 * @visible: visibility of the plane