diff options
author | Olof Johansson <olof@lixom.net> | 2015-04-01 20:56:33 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2015-04-01 20:56:33 -0400 |
commit | 5ec5e792feac6b52915dc68a1ec286bc6770281b (patch) | |
tree | 630495b034a2de6aa96f77a79545d2464e22024e | |
parent | 9fb71bc0d593dc9a547e6f4ded157e3ae37b2322 (diff) | |
parent | 6cfdf55b7746a3b1bc324a9e64abe2f055368e6f (diff) |
Merge tag 'davinci-for-v4.1/mcasp' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/cleanup
Merge "DaVinci McASP changes for v4.1" from Sekhar Nori:
This pull request contains cleanups and non-urgent fixes for DaVinci
McASP platform support code.
* tag 'davinci-for-v4.1/mcasp' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: dm646x: Add interrupt resource for McASPs
ARM: davinci: irqs: Correct McASP1 TX interrupt definition for DM646x
ARM: davinci: dm646x: Clean up the McASP DMA resources
ARM: davinci: devices-da8xx: Add support for McASP2 on da830
ARM: davinci: devices-da8xx: Clean up and correct the McASP device creation
ARM: davinci: devices-da8xx: Add interrupt resource to McASP structs
ARM: davinci: devices-da8xx: Add resource name for the McASP DMA request
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/mach-davinci/asp.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 80 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/irqs.h | 2 |
4 files changed, 98 insertions, 15 deletions
diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h index d9b2acd12393..1128e1d8e4b4 100644 --- a/arch/arm/mach-davinci/asp.h +++ b/arch/arm/mach-davinci/asp.h | |||
@@ -21,6 +21,9 @@ | |||
21 | /* Bases of da830 McASP1 register banks */ | 21 | /* Bases of da830 McASP1 register banks */ |
22 | #define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 | 22 | #define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 |
23 | 23 | ||
24 | /* Bases of da830 McASP2 register banks */ | ||
25 | #define DAVINCI_DA830_MCASP2_REG_BASE 0x01D08000 | ||
26 | |||
24 | /* EDMA channels of dm644x and dm355 */ | 27 | /* EDMA channels of dm644x and dm355 */ |
25 | #define DAVINCI_DMA_ASP0_TX 2 | 28 | #define DAVINCI_DMA_ASP0_TX 2 |
26 | #define DAVINCI_DMA_ASP0_RX 3 | 29 | #define DAVINCI_DMA_ASP0_RX 3 |
@@ -40,6 +43,10 @@ | |||
40 | #define DAVINCI_DA830_DMA_MCASP1_AREVT 2 | 43 | #define DAVINCI_DA830_DMA_MCASP1_AREVT 2 |
41 | #define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 | 44 | #define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 |
42 | 45 | ||
46 | /* EDMA channels of da830 McASP2 */ | ||
47 | #define DAVINCI_DA830_DMA_MCASP2_AREVT 4 | ||
48 | #define DAVINCI_DA830_DMA_MCASP2_AXEVT 5 | ||
49 | |||
43 | /* Interrupts */ | 50 | /* Interrupts */ |
44 | #define DAVINCI_ASP0_RX_INT IRQ_MBRINT | 51 | #define DAVINCI_ASP0_RX_INT IRQ_MBRINT |
45 | #define DAVINCI_ASP0_TX_INT IRQ_MBXINT | 52 | #define DAVINCI_ASP0_TX_INT IRQ_MBXINT |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index b85b781b05fd..ddfdd820e6f2 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -463,16 +463,23 @@ static struct resource da830_mcasp1_resources[] = { | |||
463 | }, | 463 | }, |
464 | /* TX event */ | 464 | /* TX event */ |
465 | { | 465 | { |
466 | .name = "tx", | ||
466 | .start = DAVINCI_DA830_DMA_MCASP1_AXEVT, | 467 | .start = DAVINCI_DA830_DMA_MCASP1_AXEVT, |
467 | .end = DAVINCI_DA830_DMA_MCASP1_AXEVT, | 468 | .end = DAVINCI_DA830_DMA_MCASP1_AXEVT, |
468 | .flags = IORESOURCE_DMA, | 469 | .flags = IORESOURCE_DMA, |
469 | }, | 470 | }, |
470 | /* RX event */ | 471 | /* RX event */ |
471 | { | 472 | { |
473 | .name = "rx", | ||
472 | .start = DAVINCI_DA830_DMA_MCASP1_AREVT, | 474 | .start = DAVINCI_DA830_DMA_MCASP1_AREVT, |
473 | .end = DAVINCI_DA830_DMA_MCASP1_AREVT, | 475 | .end = DAVINCI_DA830_DMA_MCASP1_AREVT, |
474 | .flags = IORESOURCE_DMA, | 476 | .flags = IORESOURCE_DMA, |
475 | }, | 477 | }, |
478 | { | ||
479 | .name = "common", | ||
480 | .start = IRQ_DA8XX_MCASPINT, | ||
481 | .flags = IORESOURCE_IRQ, | ||
482 | }, | ||
476 | }; | 483 | }; |
477 | 484 | ||
478 | static struct platform_device da830_mcasp1_device = { | 485 | static struct platform_device da830_mcasp1_device = { |
@@ -482,6 +489,41 @@ static struct platform_device da830_mcasp1_device = { | |||
482 | .resource = da830_mcasp1_resources, | 489 | .resource = da830_mcasp1_resources, |
483 | }; | 490 | }; |
484 | 491 | ||
492 | static struct resource da830_mcasp2_resources[] = { | ||
493 | { | ||
494 | .name = "mpu", | ||
495 | .start = DAVINCI_DA830_MCASP2_REG_BASE, | ||
496 | .end = DAVINCI_DA830_MCASP2_REG_BASE + (SZ_1K * 12) - 1, | ||
497 | .flags = IORESOURCE_MEM, | ||
498 | }, | ||
499 | /* TX event */ | ||
500 | { | ||
501 | .name = "tx", | ||
502 | .start = DAVINCI_DA830_DMA_MCASP2_AXEVT, | ||
503 | .end = DAVINCI_DA830_DMA_MCASP2_AXEVT, | ||
504 | .flags = IORESOURCE_DMA, | ||
505 | }, | ||
506 | /* RX event */ | ||
507 | { | ||
508 | .name = "rx", | ||
509 | .start = DAVINCI_DA830_DMA_MCASP2_AREVT, | ||
510 | .end = DAVINCI_DA830_DMA_MCASP2_AREVT, | ||
511 | .flags = IORESOURCE_DMA, | ||
512 | }, | ||
513 | { | ||
514 | .name = "common", | ||
515 | .start = IRQ_DA8XX_MCASPINT, | ||
516 | .flags = IORESOURCE_IRQ, | ||
517 | }, | ||
518 | }; | ||
519 | |||
520 | static struct platform_device da830_mcasp2_device = { | ||
521 | .name = "davinci-mcasp", | ||
522 | .id = 2, | ||
523 | .num_resources = ARRAY_SIZE(da830_mcasp2_resources), | ||
524 | .resource = da830_mcasp2_resources, | ||
525 | }; | ||
526 | |||
485 | static struct resource da850_mcasp_resources[] = { | 527 | static struct resource da850_mcasp_resources[] = { |
486 | { | 528 | { |
487 | .name = "mpu", | 529 | .name = "mpu", |
@@ -491,16 +533,23 @@ static struct resource da850_mcasp_resources[] = { | |||
491 | }, | 533 | }, |
492 | /* TX event */ | 534 | /* TX event */ |
493 | { | 535 | { |
536 | .name = "tx", | ||
494 | .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, | 537 | .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, |
495 | .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, | 538 | .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, |
496 | .flags = IORESOURCE_DMA, | 539 | .flags = IORESOURCE_DMA, |
497 | }, | 540 | }, |
498 | /* RX event */ | 541 | /* RX event */ |
499 | { | 542 | { |
543 | .name = "rx", | ||
500 | .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT, | 544 | .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT, |
501 | .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT, | 545 | .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT, |
502 | .flags = IORESOURCE_DMA, | 546 | .flags = IORESOURCE_DMA, |
503 | }, | 547 | }, |
548 | { | ||
549 | .name = "common", | ||
550 | .start = IRQ_DA8XX_MCASPINT, | ||
551 | .flags = IORESOURCE_IRQ, | ||
552 | }, | ||
504 | }; | 553 | }; |
505 | 554 | ||
506 | static struct platform_device da850_mcasp_device = { | 555 | static struct platform_device da850_mcasp_device = { |
@@ -512,14 +561,31 @@ static struct platform_device da850_mcasp_device = { | |||
512 | 561 | ||
513 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) | 562 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) |
514 | { | 563 | { |
515 | /* DA830/OMAP-L137 has 3 instances of McASP */ | 564 | struct platform_device *pdev; |
516 | if (cpu_is_davinci_da830() && id == 1) { | 565 | |
517 | da830_mcasp1_device.dev.platform_data = pdata; | 566 | switch (id) { |
518 | platform_device_register(&da830_mcasp1_device); | 567 | case 0: |
519 | } else if (cpu_is_davinci_da850()) { | 568 | /* Valid for DA830/OMAP-L137 or DA850/OMAP-L138 */ |
520 | da850_mcasp_device.dev.platform_data = pdata; | 569 | pdev = &da850_mcasp_device; |
521 | platform_device_register(&da850_mcasp_device); | 570 | break; |
571 | case 1: | ||
572 | /* Valid for DA830/OMAP-L137 only */ | ||
573 | if (!cpu_is_davinci_da830()) | ||
574 | return; | ||
575 | pdev = &da830_mcasp1_device; | ||
576 | break; | ||
577 | case 2: | ||
578 | /* Valid for DA830/OMAP-L137 only */ | ||
579 | if (!cpu_is_davinci_da830()) | ||
580 | return; | ||
581 | pdev = &da830_mcasp2_device; | ||
582 | break; | ||
583 | default: | ||
584 | return; | ||
522 | } | 585 | } |
586 | |||
587 | pdev->dev.platform_data = pdata; | ||
588 | platform_device_register(pdev); | ||
523 | } | 589 | } |
524 | 590 | ||
525 | static struct resource da8xx_pruss_resources[] = { | 591 | static struct resource da8xx_pruss_resources[] = { |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 6c3bbea7d77d..3f842bb266d6 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -493,7 +493,6 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { | |||
493 | [IRQ_DM646X_EMACMISCINT] = 7, | 493 | [IRQ_DM646X_EMACMISCINT] = 7, |
494 | [IRQ_DM646X_MCASP0TXINT] = 7, | 494 | [IRQ_DM646X_MCASP0TXINT] = 7, |
495 | [IRQ_DM646X_MCASP0RXINT] = 7, | 495 | [IRQ_DM646X_MCASP0RXINT] = 7, |
496 | [IRQ_AEMIFINT] = 7, | ||
497 | [IRQ_DM646X_RESERVED_3] = 7, | 496 | [IRQ_DM646X_RESERVED_3] = 7, |
498 | [IRQ_DM646X_MCASP1TXINT] = 7, /* clockevent */ | 497 | [IRQ_DM646X_MCASP1TXINT] = 7, /* clockevent */ |
499 | [IRQ_TINT0_TINT34] = 7, /* clocksource */ | 498 | [IRQ_TINT0_TINT34] = 7, /* clocksource */ |
@@ -610,19 +609,31 @@ static struct resource dm646x_mcasp0_resources[] = { | |||
610 | .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1, | 609 | .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1, |
611 | .flags = IORESOURCE_MEM, | 610 | .flags = IORESOURCE_MEM, |
612 | }, | 611 | }, |
613 | /* first TX, then RX */ | ||
614 | { | 612 | { |
613 | .name = "tx", | ||
615 | .start = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, | 614 | .start = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, |
616 | .end = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, | 615 | .end = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, |
617 | .flags = IORESOURCE_DMA, | 616 | .flags = IORESOURCE_DMA, |
618 | }, | 617 | }, |
619 | { | 618 | { |
619 | .name = "rx", | ||
620 | .start = DAVINCI_DM646X_DMA_MCASP0_AREVT0, | 620 | .start = DAVINCI_DM646X_DMA_MCASP0_AREVT0, |
621 | .end = DAVINCI_DM646X_DMA_MCASP0_AREVT0, | 621 | .end = DAVINCI_DM646X_DMA_MCASP0_AREVT0, |
622 | .flags = IORESOURCE_DMA, | 622 | .flags = IORESOURCE_DMA, |
623 | }, | 623 | }, |
624 | { | ||
625 | .name = "tx", | ||
626 | .start = IRQ_DM646X_MCASP0TXINT, | ||
627 | .flags = IORESOURCE_IRQ, | ||
628 | }, | ||
629 | { | ||
630 | .name = "rx", | ||
631 | .start = IRQ_DM646X_MCASP0RXINT, | ||
632 | .flags = IORESOURCE_IRQ, | ||
633 | }, | ||
624 | }; | 634 | }; |
625 | 635 | ||
636 | /* DIT mode only, rx is not supported */ | ||
626 | static struct resource dm646x_mcasp1_resources[] = { | 637 | static struct resource dm646x_mcasp1_resources[] = { |
627 | { | 638 | { |
628 | .name = "mpu", | 639 | .name = "mpu", |
@@ -630,17 +641,16 @@ static struct resource dm646x_mcasp1_resources[] = { | |||
630 | .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1, | 641 | .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1, |
631 | .flags = IORESOURCE_MEM, | 642 | .flags = IORESOURCE_MEM, |
632 | }, | 643 | }, |
633 | /* DIT mode, only TX event */ | ||
634 | { | 644 | { |
645 | .name = "tx", | ||
635 | .start = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, | 646 | .start = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, |
636 | .end = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, | 647 | .end = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, |
637 | .flags = IORESOURCE_DMA, | 648 | .flags = IORESOURCE_DMA, |
638 | }, | 649 | }, |
639 | /* DIT mode, dummy entry */ | ||
640 | { | 650 | { |
641 | .start = -1, | 651 | .name = "tx", |
642 | .end = -1, | 652 | .start = IRQ_DM646X_MCASP1TXINT, |
643 | .flags = IORESOURCE_DMA, | 653 | .flags = IORESOURCE_IRQ, |
644 | }, | 654 | }, |
645 | }; | 655 | }; |
646 | 656 | ||
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index 354af71798dc..edb2ca62321a 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h | |||
@@ -129,8 +129,8 @@ | |||
129 | #define IRQ_DM646X_EMACMISCINT 27 | 129 | #define IRQ_DM646X_EMACMISCINT 27 |
130 | #define IRQ_DM646X_MCASP0TXINT 28 | 130 | #define IRQ_DM646X_MCASP0TXINT 28 |
131 | #define IRQ_DM646X_MCASP0RXINT 29 | 131 | #define IRQ_DM646X_MCASP0RXINT 29 |
132 | #define IRQ_DM646X_MCASP1TXINT 30 | ||
132 | #define IRQ_DM646X_RESERVED_3 31 | 133 | #define IRQ_DM646X_RESERVED_3 31 |
133 | #define IRQ_DM646X_MCASP1TXINT 32 | ||
134 | #define IRQ_DM646X_VLQINT 38 | 134 | #define IRQ_DM646X_VLQINT 38 |
135 | #define IRQ_DM646X_UARTINT2 42 | 135 | #define IRQ_DM646X_UARTINT2 42 |
136 | #define IRQ_DM646X_SPINT0 43 | 136 | #define IRQ_DM646X_SPINT0 43 |