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authorEmil Tantilov <emil.s.tantilov@intel.com>2013-04-12 04:36:42 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-04-25 22:13:09 -0400
commit5e82f2f07645ef2d8db837ebe907dfbb33d18a1e (patch)
treeb2b05493ba73a6b456b4d892e075451003a52804
parent26b4742beaf18456195eeda1b8f59547f5569ac7 (diff)
ixgbe: cache AUTOC reads
This patch removes majority of the AUTOC register reads by using a cached value instead. The reason for this change is to avoid writing corrupted values to AUTOC due to bad FW. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c40
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_type.h1
2 files changed, 25 insertions, 16 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
index 3f792428ca53..c4c5e878b8a9 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
@@ -167,9 +167,9 @@ static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
167 } 167 }
168 168
169 /* Restart DSP and set SFI mode */ 169 /* Restart DSP and set SFI mode */
170 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, (IXGBE_READ_REG(hw, 170 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, ((hw->mac.orig_autoc) |
171 IXGBE_AUTOC) | IXGBE_AUTOC_LMS_10G_SERIAL)); 171 IXGBE_AUTOC_LMS_10G_SERIAL));
172 172 hw->mac.cached_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
173 ret_val = ixgbe_reset_pipeline_82599(hw); 173 ret_val = ixgbe_reset_pipeline_82599(hw);
174 174
175 if (got_lock) { 175 if (got_lock) {
@@ -803,12 +803,9 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
803 bool autoneg_wait_to_complete) 803 bool autoneg_wait_to_complete)
804{ 804{
805 s32 status = 0; 805 s32 status = 0;
806 u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); 806 u32 autoc, pma_pmd_1g, link_mode, start_autoc;
807 u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 807 u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
808 u32 start_autoc = autoc;
809 u32 orig_autoc = 0; 808 u32 orig_autoc = 0;
810 u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;
811 u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
812 u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK; 809 u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
813 u32 links_reg; 810 u32 links_reg;
814 u32 i; 811 u32 i;
@@ -831,9 +828,14 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
831 828
832 /* Use stored value (EEPROM defaults) of AUTOC to find KR/KX4 support*/ 829 /* Use stored value (EEPROM defaults) of AUTOC to find KR/KX4 support*/
833 if (hw->mac.orig_link_settings_stored) 830 if (hw->mac.orig_link_settings_stored)
834 orig_autoc = hw->mac.orig_autoc; 831 autoc = hw->mac.orig_autoc;
835 else 832 else
836 orig_autoc = autoc; 833 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
834
835 orig_autoc = autoc;
836 start_autoc = hw->mac.cached_autoc;
837 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;
838 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
837 839
838 if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR || 840 if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR ||
839 link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN || 841 link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN ||
@@ -887,6 +889,7 @@ static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
887 889
888 /* Restart link */ 890 /* Restart link */
889 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); 891 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
892 hw->mac.cached_autoc = autoc;
890 ixgbe_reset_pipeline_82599(hw); 893 ixgbe_reset_pipeline_82599(hw);
891 894
892 if (got_lock) 895 if (got_lock)
@@ -958,7 +961,7 @@ static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
958{ 961{
959 ixgbe_link_speed link_speed; 962 ixgbe_link_speed link_speed;
960 s32 status; 963 s32 status;
961 u32 ctrl, i, autoc, autoc2; 964 u32 ctrl, i, autoc2;
962 u32 curr_lms; 965 u32 curr_lms;
963 bool link_up = false; 966 bool link_up = false;
964 967
@@ -991,8 +994,12 @@ static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)
991 if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL) 994 if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL)
992 hw->phy.ops.reset(hw); 995 hw->phy.ops.reset(hw);
993 996
994 /* remember AUTOC LMS from before we reset */ 997 /* remember AUTOC from before we reset */
995 curr_lms = IXGBE_READ_REG(hw, IXGBE_AUTOC) & IXGBE_AUTOC_LMS_MASK; 998 if (hw->mac.cached_autoc)
999 curr_lms = hw->mac.cached_autoc & IXGBE_AUTOC_LMS_MASK;
1000 else
1001 curr_lms = IXGBE_READ_REG(hw, IXGBE_AUTOC) &
1002 IXGBE_AUTOC_LMS_MASK;
996 1003
997mac_reset_top: 1004mac_reset_top:
998 /* 1005 /*
@@ -1042,10 +1049,10 @@ mac_reset_top:
1042 * stored off yet. Otherwise restore the stored original 1049 * stored off yet. Otherwise restore the stored original
1043 * values since the reset operation sets back to defaults. 1050 * values since the reset operation sets back to defaults.
1044 */ 1051 */
1045 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); 1052 hw->mac.cached_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1046 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 1053 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
1047 if (hw->mac.orig_link_settings_stored == false) { 1054 if (hw->mac.orig_link_settings_stored == false) {
1048 hw->mac.orig_autoc = autoc; 1055 hw->mac.orig_autoc = hw->mac.cached_autoc;
1049 hw->mac.orig_autoc2 = autoc2; 1056 hw->mac.orig_autoc2 = autoc2;
1050 hw->mac.orig_link_settings_stored = true; 1057 hw->mac.orig_link_settings_stored = true;
1051 } else { 1058 } else {
@@ -1062,7 +1069,7 @@ mac_reset_top:
1062 (hw->mac.orig_autoc & ~IXGBE_AUTOC_LMS_MASK) | 1069 (hw->mac.orig_autoc & ~IXGBE_AUTOC_LMS_MASK) |
1063 curr_lms; 1070 curr_lms;
1064 1071
1065 if (autoc != hw->mac.orig_autoc) { 1072 if (hw->mac.cached_autoc != hw->mac.orig_autoc) {
1066 /* Need SW/FW semaphore around AUTOC writes if LESM is 1073 /* Need SW/FW semaphore around AUTOC writes if LESM is
1067 * on, likewise reset_pipeline requires us to hold 1074 * on, likewise reset_pipeline requires us to hold
1068 * this lock as it also writes to AUTOC. 1075 * this lock as it also writes to AUTOC.
@@ -1078,6 +1085,7 @@ mac_reset_top:
1078 } 1085 }
1079 1086
1080 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc); 1087 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc);
1088 hw->mac.cached_autoc = hw->mac.orig_autoc;
1081 ixgbe_reset_pipeline_82599(hw); 1089 ixgbe_reset_pipeline_82599(hw);
1082 1090
1083 if (got_lock) 1091 if (got_lock)
@@ -2181,7 +2189,7 @@ s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw)
2181 s32 i, autoc_reg, ret_val; 2189 s32 i, autoc_reg, ret_val;
2182 s32 anlp1_reg = 0; 2190 s32 anlp1_reg = 0;
2183 2191
2184 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); 2192 autoc_reg = hw->mac.cached_autoc;
2185 autoc_reg |= IXGBE_AUTOC_AN_RESTART; 2193 autoc_reg |= IXGBE_AUTOC_AN_RESTART;
2186 2194
2187 /* Write AUTOC register with toggled LMS[2] bit and Restart_AN */ 2195 /* Write AUTOC register with toggled LMS[2] bit and Restart_AN */
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index 6d7066531139..7480f7b4ac75 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -2928,6 +2928,7 @@ struct ixgbe_mac_info {
2928 u32 max_tx_queues; 2928 u32 max_tx_queues;
2929 u32 max_rx_queues; 2929 u32 max_rx_queues;
2930 u32 orig_autoc; 2930 u32 orig_autoc;
2931 u32 cached_autoc;
2931 u32 orig_autoc2; 2932 u32 orig_autoc2;
2932 bool orig_link_settings_stored; 2933 bool orig_link_settings_stored;
2933 bool autotry_restart; 2934 bool autotry_restart;