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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-08-20 13:42:42 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-08-20 13:42:42 -0400
commit5e47adb90630c6c1b84623d85751618f704fb89d (patch)
tree410ab9ceef8015a6549518ffc64fb57e73448736
parent0de79ffc09a2d28640b4b3d9129080da5646ef25 (diff)
parent87587016f614e96d873f883609a0099e820172e8 (diff)
Merge tag 'iio-for-4.14b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes: Second set of IIO new device support, features and cleanup for the 4.14 cycle. New device support: * ak8974 - support the AMI306. * st_magnetometer - add support for the LIS2MDL with bindings. * rockchip-saradc - add binding for rv1108 SoC (no driver change). * srf08 - add srf02 (i2c only) and srf10 support. * stm32-timer - support for the STM32H7 to existing driver. Features: * tools - move over to the tools buildsystem rather than hand rolling. - add an install section to the build. * ak8974 - use serial number to add device randomness. - add AMI306 calibration data output. * ccs811 - triggered buffer support. * srf08 - add a device tree table as the old style i2c probing is going away, - add triggered buffer support * st32-adc - add optional st,min-sample-time-nsecs binding to allow control of sampling against analog circuitry. * stm32-timer - add output compare triggers. * ti-ads1015 - add threshold event support. * ti-ads7950 - Allow use on ACPI platforms including providing a default reference voltage as there is no way to obtain this on ACPI currently. Cleanup and fixes: * ad7606 - fix an error return code in probe. * ads1015 - fix incorrect data rate setting update when capture in progress, - fix wrong scale information for the ADS1115, - make conversions work when CONFIG_PM is not set, - make sure we don't get a stale result after a runtime resume by ensuring we wait long enough, - avoid returning a false error form the buffer setup callbacks, - add enough wait time to get the correct conversion, - remove an unnecessary config register update, - add a helper to set conversion mode reducing repeated boilerplate, - use devm_iio_triggered_buffer_setup to simplify error and remove paths, - use iio_device_claim_direct_mode instead of opencoding the same. * ak8974 - mark the INT_CLEAR register as precious to prevent debugfs access. * apds9300 - constify the i2c_device_id. * at91-sama5 adc - add missing Kconfig dependency. * bma180 accel - constify the i2c_device_id. * rockchip_saradc - explicitly request exclusive reset control as part of the reset rework on going throughout the kernel. * st_accel - fix drdy configuration for a load of accelerometers that only have the int1 line. Fix is unimportant as presumably no deviec tree actually used the non existent hardware line. * st_pressure - fix drdy configuration for LPS22HB and LPS25H by dropping int2 support as they don't have this. Fix is unimportant as presumably no device tree actually used the non existent hardware line. * stm32-dac - explicitly request exclusive reset control (part of reset being reworked). * tsl2583 - constify the i2c_device_id. * xadc - coding style fixes.
-rw-r--r--Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt1
-rw-r--r--Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt5
-rw-r--r--Documentation/devicetree/bindings/iio/st-sensors.txt1
-rw-r--r--Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt4
-rw-r--r--drivers/iio/accel/bma180.c2
-rw-r--r--drivers/iio/accel/st_accel_core.c4
-rw-r--r--drivers/iio/adc/Kconfig1
-rw-r--r--drivers/iio/adc/rockchip_saradc.c3
-rw-r--r--drivers/iio/adc/stm32-adc.c140
-rw-r--r--drivers/iio/adc/ti-ads1015.c595
-rw-r--r--drivers/iio/adc/ti-ads7950.c42
-rw-r--r--drivers/iio/adc/xilinx-xadc-events.c38
-rw-r--r--drivers/iio/adc/xilinx-xadc.h10
-rw-r--r--drivers/iio/chemical/Kconfig2
-rw-r--r--drivers/iio/chemical/ccs811.c76
-rw-r--r--drivers/iio/dac/stm32-dac-core.c2
-rw-r--r--drivers/iio/light/apds9300.c2
-rw-r--r--drivers/iio/light/tsl2583.c2
-rw-r--r--drivers/iio/magnetometer/Kconfig4
-rw-r--r--drivers/iio/magnetometer/ak8974.c133
-rw-r--r--drivers/iio/magnetometer/st_magn.h1
-rw-r--r--drivers/iio/magnetometer/st_magn_core.c1
-rw-r--r--drivers/iio/magnetometer/st_magn_i2c.c5
-rw-r--r--drivers/iio/magnetometer/st_magn_spi.c5
-rw-r--r--drivers/iio/pressure/st_pressure_core.c4
-rw-r--r--drivers/iio/proximity/Kconfig8
-rw-r--r--drivers/iio/proximity/srf08.c227
-rw-r--r--drivers/iio/trigger/stm32-timer-trigger.c78
-rw-r--r--drivers/staging/iio/adc/ad7606_par.c4
-rw-r--r--include/linux/iio/timer/stm32-timer-trigger.h14
-rw-r--r--tools/Makefile6
-rw-r--r--tools/iio/Build3
-rw-r--r--tools/iio/Makefile76
33 files changed, 1268 insertions, 231 deletions
diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index e0a9b9d6d6fd..c2c50b59873d 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -6,6 +6,7 @@ Required properties:
6 - "rockchip,rk3066-tsadc": for rk3036 6 - "rockchip,rk3066-tsadc": for rk3036
7 - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328 7 - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
8 - "rockchip,rk3399-saradc": for rk3399 8 - "rockchip,rk3399-saradc": for rk3399
9 - "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108
9 10
10- reg: physical base address of the controller and length of memory mapped 11- reg: physical base address of the controller and length of memory mapped
11 region. 12 region.
diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
index 8310073f14e1..48bfcaa3ffcd 100644
--- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
@@ -74,6 +74,11 @@ Optional properties:
74 * can be 6, 8, 10 or 12 on stm32f4 74 * can be 6, 8, 10 or 12 on stm32f4
75 * can be 8, 10, 12, 14 or 16 on stm32h7 75 * can be 8, 10, 12, 14 or 16 on stm32h7
76 Default is maximum resolution if unset. 76 Default is maximum resolution if unset.
77- st,min-sample-time-nsecs: Minimum sampling time in nanoseconds.
78 Depending on hardware (board) e.g. high/low analog input source impedance,
79 fine tune of ADC sampling time may be recommended.
80 This can be either one value or an array that matches 'st,adc-channels' list,
81 to set sample time resp. for all channels, or independently for each channel.
77 82
78Example: 83Example:
79 adc: adc@40012000 { 84 adc: adc@40012000 {
diff --git a/Documentation/devicetree/bindings/iio/st-sensors.txt b/Documentation/devicetree/bindings/iio/st-sensors.txt
index 1e305f61f3df..9ec6f5ce54fc 100644
--- a/Documentation/devicetree/bindings/iio/st-sensors.txt
+++ b/Documentation/devicetree/bindings/iio/st-sensors.txt
@@ -64,6 +64,7 @@ Magnetometers:
64- st,lsm303dlhc-magn 64- st,lsm303dlhc-magn
65- st,lsm303dlm-magn 65- st,lsm303dlm-magn
66- st,lis3mdl-magn 66- st,lis3mdl-magn
67- st,lis2mdl
67 68
68Pressure sensors: 69Pressure sensors:
69- st,lps001wp-press 70- st,lps001wp-press
diff --git a/Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt b/Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
index 6abc755dbf94..b8e8c769d434 100644
--- a/Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
+++ b/Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt
@@ -4,7 +4,9 @@ Must be a sub-node of an STM32 Timers device tree node.
4See ../mfd/stm32-timers.txt for details about the parent node. 4See ../mfd/stm32-timers.txt for details about the parent node.
5 5
6Required parameters: 6Required parameters:
7- compatible: Must be "st,stm32-timer-trigger". 7- compatible: Must be one of:
8 "st,stm32-timer-trigger"
9 "st,stm32h7-timer-trigger"
8- reg: Identify trigger hardware block. 10- reg: Identify trigger hardware block.
9 11
10Example: 12Example:
diff --git a/drivers/iio/accel/bma180.c b/drivers/iio/accel/bma180.c
index efc67739c28f..3dec972ca672 100644
--- a/drivers/iio/accel/bma180.c
+++ b/drivers/iio/accel/bma180.c
@@ -842,7 +842,7 @@ static SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
842#define BMA180_PM_OPS NULL 842#define BMA180_PM_OPS NULL
843#endif 843#endif
844 844
845static struct i2c_device_id bma180_ids[] = { 845static const struct i2c_device_id bma180_ids[] = {
846 { "bma180", BMA180 }, 846 { "bma180", BMA180 },
847 { "bma250", BMA250 }, 847 { "bma250", BMA250 },
848 { } 848 { }
diff --git a/drivers/iio/accel/st_accel_core.c b/drivers/iio/accel/st_accel_core.c
index 1e0eea110fa9..752856b3a849 100644
--- a/drivers/iio/accel/st_accel_core.c
+++ b/drivers/iio/accel/st_accel_core.c
@@ -161,7 +161,7 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
161 .drdy_irq = { 161 .drdy_irq = {
162 .addr = 0x22, 162 .addr = 0x22,
163 .mask_int1 = 0x10, 163 .mask_int1 = 0x10,
164 .mask_int2 = 0x08, 164 .mask_int2 = 0x00,
165 .addr_ihl = 0x25, 165 .addr_ihl = 0x25,
166 .mask_ihl = 0x02, 166 .mask_ihl = 0x02,
167 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 167 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
@@ -637,7 +637,7 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
637 .drdy_irq = { 637 .drdy_irq = {
638 .addr = 0x22, 638 .addr = 0x22,
639 .mask_int1 = 0x10, 639 .mask_int1 = 0x10,
640 .mask_int2 = 0x08, 640 .mask_int2 = 0x00,
641 .addr_ihl = 0x25, 641 .addr_ihl = 0x25,
642 .mask_ihl = 0x02, 642 .mask_ihl = 0x02,
643 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 643 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index e4eeebac5297..57625653fcb6 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -158,6 +158,7 @@ config AT91_SAMA5D2_ADC
158 tristate "Atmel AT91 SAMA5D2 ADC" 158 tristate "Atmel AT91 SAMA5D2 ADC"
159 depends on ARCH_AT91 || COMPILE_TEST 159 depends on ARCH_AT91 || COMPILE_TEST
160 depends on HAS_IOMEM 160 depends on HAS_IOMEM
161 select IIO_TRIGGERED_BUFFER
161 help 162 help
162 Say yes here to build support for Atmel SAMA5D2 ADC which is 163 Say yes here to build support for Atmel SAMA5D2 ADC which is
163 available on SAMA5D2 SoC family. 164 available on SAMA5D2 SoC family.
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index 2bf2ed15a870..5f612d694b33 100644
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -240,7 +240,8 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
240 * The reset should be an optional property, as it should work 240 * The reset should be an optional property, as it should work
241 * with old devicetrees as well 241 * with old devicetrees as well
242 */ 242 */
243 info->reset = devm_reset_control_get(&pdev->dev, "saradc-apb"); 243 info->reset = devm_reset_control_get_exclusive(&pdev->dev,
244 "saradc-apb");
244 if (IS_ERR(info->reset)) { 245 if (IS_ERR(info->reset)) {
245 ret = PTR_ERR(info->reset); 246 ret = PTR_ERR(info->reset);
246 if (ret != -ENOENT) 247 if (ret != -ENOENT)
diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 5bfcc1f13105..6bc602891f2f 100644
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -83,6 +83,8 @@
83#define STM32H7_ADC_IER 0x04 83#define STM32H7_ADC_IER 0x04
84#define STM32H7_ADC_CR 0x08 84#define STM32H7_ADC_CR 0x08
85#define STM32H7_ADC_CFGR 0x0C 85#define STM32H7_ADC_CFGR 0x0C
86#define STM32H7_ADC_SMPR1 0x14
87#define STM32H7_ADC_SMPR2 0x18
86#define STM32H7_ADC_PCSEL 0x1C 88#define STM32H7_ADC_PCSEL 0x1C
87#define STM32H7_ADC_SQR1 0x30 89#define STM32H7_ADC_SQR1 0x30
88#define STM32H7_ADC_SQR2 0x34 90#define STM32H7_ADC_SQR2 0x34
@@ -151,6 +153,7 @@ enum stm32h7_adc_dmngt {
151#define STM32H7_BOOST_CLKRATE 20000000UL 153#define STM32H7_BOOST_CLKRATE 20000000UL
152 154
153#define STM32_ADC_MAX_SQ 16 /* SQ1..SQ16 */ 155#define STM32_ADC_MAX_SQ 16 /* SQ1..SQ16 */
156#define STM32_ADC_MAX_SMP 7 /* SMPx range is [0..7] */
154#define STM32_ADC_TIMEOUT_US 100000 157#define STM32_ADC_TIMEOUT_US 100000
155#define STM32_ADC_TIMEOUT (msecs_to_jiffies(STM32_ADC_TIMEOUT_US / 1000)) 158#define STM32_ADC_TIMEOUT (msecs_to_jiffies(STM32_ADC_TIMEOUT_US / 1000))
156 159
@@ -227,6 +230,8 @@ struct stm32_adc_regs {
227 * @exten: trigger control register & bitfield 230 * @exten: trigger control register & bitfield
228 * @extsel: trigger selection register & bitfield 231 * @extsel: trigger selection register & bitfield
229 * @res: resolution selection register & bitfield 232 * @res: resolution selection register & bitfield
233 * @smpr: smpr1 & smpr2 registers offset array
234 * @smp_bits: smpr1 & smpr2 index and bitfields
230 */ 235 */
231struct stm32_adc_regspec { 236struct stm32_adc_regspec {
232 const u32 dr; 237 const u32 dr;
@@ -236,6 +241,8 @@ struct stm32_adc_regspec {
236 const struct stm32_adc_regs exten; 241 const struct stm32_adc_regs exten;
237 const struct stm32_adc_regs extsel; 242 const struct stm32_adc_regs extsel;
238 const struct stm32_adc_regs res; 243 const struct stm32_adc_regs res;
244 const u32 smpr[2];
245 const struct stm32_adc_regs *smp_bits;
239}; 246};
240 247
241struct stm32_adc; 248struct stm32_adc;
@@ -251,6 +258,7 @@ struct stm32_adc;
251 * @start_conv: routine to start conversions 258 * @start_conv: routine to start conversions
252 * @stop_conv: routine to stop conversions 259 * @stop_conv: routine to stop conversions
253 * @unprepare: optional unprepare routine (disable, power-down) 260 * @unprepare: optional unprepare routine (disable, power-down)
261 * @smp_cycles: programmable sampling time (ADC clock cycles)
254 */ 262 */
255struct stm32_adc_cfg { 263struct stm32_adc_cfg {
256 const struct stm32_adc_regspec *regs; 264 const struct stm32_adc_regspec *regs;
@@ -262,6 +270,7 @@ struct stm32_adc_cfg {
262 void (*start_conv)(struct stm32_adc *, bool dma); 270 void (*start_conv)(struct stm32_adc *, bool dma);
263 void (*stop_conv)(struct stm32_adc *); 271 void (*stop_conv)(struct stm32_adc *);
264 void (*unprepare)(struct stm32_adc *); 272 void (*unprepare)(struct stm32_adc *);
273 const unsigned int *smp_cycles;
265}; 274};
266 275
267/** 276/**
@@ -283,6 +292,7 @@ struct stm32_adc_cfg {
283 * @rx_dma_buf: dma rx buffer bus address 292 * @rx_dma_buf: dma rx buffer bus address
284 * @rx_buf_sz: dma rx buffer size 293 * @rx_buf_sz: dma rx buffer size
285 * @pcsel bitmask to preselect channels on some devices 294 * @pcsel bitmask to preselect channels on some devices
295 * @smpr_val: sampling time settings (e.g. smpr1 / smpr2)
286 * @cal: optional calibration data on some devices 296 * @cal: optional calibration data on some devices
287 */ 297 */
288struct stm32_adc { 298struct stm32_adc {
@@ -303,6 +313,7 @@ struct stm32_adc {
303 dma_addr_t rx_dma_buf; 313 dma_addr_t rx_dma_buf;
304 unsigned int rx_buf_sz; 314 unsigned int rx_buf_sz;
305 u32 pcsel; 315 u32 pcsel;
316 u32 smpr_val[2];
306 struct stm32_adc_calib cal; 317 struct stm32_adc_calib cal;
307}; 318};
308 319
@@ -431,6 +442,39 @@ static struct stm32_adc_trig_info stm32f4_adc_trigs[] = {
431 {}, /* sentinel */ 442 {}, /* sentinel */
432}; 443};
433 444
445/**
446 * stm32f4_smp_bits[] - describe sampling time register index & bit fields
447 * Sorted so it can be indexed by channel number.
448 */
449static const struct stm32_adc_regs stm32f4_smp_bits[] = {
450 /* STM32F4_ADC_SMPR2: smpr[] index, mask, shift for SMP0 to SMP9 */
451 { 1, GENMASK(2, 0), 0 },
452 { 1, GENMASK(5, 3), 3 },
453 { 1, GENMASK(8, 6), 6 },
454 { 1, GENMASK(11, 9), 9 },
455 { 1, GENMASK(14, 12), 12 },
456 { 1, GENMASK(17, 15), 15 },
457 { 1, GENMASK(20, 18), 18 },
458 { 1, GENMASK(23, 21), 21 },
459 { 1, GENMASK(26, 24), 24 },
460 { 1, GENMASK(29, 27), 27 },
461 /* STM32F4_ADC_SMPR1, smpr[] index, mask, shift for SMP10 to SMP18 */
462 { 0, GENMASK(2, 0), 0 },
463 { 0, GENMASK(5, 3), 3 },
464 { 0, GENMASK(8, 6), 6 },
465 { 0, GENMASK(11, 9), 9 },
466 { 0, GENMASK(14, 12), 12 },
467 { 0, GENMASK(17, 15), 15 },
468 { 0, GENMASK(20, 18), 18 },
469 { 0, GENMASK(23, 21), 21 },
470 { 0, GENMASK(26, 24), 24 },
471};
472
473/* STM32F4 programmable sampling time (ADC clock cycles) */
474static const unsigned int stm32f4_adc_smp_cycles[STM32_ADC_MAX_SMP + 1] = {
475 3, 15, 28, 56, 84, 112, 144, 480,
476};
477
434static const struct stm32_adc_regspec stm32f4_adc_regspec = { 478static const struct stm32_adc_regspec stm32f4_adc_regspec = {
435 .dr = STM32F4_ADC_DR, 479 .dr = STM32F4_ADC_DR,
436 .ier_eoc = { STM32F4_ADC_CR1, STM32F4_EOCIE }, 480 .ier_eoc = { STM32F4_ADC_CR1, STM32F4_EOCIE },
@@ -440,6 +484,8 @@ static const struct stm32_adc_regspec stm32f4_adc_regspec = {
440 .extsel = { STM32F4_ADC_CR2, STM32F4_EXTSEL_MASK, 484 .extsel = { STM32F4_ADC_CR2, STM32F4_EXTSEL_MASK,
441 STM32F4_EXTSEL_SHIFT }, 485 STM32F4_EXTSEL_SHIFT },
442 .res = { STM32F4_ADC_CR1, STM32F4_RES_MASK, STM32F4_RES_SHIFT }, 486 .res = { STM32F4_ADC_CR1, STM32F4_RES_MASK, STM32F4_RES_SHIFT },
487 .smpr = { STM32F4_ADC_SMPR1, STM32F4_ADC_SMPR2 },
488 .smp_bits = stm32f4_smp_bits,
443}; 489};
444 490
445static const struct stm32_adc_regs stm32h7_sq[STM32_ADC_MAX_SQ + 1] = { 491static const struct stm32_adc_regs stm32h7_sq[STM32_ADC_MAX_SQ + 1] = {
@@ -483,6 +529,40 @@ static struct stm32_adc_trig_info stm32h7_adc_trigs[] = {
483 {}, 529 {},
484}; 530};
485 531
532/**
533 * stm32h7_smp_bits - describe sampling time register index & bit fields
534 * Sorted so it can be indexed by channel number.
535 */
536static const struct stm32_adc_regs stm32h7_smp_bits[] = {
537 /* STM32H7_ADC_SMPR1, smpr[] index, mask, shift for SMP0 to SMP9 */
538 { 0, GENMASK(2, 0), 0 },
539 { 0, GENMASK(5, 3), 3 },
540 { 0, GENMASK(8, 6), 6 },
541 { 0, GENMASK(11, 9), 9 },
542 { 0, GENMASK(14, 12), 12 },
543 { 0, GENMASK(17, 15), 15 },
544 { 0, GENMASK(20, 18), 18 },
545 { 0, GENMASK(23, 21), 21 },
546 { 0, GENMASK(26, 24), 24 },
547 { 0, GENMASK(29, 27), 27 },
548 /* STM32H7_ADC_SMPR2, smpr[] index, mask, shift for SMP10 to SMP19 */
549 { 1, GENMASK(2, 0), 0 },
550 { 1, GENMASK(5, 3), 3 },
551 { 1, GENMASK(8, 6), 6 },
552 { 1, GENMASK(11, 9), 9 },
553 { 1, GENMASK(14, 12), 12 },
554 { 1, GENMASK(17, 15), 15 },
555 { 1, GENMASK(20, 18), 18 },
556 { 1, GENMASK(23, 21), 21 },
557 { 1, GENMASK(26, 24), 24 },
558 { 1, GENMASK(29, 27), 27 },
559};
560
561/* STM32H7 programmable sampling time (ADC clock cycles, rounded down) */
562static const unsigned int stm32h7_adc_smp_cycles[STM32_ADC_MAX_SMP + 1] = {
563 1, 2, 8, 16, 32, 64, 387, 810,
564};
565
486static const struct stm32_adc_regspec stm32h7_adc_regspec = { 566static const struct stm32_adc_regspec stm32h7_adc_regspec = {
487 .dr = STM32H7_ADC_DR, 567 .dr = STM32H7_ADC_DR,
488 .ier_eoc = { STM32H7_ADC_IER, STM32H7_EOCIE }, 568 .ier_eoc = { STM32H7_ADC_IER, STM32H7_EOCIE },
@@ -492,6 +572,8 @@ static const struct stm32_adc_regspec stm32h7_adc_regspec = {
492 .extsel = { STM32H7_ADC_CFGR, STM32H7_EXTSEL_MASK, 572 .extsel = { STM32H7_ADC_CFGR, STM32H7_EXTSEL_MASK,
493 STM32H7_EXTSEL_SHIFT }, 573 STM32H7_EXTSEL_SHIFT },
494 .res = { STM32H7_ADC_CFGR, STM32H7_RES_MASK, STM32H7_RES_SHIFT }, 574 .res = { STM32H7_ADC_CFGR, STM32H7_RES_MASK, STM32H7_RES_SHIFT },
575 .smpr = { STM32H7_ADC_SMPR1, STM32H7_ADC_SMPR2 },
576 .smp_bits = stm32h7_smp_bits,
495}; 577};
496 578
497/** 579/**
@@ -933,6 +1015,7 @@ static void stm32h7_adc_unprepare(struct stm32_adc *adc)
933 * @scan_mask: channels to be converted 1015 * @scan_mask: channels to be converted
934 * 1016 *
935 * Conversion sequence : 1017 * Conversion sequence :
1018 * Apply sampling time settings for all channels.
936 * Configure ADC scan sequence based on selected channels in scan_mask. 1019 * Configure ADC scan sequence based on selected channels in scan_mask.
937 * Add channels to SQR registers, from scan_mask LSB to MSB, then 1020 * Add channels to SQR registers, from scan_mask LSB to MSB, then
938 * program sequence len. 1021 * program sequence len.
@@ -946,6 +1029,10 @@ static int stm32_adc_conf_scan_seq(struct iio_dev *indio_dev,
946 u32 val, bit; 1029 u32 val, bit;
947 int i = 0; 1030 int i = 0;
948 1031
1032 /* Apply sampling time settings */
1033 stm32_adc_writel(adc, adc->cfg->regs->smpr[0], adc->smpr_val[0]);
1034 stm32_adc_writel(adc, adc->cfg->regs->smpr[1], adc->smpr_val[1]);
1035
949 for_each_set_bit(bit, scan_mask, indio_dev->masklength) { 1036 for_each_set_bit(bit, scan_mask, indio_dev->masklength) {
950 chan = indio_dev->channels + bit; 1037 chan = indio_dev->channels + bit;
951 /* 1038 /*
@@ -1079,6 +1166,7 @@ static const struct iio_enum stm32_adc_trig_pol = {
1079 * @res: conversion result 1166 * @res: conversion result
1080 * 1167 *
1081 * The function performs a single conversion on a given channel: 1168 * The function performs a single conversion on a given channel:
1169 * - Apply sampling time settings
1082 * - Program sequencer with one channel (e.g. in SQ1 with len = 1) 1170 * - Program sequencer with one channel (e.g. in SQ1 with len = 1)
1083 * - Use SW trigger 1171 * - Use SW trigger
1084 * - Start conversion, then wait for interrupt completion. 1172 * - Start conversion, then wait for interrupt completion.
@@ -1103,6 +1191,10 @@ static int stm32_adc_single_conv(struct iio_dev *indio_dev,
1103 return ret; 1191 return ret;
1104 } 1192 }
1105 1193
1194 /* Apply sampling time settings */
1195 stm32_adc_writel(adc, regs->smpr[0], adc->smpr_val[0]);
1196 stm32_adc_writel(adc, regs->smpr[1], adc->smpr_val[1]);
1197
1106 /* Program chan number in regular sequence (SQ1) */ 1198 /* Program chan number in regular sequence (SQ1) */
1107 val = stm32_adc_readl(adc, regs->sqr[1].reg); 1199 val = stm32_adc_readl(adc, regs->sqr[1].reg);
1108 val &= ~regs->sqr[1].mask; 1200 val &= ~regs->sqr[1].mask;
@@ -1507,10 +1599,28 @@ static int stm32_adc_of_get_resolution(struct iio_dev *indio_dev)
1507 return 0; 1599 return 0;
1508} 1600}
1509 1601
1602static void stm32_adc_smpr_init(struct stm32_adc *adc, int channel, u32 smp_ns)
1603{
1604 const struct stm32_adc_regs *smpr = &adc->cfg->regs->smp_bits[channel];
1605 u32 period_ns, shift = smpr->shift, mask = smpr->mask;
1606 unsigned int smp, r = smpr->reg;
1607
1608 /* Determine sampling time (ADC clock cycles) */
1609 period_ns = NSEC_PER_SEC / adc->common->rate;
1610 for (smp = 0; smp <= STM32_ADC_MAX_SMP; smp++)
1611 if ((period_ns * adc->cfg->smp_cycles[smp]) >= smp_ns)
1612 break;
1613 if (smp > STM32_ADC_MAX_SMP)
1614 smp = STM32_ADC_MAX_SMP;
1615
1616 /* pre-build sampling time registers (e.g. smpr1, smpr2) */
1617 adc->smpr_val[r] = (adc->smpr_val[r] & ~mask) | (smp << shift);
1618}
1619
1510static void stm32_adc_chan_init_one(struct iio_dev *indio_dev, 1620static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
1511 struct iio_chan_spec *chan, 1621 struct iio_chan_spec *chan,
1512 const struct stm32_adc_chan_spec *channel, 1622 const struct stm32_adc_chan_spec *channel,
1513 int scan_index) 1623 int scan_index, u32 smp)
1514{ 1624{
1515 struct stm32_adc *adc = iio_priv(indio_dev); 1625 struct stm32_adc *adc = iio_priv(indio_dev);
1516 1626
@@ -1526,6 +1636,9 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
1526 chan->scan_type.storagebits = 16; 1636 chan->scan_type.storagebits = 16;
1527 chan->ext_info = stm32_adc_ext_info; 1637 chan->ext_info = stm32_adc_ext_info;
1528 1638
1639 /* Prepare sampling time settings */
1640 stm32_adc_smpr_init(adc, chan->channel, smp);
1641
1529 /* pre-build selected channels mask */ 1642 /* pre-build selected channels mask */
1530 adc->pcsel |= BIT(chan->channel); 1643 adc->pcsel |= BIT(chan->channel);
1531} 1644}
@@ -1538,8 +1651,8 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
1538 struct property *prop; 1651 struct property *prop;
1539 const __be32 *cur; 1652 const __be32 *cur;
1540 struct iio_chan_spec *channels; 1653 struct iio_chan_spec *channels;
1541 int scan_index = 0, num_channels; 1654 int scan_index = 0, num_channels, ret;
1542 u32 val; 1655 u32 val, smp = 0;
1543 1656
1544 num_channels = of_property_count_u32_elems(node, "st,adc-channels"); 1657 num_channels = of_property_count_u32_elems(node, "st,adc-channels");
1545 if (num_channels < 0 || 1658 if (num_channels < 0 ||
@@ -1548,6 +1661,13 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
1548 return num_channels < 0 ? num_channels : -EINVAL; 1661 return num_channels < 0 ? num_channels : -EINVAL;
1549 } 1662 }
1550 1663
1664 /* Optional sample time is provided either for each, or all channels */
1665 ret = of_property_count_u32_elems(node, "st,min-sample-time-nsecs");
1666 if (ret > 1 && ret != num_channels) {
1667 dev_err(&indio_dev->dev, "Invalid st,min-sample-time-nsecs\n");
1668 return -EINVAL;
1669 }
1670
1551 channels = devm_kcalloc(&indio_dev->dev, num_channels, 1671 channels = devm_kcalloc(&indio_dev->dev, num_channels,
1552 sizeof(struct iio_chan_spec), GFP_KERNEL); 1672 sizeof(struct iio_chan_spec), GFP_KERNEL);
1553 if (!channels) 1673 if (!channels)
@@ -1558,9 +1678,19 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
1558 dev_err(&indio_dev->dev, "Invalid channel %d\n", val); 1678 dev_err(&indio_dev->dev, "Invalid channel %d\n", val);
1559 return -EINVAL; 1679 return -EINVAL;
1560 } 1680 }
1681
1682 /*
1683 * Using of_property_read_u32_index(), smp value will only be
1684 * modified if valid u32 value can be decoded. This allows to
1685 * get either no value, 1 shared value for all indexes, or one
1686 * value per channel.
1687 */
1688 of_property_read_u32_index(node, "st,min-sample-time-nsecs",
1689 scan_index, &smp);
1690
1561 stm32_adc_chan_init_one(indio_dev, &channels[scan_index], 1691 stm32_adc_chan_init_one(indio_dev, &channels[scan_index],
1562 &adc_info->channels[val], 1692 &adc_info->channels[val],
1563 scan_index); 1693 scan_index, smp);
1564 scan_index++; 1694 scan_index++;
1565 } 1695 }
1566 1696
@@ -1755,6 +1885,7 @@ static const struct stm32_adc_cfg stm32f4_adc_cfg = {
1755 .clk_required = true, 1885 .clk_required = true,
1756 .start_conv = stm32f4_adc_start_conv, 1886 .start_conv = stm32f4_adc_start_conv,
1757 .stop_conv = stm32f4_adc_stop_conv, 1887 .stop_conv = stm32f4_adc_stop_conv,
1888 .smp_cycles = stm32f4_adc_smp_cycles,
1758}; 1889};
1759 1890
1760static const struct stm32_adc_cfg stm32h7_adc_cfg = { 1891static const struct stm32_adc_cfg stm32h7_adc_cfg = {
@@ -1766,6 +1897,7 @@ static const struct stm32_adc_cfg stm32h7_adc_cfg = {
1766 .stop_conv = stm32h7_adc_stop_conv, 1897 .stop_conv = stm32h7_adc_stop_conv,
1767 .prepare = stm32h7_adc_prepare, 1898 .prepare = stm32h7_adc_prepare,
1768 .unprepare = stm32h7_adc_unprepare, 1899 .unprepare = stm32h7_adc_unprepare,
1900 .smp_cycles = stm32h7_adc_smp_cycles,
1769}; 1901};
1770 1902
1771static const struct of_device_id stm32_adc_of_match[] = { 1903static const struct of_device_id stm32_adc_of_match[] = {
diff --git a/drivers/iio/adc/ti-ads1015.c b/drivers/iio/adc/ti-ads1015.c
index 7972845b3823..d1210024f6bc 100644
--- a/drivers/iio/adc/ti-ads1015.c
+++ b/drivers/iio/adc/ti-ads1015.c
@@ -17,6 +17,7 @@
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/of_device.h> 18#include <linux/of_device.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/irq.h>
20#include <linux/i2c.h> 21#include <linux/i2c.h>
21#include <linux/regmap.h> 22#include <linux/regmap.h>
22#include <linux/pm_runtime.h> 23#include <linux/pm_runtime.h>
@@ -28,6 +29,7 @@
28#include <linux/iio/iio.h> 29#include <linux/iio/iio.h>
29#include <linux/iio/types.h> 30#include <linux/iio/types.h>
30#include <linux/iio/sysfs.h> 31#include <linux/iio/sysfs.h>
32#include <linux/iio/events.h>
31#include <linux/iio/buffer.h> 33#include <linux/iio/buffer.h>
32#include <linux/iio/triggered_buffer.h> 34#include <linux/iio/triggered_buffer.h>
33#include <linux/iio/trigger_consumer.h> 35#include <linux/iio/trigger_consumer.h>
@@ -36,17 +38,38 @@
36 38
37#define ADS1015_CONV_REG 0x00 39#define ADS1015_CONV_REG 0x00
38#define ADS1015_CFG_REG 0x01 40#define ADS1015_CFG_REG 0x01
41#define ADS1015_LO_THRESH_REG 0x02
42#define ADS1015_HI_THRESH_REG 0x03
39 43
44#define ADS1015_CFG_COMP_QUE_SHIFT 0
45#define ADS1015_CFG_COMP_LAT_SHIFT 2
46#define ADS1015_CFG_COMP_POL_SHIFT 3
47#define ADS1015_CFG_COMP_MODE_SHIFT 4
40#define ADS1015_CFG_DR_SHIFT 5 48#define ADS1015_CFG_DR_SHIFT 5
41#define ADS1015_CFG_MOD_SHIFT 8 49#define ADS1015_CFG_MOD_SHIFT 8
42#define ADS1015_CFG_PGA_SHIFT 9 50#define ADS1015_CFG_PGA_SHIFT 9
43#define ADS1015_CFG_MUX_SHIFT 12 51#define ADS1015_CFG_MUX_SHIFT 12
44 52
53#define ADS1015_CFG_COMP_QUE_MASK GENMASK(1, 0)
54#define ADS1015_CFG_COMP_LAT_MASK BIT(2)
55#define ADS1015_CFG_COMP_POL_MASK BIT(2)
56#define ADS1015_CFG_COMP_MODE_MASK BIT(4)
45#define ADS1015_CFG_DR_MASK GENMASK(7, 5) 57#define ADS1015_CFG_DR_MASK GENMASK(7, 5)
46#define ADS1015_CFG_MOD_MASK BIT(8) 58#define ADS1015_CFG_MOD_MASK BIT(8)
47#define ADS1015_CFG_PGA_MASK GENMASK(11, 9) 59#define ADS1015_CFG_PGA_MASK GENMASK(11, 9)
48#define ADS1015_CFG_MUX_MASK GENMASK(14, 12) 60#define ADS1015_CFG_MUX_MASK GENMASK(14, 12)
49 61
62/* Comparator queue and disable field */
63#define ADS1015_CFG_COMP_DISABLE 3
64
65/* Comparator polarity field */
66#define ADS1015_CFG_COMP_POL_LOW 0
67#define ADS1015_CFG_COMP_POL_HIGH 1
68
69/* Comparator mode field */
70#define ADS1015_CFG_COMP_MODE_TRAD 0
71#define ADS1015_CFG_COMP_MODE_WINDOW 1
72
50/* device operating modes */ 73/* device operating modes */
51#define ADS1015_CONTINUOUS 0 74#define ADS1015_CONTINUOUS 0
52#define ADS1015_SINGLESHOT 1 75#define ADS1015_SINGLESHOT 1
@@ -81,18 +104,36 @@ static const unsigned int ads1115_data_rate[] = {
81 8, 16, 32, 64, 128, 250, 475, 860 104 8, 16, 32, 64, 128, 250, 475, 860
82}; 105};
83 106
84static const struct { 107/*
85 int scale; 108 * Translation from PGA bits to full-scale positive and negative input voltage
86 int uscale; 109 * range in mV
87} ads1015_scale[] = { 110 */
88 {3, 0}, 111static int ads1015_fullscale_range[] = {
89 {2, 0}, 112 6144, 4096, 2048, 1024, 512, 256, 256, 256
90 {1, 0}, 113};
91 {0, 500000}, 114
92 {0, 250000}, 115/*
93 {0, 125000}, 116 * Translation from COMP_QUE field value to the number of successive readings
94 {0, 125000}, 117 * exceed the threshold values before an interrupt is generated
95 {0, 125000}, 118 */
119static const int ads1015_comp_queue[] = { 1, 2, 4 };
120
121static const struct iio_event_spec ads1015_events[] = {
122 {
123 .type = IIO_EV_TYPE_THRESH,
124 .dir = IIO_EV_DIR_RISING,
125 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
126 BIT(IIO_EV_INFO_ENABLE),
127 }, {
128 .type = IIO_EV_TYPE_THRESH,
129 .dir = IIO_EV_DIR_FALLING,
130 .mask_separate = BIT(IIO_EV_INFO_VALUE),
131 }, {
132 .type = IIO_EV_TYPE_THRESH,
133 .dir = IIO_EV_DIR_EITHER,
134 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
135 BIT(IIO_EV_INFO_PERIOD),
136 },
96}; 137};
97 138
98#define ADS1015_V_CHAN(_chan, _addr) { \ 139#define ADS1015_V_CHAN(_chan, _addr) { \
@@ -111,6 +152,8 @@ static const struct {
111 .shift = 4, \ 152 .shift = 4, \
112 .endianness = IIO_CPU, \ 153 .endianness = IIO_CPU, \
113 }, \ 154 }, \
155 .event_spec = ads1015_events, \
156 .num_event_specs = ARRAY_SIZE(ads1015_events), \
114 .datasheet_name = "AIN"#_chan, \ 157 .datasheet_name = "AIN"#_chan, \
115} 158}
116 159
@@ -132,6 +175,8 @@ static const struct {
132 .shift = 4, \ 175 .shift = 4, \
133 .endianness = IIO_CPU, \ 176 .endianness = IIO_CPU, \
134 }, \ 177 }, \
178 .event_spec = ads1015_events, \
179 .num_event_specs = ARRAY_SIZE(ads1015_events), \
135 .datasheet_name = "AIN"#_chan"-AIN"#_chan2, \ 180 .datasheet_name = "AIN"#_chan"-AIN"#_chan2, \
136} 181}
137 182
@@ -150,6 +195,8 @@ static const struct {
150 .storagebits = 16, \ 195 .storagebits = 16, \
151 .endianness = IIO_CPU, \ 196 .endianness = IIO_CPU, \
152 }, \ 197 }, \
198 .event_spec = ads1015_events, \
199 .num_event_specs = ARRAY_SIZE(ads1015_events), \
153 .datasheet_name = "AIN"#_chan, \ 200 .datasheet_name = "AIN"#_chan, \
154} 201}
155 202
@@ -170,9 +217,17 @@ static const struct {
170 .storagebits = 16, \ 217 .storagebits = 16, \
171 .endianness = IIO_CPU, \ 218 .endianness = IIO_CPU, \
172 }, \ 219 }, \
220 .event_spec = ads1015_events, \
221 .num_event_specs = ARRAY_SIZE(ads1015_events), \
173 .datasheet_name = "AIN"#_chan"-AIN"#_chan2, \ 222 .datasheet_name = "AIN"#_chan"-AIN"#_chan2, \
174} 223}
175 224
225struct ads1015_thresh_data {
226 unsigned int comp_queue;
227 int high_thresh;
228 int low_thresh;
229};
230
176struct ads1015_data { 231struct ads1015_data {
177 struct regmap *regmap; 232 struct regmap *regmap;
178 /* 233 /*
@@ -182,18 +237,54 @@ struct ads1015_data {
182 struct mutex lock; 237 struct mutex lock;
183 struct ads1015_channel_data channel_data[ADS1015_CHANNELS]; 238 struct ads1015_channel_data channel_data[ADS1015_CHANNELS];
184 239
240 unsigned int event_channel;
241 unsigned int comp_mode;
242 struct ads1015_thresh_data thresh_data[ADS1015_CHANNELS];
243
185 unsigned int *data_rate; 244 unsigned int *data_rate;
245 /*
246 * Set to true when the ADC is switched to the continuous-conversion
247 * mode and exits from a power-down state. This flag is used to avoid
248 * getting the stale result from the conversion register.
249 */
250 bool conv_invalid;
186}; 251};
187 252
253static bool ads1015_event_channel_enabled(struct ads1015_data *data)
254{
255 return (data->event_channel != ADS1015_CHANNELS);
256}
257
258static void ads1015_event_channel_enable(struct ads1015_data *data, int chan,
259 int comp_mode)
260{
261 WARN_ON(ads1015_event_channel_enabled(data));
262
263 data->event_channel = chan;
264 data->comp_mode = comp_mode;
265}
266
267static void ads1015_event_channel_disable(struct ads1015_data *data, int chan)
268{
269 data->event_channel = ADS1015_CHANNELS;
270}
271
188static bool ads1015_is_writeable_reg(struct device *dev, unsigned int reg) 272static bool ads1015_is_writeable_reg(struct device *dev, unsigned int reg)
189{ 273{
190 return (reg == ADS1015_CFG_REG); 274 switch (reg) {
275 case ADS1015_CFG_REG:
276 case ADS1015_LO_THRESH_REG:
277 case ADS1015_HI_THRESH_REG:
278 return true;
279 default:
280 return false;
281 }
191} 282}
192 283
193static const struct regmap_config ads1015_regmap_config = { 284static const struct regmap_config ads1015_regmap_config = {
194 .reg_bits = 8, 285 .reg_bits = 8,
195 .val_bits = 16, 286 .val_bits = 16,
196 .max_register = ADS1015_CFG_REG, 287 .max_register = ADS1015_HI_THRESH_REG,
197 .writeable_reg = ads1015_is_writeable_reg, 288 .writeable_reg = ads1015_is_writeable_reg,
198}; 289};
199 290
@@ -235,33 +326,51 @@ static int ads1015_set_power_state(struct ads1015_data *data, bool on)
235 ret = pm_runtime_put_autosuspend(dev); 326 ret = pm_runtime_put_autosuspend(dev);
236 } 327 }
237 328
238 return ret; 329 return ret < 0 ? ret : 0;
239} 330}
240 331
241static 332static
242int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val) 333int ads1015_get_adc_result(struct ads1015_data *data, int chan, int *val)
243{ 334{
244 int ret, pga, dr, conv_time; 335 int ret, pga, dr, conv_time;
245 bool change; 336 unsigned int old, mask, cfg;
246 337
247 if (chan < 0 || chan >= ADS1015_CHANNELS) 338 if (chan < 0 || chan >= ADS1015_CHANNELS)
248 return -EINVAL; 339 return -EINVAL;
249 340
341 ret = regmap_read(data->regmap, ADS1015_CFG_REG, &old);
342 if (ret)
343 return ret;
344
250 pga = data->channel_data[chan].pga; 345 pga = data->channel_data[chan].pga;
251 dr = data->channel_data[chan].data_rate; 346 dr = data->channel_data[chan].data_rate;
347 mask = ADS1015_CFG_MUX_MASK | ADS1015_CFG_PGA_MASK |
348 ADS1015_CFG_DR_MASK;
349 cfg = chan << ADS1015_CFG_MUX_SHIFT | pga << ADS1015_CFG_PGA_SHIFT |
350 dr << ADS1015_CFG_DR_SHIFT;
351
352 if (ads1015_event_channel_enabled(data)) {
353 mask |= ADS1015_CFG_COMP_QUE_MASK | ADS1015_CFG_COMP_MODE_MASK;
354 cfg |= data->thresh_data[chan].comp_queue <<
355 ADS1015_CFG_COMP_QUE_SHIFT |
356 data->comp_mode <<
357 ADS1015_CFG_COMP_MODE_SHIFT;
358 }
252 359
253 ret = regmap_update_bits_check(data->regmap, ADS1015_CFG_REG, 360 cfg = (old & ~mask) | (cfg & mask);
254 ADS1015_CFG_MUX_MASK | 361
255 ADS1015_CFG_PGA_MASK, 362 ret = regmap_write(data->regmap, ADS1015_CFG_REG, cfg);
256 chan << ADS1015_CFG_MUX_SHIFT | 363 if (ret)
257 pga << ADS1015_CFG_PGA_SHIFT,
258 &change);
259 if (ret < 0)
260 return ret; 364 return ret;
261 365
262 if (change) { 366 if (old != cfg || data->conv_invalid) {
263 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]); 367 int dr_old = (old & ADS1015_CFG_DR_MASK) >>
368 ADS1015_CFG_DR_SHIFT;
369
370 conv_time = DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr_old]);
371 conv_time += DIV_ROUND_UP(USEC_PER_SEC, data->data_rate[dr]);
264 usleep_range(conv_time, conv_time + 1); 372 usleep_range(conv_time, conv_time + 1);
373 data->conv_invalid = false;
265 } 374 }
266 375
267 return regmap_read(data->regmap, ADS1015_CONV_REG, val); 376 return regmap_read(data->regmap, ADS1015_CONV_REG, val);
@@ -298,52 +407,36 @@ err:
298 return IRQ_HANDLED; 407 return IRQ_HANDLED;
299} 408}
300 409
301static int ads1015_set_scale(struct ads1015_data *data, int chan, 410static int ads1015_set_scale(struct ads1015_data *data,
411 struct iio_chan_spec const *chan,
302 int scale, int uscale) 412 int scale, int uscale)
303{ 413{
304 int i, ret, rindex = -1; 414 int i;
305 415 int fullscale = div_s64((scale * 1000000LL + uscale) <<
306 for (i = 0; i < ARRAY_SIZE(ads1015_scale); i++) 416 (chan->scan_type.realbits - 1), 1000000);
307 if (ads1015_scale[i].scale == scale && 417
308 ads1015_scale[i].uscale == uscale) { 418 for (i = 0; i < ARRAY_SIZE(ads1015_fullscale_range); i++) {
309 rindex = i; 419 if (ads1015_fullscale_range[i] == fullscale) {
310 break; 420 data->channel_data[chan->address].pga = i;
421 return 0;
311 } 422 }
312 if (rindex < 0) 423 }
313 return -EINVAL;
314
315 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
316 ADS1015_CFG_PGA_MASK,
317 rindex << ADS1015_CFG_PGA_SHIFT);
318 if (ret < 0)
319 return ret;
320
321 data->channel_data[chan].pga = rindex;
322 424
323 return 0; 425 return -EINVAL;
324} 426}
325 427
326static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate) 428static int ads1015_set_data_rate(struct ads1015_data *data, int chan, int rate)
327{ 429{
328 int i, ret, rindex = -1; 430 int i;
329 431
330 for (i = 0; i < ARRAY_SIZE(ads1015_data_rate); i++) 432 for (i = 0; i < ARRAY_SIZE(ads1015_data_rate); i++) {
331 if (data->data_rate[i] == rate) { 433 if (data->data_rate[i] == rate) {
332 rindex = i; 434 data->channel_data[chan].data_rate = i;
333 break; 435 return 0;
334 } 436 }
335 if (rindex < 0) 437 }
336 return -EINVAL;
337
338 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
339 ADS1015_CFG_DR_MASK,
340 rindex << ADS1015_CFG_DR_SHIFT);
341 if (ret < 0)
342 return ret;
343
344 data->channel_data[chan].data_rate = rindex;
345 438
346 return 0; 439 return -EINVAL;
347} 440}
348 441
349static int ads1015_read_raw(struct iio_dev *indio_dev, 442static int ads1015_read_raw(struct iio_dev *indio_dev,
@@ -353,41 +446,47 @@ static int ads1015_read_raw(struct iio_dev *indio_dev,
353 int ret, idx; 446 int ret, idx;
354 struct ads1015_data *data = iio_priv(indio_dev); 447 struct ads1015_data *data = iio_priv(indio_dev);
355 448
356 mutex_lock(&indio_dev->mlock);
357 mutex_lock(&data->lock); 449 mutex_lock(&data->lock);
358 switch (mask) { 450 switch (mask) {
359 case IIO_CHAN_INFO_RAW: { 451 case IIO_CHAN_INFO_RAW: {
360 int shift = chan->scan_type.shift; 452 int shift = chan->scan_type.shift;
361 453
362 if (iio_buffer_enabled(indio_dev)) { 454 ret = iio_device_claim_direct_mode(indio_dev);
363 ret = -EBUSY; 455 if (ret)
364 break; 456 break;
457
458 if (ads1015_event_channel_enabled(data) &&
459 data->event_channel != chan->address) {
460 ret = -EBUSY;
461 goto release_direct;
365 } 462 }
366 463
367 ret = ads1015_set_power_state(data, true); 464 ret = ads1015_set_power_state(data, true);
368 if (ret < 0) 465 if (ret < 0)
369 break; 466 goto release_direct;
370 467
371 ret = ads1015_get_adc_result(data, chan->address, val); 468 ret = ads1015_get_adc_result(data, chan->address, val);
372 if (ret < 0) { 469 if (ret < 0) {
373 ads1015_set_power_state(data, false); 470 ads1015_set_power_state(data, false);
374 break; 471 goto release_direct;
375 } 472 }
376 473
377 *val = sign_extend32(*val >> shift, 15 - shift); 474 *val = sign_extend32(*val >> shift, 15 - shift);
378 475
379 ret = ads1015_set_power_state(data, false); 476 ret = ads1015_set_power_state(data, false);
380 if (ret < 0) 477 if (ret < 0)
381 break; 478 goto release_direct;
382 479
383 ret = IIO_VAL_INT; 480 ret = IIO_VAL_INT;
481release_direct:
482 iio_device_release_direct_mode(indio_dev);
384 break; 483 break;
385 } 484 }
386 case IIO_CHAN_INFO_SCALE: 485 case IIO_CHAN_INFO_SCALE:
387 idx = data->channel_data[chan->address].pga; 486 idx = data->channel_data[chan->address].pga;
388 *val = ads1015_scale[idx].scale; 487 *val = ads1015_fullscale_range[idx];
389 *val2 = ads1015_scale[idx].uscale; 488 *val2 = chan->scan_type.realbits - 1;
390 ret = IIO_VAL_INT_PLUS_MICRO; 489 ret = IIO_VAL_FRACTIONAL_LOG2;
391 break; 490 break;
392 case IIO_CHAN_INFO_SAMP_FREQ: 491 case IIO_CHAN_INFO_SAMP_FREQ:
393 idx = data->channel_data[chan->address].data_rate; 492 idx = data->channel_data[chan->address].data_rate;
@@ -399,7 +498,6 @@ static int ads1015_read_raw(struct iio_dev *indio_dev,
399 break; 498 break;
400 } 499 }
401 mutex_unlock(&data->lock); 500 mutex_unlock(&data->lock);
402 mutex_unlock(&indio_dev->mlock);
403 501
404 return ret; 502 return ret;
405} 503}
@@ -414,7 +512,7 @@ static int ads1015_write_raw(struct iio_dev *indio_dev,
414 mutex_lock(&data->lock); 512 mutex_lock(&data->lock);
415 switch (mask) { 513 switch (mask) {
416 case IIO_CHAN_INFO_SCALE: 514 case IIO_CHAN_INFO_SCALE:
417 ret = ads1015_set_scale(data, chan->address, val, val2); 515 ret = ads1015_set_scale(data, chan, val, val2);
418 break; 516 break;
419 case IIO_CHAN_INFO_SAMP_FREQ: 517 case IIO_CHAN_INFO_SAMP_FREQ:
420 ret = ads1015_set_data_rate(data, chan->address, val); 518 ret = ads1015_set_data_rate(data, chan->address, val);
@@ -428,8 +526,254 @@ static int ads1015_write_raw(struct iio_dev *indio_dev,
428 return ret; 526 return ret;
429} 527}
430 528
529static int ads1015_read_event(struct iio_dev *indio_dev,
530 const struct iio_chan_spec *chan, enum iio_event_type type,
531 enum iio_event_direction dir, enum iio_event_info info, int *val,
532 int *val2)
533{
534 struct ads1015_data *data = iio_priv(indio_dev);
535 int ret;
536 unsigned int comp_queue;
537 int period;
538 int dr;
539
540 mutex_lock(&data->lock);
541
542 switch (info) {
543 case IIO_EV_INFO_VALUE:
544 *val = (dir == IIO_EV_DIR_RISING) ?
545 data->thresh_data[chan->address].high_thresh :
546 data->thresh_data[chan->address].low_thresh;
547 ret = IIO_VAL_INT;
548 break;
549 case IIO_EV_INFO_PERIOD:
550 dr = data->channel_data[chan->address].data_rate;
551 comp_queue = data->thresh_data[chan->address].comp_queue;
552 period = ads1015_comp_queue[comp_queue] *
553 USEC_PER_SEC / data->data_rate[dr];
554
555 *val = period / USEC_PER_SEC;
556 *val2 = period % USEC_PER_SEC;
557 ret = IIO_VAL_INT_PLUS_MICRO;
558 break;
559 default:
560 ret = -EINVAL;
561 break;
562 }
563
564 mutex_unlock(&data->lock);
565
566 return ret;
567}
568
569static int ads1015_write_event(struct iio_dev *indio_dev,
570 const struct iio_chan_spec *chan, enum iio_event_type type,
571 enum iio_event_direction dir, enum iio_event_info info, int val,
572 int val2)
573{
574 struct ads1015_data *data = iio_priv(indio_dev);
575 int realbits = chan->scan_type.realbits;
576 int ret = 0;
577 long long period;
578 int i;
579 int dr;
580
581 mutex_lock(&data->lock);
582
583 switch (info) {
584 case IIO_EV_INFO_VALUE:
585 if (val >= 1 << (realbits - 1) || val < -1 << (realbits - 1)) {
586 ret = -EINVAL;
587 break;
588 }
589 if (dir == IIO_EV_DIR_RISING)
590 data->thresh_data[chan->address].high_thresh = val;
591 else
592 data->thresh_data[chan->address].low_thresh = val;
593 break;
594 case IIO_EV_INFO_PERIOD:
595 dr = data->channel_data[chan->address].data_rate;
596 period = val * USEC_PER_SEC + val2;
597
598 for (i = 0; i < ARRAY_SIZE(ads1015_comp_queue) - 1; i++) {
599 if (period <= ads1015_comp_queue[i] *
600 USEC_PER_SEC / data->data_rate[dr])
601 break;
602 }
603 data->thresh_data[chan->address].comp_queue = i;
604 break;
605 default:
606 ret = -EINVAL;
607 break;
608 }
609
610 mutex_unlock(&data->lock);
611
612 return ret;
613}
614
615static int ads1015_read_event_config(struct iio_dev *indio_dev,
616 const struct iio_chan_spec *chan, enum iio_event_type type,
617 enum iio_event_direction dir)
618{
619 struct ads1015_data *data = iio_priv(indio_dev);
620 int ret = 0;
621
622 mutex_lock(&data->lock);
623 if (data->event_channel == chan->address) {
624 switch (dir) {
625 case IIO_EV_DIR_RISING:
626 ret = 1;
627 break;
628 case IIO_EV_DIR_EITHER:
629 ret = (data->comp_mode == ADS1015_CFG_COMP_MODE_WINDOW);
630 break;
631 default:
632 ret = -EINVAL;
633 break;
634 }
635 }
636 mutex_unlock(&data->lock);
637
638 return ret;
639}
640
641static int ads1015_enable_event_config(struct ads1015_data *data,
642 const struct iio_chan_spec *chan, int comp_mode)
643{
644 int low_thresh = data->thresh_data[chan->address].low_thresh;
645 int high_thresh = data->thresh_data[chan->address].high_thresh;
646 int ret;
647 unsigned int val;
648
649 if (ads1015_event_channel_enabled(data)) {
650 if (data->event_channel != chan->address ||
651 (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
652 comp_mode == ADS1015_CFG_COMP_MODE_WINDOW))
653 return -EBUSY;
654
655 return 0;
656 }
657
658 if (comp_mode == ADS1015_CFG_COMP_MODE_TRAD) {
659 low_thresh = max(-1 << (chan->scan_type.realbits - 1),
660 high_thresh - 1);
661 }
662 ret = regmap_write(data->regmap, ADS1015_LO_THRESH_REG,
663 low_thresh << chan->scan_type.shift);
664 if (ret)
665 return ret;
666
667 ret = regmap_write(data->regmap, ADS1015_HI_THRESH_REG,
668 high_thresh << chan->scan_type.shift);
669 if (ret)
670 return ret;
671
672 ret = ads1015_set_power_state(data, true);
673 if (ret < 0)
674 return ret;
675
676 ads1015_event_channel_enable(data, chan->address, comp_mode);
677
678 ret = ads1015_get_adc_result(data, chan->address, &val);
679 if (ret) {
680 ads1015_event_channel_disable(data, chan->address);
681 ads1015_set_power_state(data, false);
682 }
683
684 return ret;
685}
686
687static int ads1015_disable_event_config(struct ads1015_data *data,
688 const struct iio_chan_spec *chan, int comp_mode)
689{
690 int ret;
691
692 if (!ads1015_event_channel_enabled(data))
693 return 0;
694
695 if (data->event_channel != chan->address)
696 return 0;
697
698 if (data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD &&
699 comp_mode == ADS1015_CFG_COMP_MODE_WINDOW)
700 return 0;
701
702 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
703 ADS1015_CFG_COMP_QUE_MASK,
704 ADS1015_CFG_COMP_DISABLE <<
705 ADS1015_CFG_COMP_QUE_SHIFT);
706 if (ret)
707 return ret;
708
709 ads1015_event_channel_disable(data, chan->address);
710
711 return ads1015_set_power_state(data, false);
712}
713
714static int ads1015_write_event_config(struct iio_dev *indio_dev,
715 const struct iio_chan_spec *chan, enum iio_event_type type,
716 enum iio_event_direction dir, int state)
717{
718 struct ads1015_data *data = iio_priv(indio_dev);
719 int ret;
720 int comp_mode = (dir == IIO_EV_DIR_EITHER) ?
721 ADS1015_CFG_COMP_MODE_WINDOW : ADS1015_CFG_COMP_MODE_TRAD;
722
723 mutex_lock(&data->lock);
724
725 /* Prevent from enabling both buffer and event at a time */
726 ret = iio_device_claim_direct_mode(indio_dev);
727 if (ret) {
728 mutex_unlock(&data->lock);
729 return ret;
730 }
731
732 if (state)
733 ret = ads1015_enable_event_config(data, chan, comp_mode);
734 else
735 ret = ads1015_disable_event_config(data, chan, comp_mode);
736
737 iio_device_release_direct_mode(indio_dev);
738 mutex_unlock(&data->lock);
739
740 return ret;
741}
742
743static irqreturn_t ads1015_event_handler(int irq, void *priv)
744{
745 struct iio_dev *indio_dev = priv;
746 struct ads1015_data *data = iio_priv(indio_dev);
747 int val;
748 int ret;
749
750 /* Clear the latched ALERT/RDY pin */
751 ret = regmap_read(data->regmap, ADS1015_CONV_REG, &val);
752 if (ret)
753 return IRQ_HANDLED;
754
755 if (ads1015_event_channel_enabled(data)) {
756 enum iio_event_direction dir;
757 u64 code;
758
759 dir = data->comp_mode == ADS1015_CFG_COMP_MODE_TRAD ?
760 IIO_EV_DIR_RISING : IIO_EV_DIR_EITHER;
761 code = IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, data->event_channel,
762 IIO_EV_TYPE_THRESH, dir);
763 iio_push_event(indio_dev, code, iio_get_time_ns(indio_dev));
764 }
765
766 return IRQ_HANDLED;
767}
768
431static int ads1015_buffer_preenable(struct iio_dev *indio_dev) 769static int ads1015_buffer_preenable(struct iio_dev *indio_dev)
432{ 770{
771 struct ads1015_data *data = iio_priv(indio_dev);
772
773 /* Prevent from enabling both buffer and event at a time */
774 if (ads1015_event_channel_enabled(data))
775 return -EBUSY;
776
433 return ads1015_set_power_state(iio_priv(indio_dev), true); 777 return ads1015_set_power_state(iio_priv(indio_dev), true);
434} 778}
435 779
@@ -446,7 +790,10 @@ static const struct iio_buffer_setup_ops ads1015_buffer_setup_ops = {
446 .validate_scan_mask = &iio_validate_scan_mask_onehot, 790 .validate_scan_mask = &iio_validate_scan_mask_onehot,
447}; 791};
448 792
449static IIO_CONST_ATTR(scale_available, "3 2 1 0.5 0.25 0.125"); 793static IIO_CONST_ATTR_NAMED(ads1015_scale_available, scale_available,
794 "3 2 1 0.5 0.25 0.125");
795static IIO_CONST_ATTR_NAMED(ads1115_scale_available, scale_available,
796 "0.1875 0.125 0.0625 0.03125 0.015625 0.007813");
450 797
451static IIO_CONST_ATTR_NAMED(ads1015_sampling_frequency_available, 798static IIO_CONST_ATTR_NAMED(ads1015_sampling_frequency_available,
452 sampling_frequency_available, "128 250 490 920 1600 2400 3300"); 799 sampling_frequency_available, "128 250 490 920 1600 2400 3300");
@@ -454,7 +801,7 @@ static IIO_CONST_ATTR_NAMED(ads1115_sampling_frequency_available,
454 sampling_frequency_available, "8 16 32 64 128 250 475 860"); 801 sampling_frequency_available, "8 16 32 64 128 250 475 860");
455 802
456static struct attribute *ads1015_attributes[] = { 803static struct attribute *ads1015_attributes[] = {
457 &iio_const_attr_scale_available.dev_attr.attr, 804 &iio_const_attr_ads1015_scale_available.dev_attr.attr,
458 &iio_const_attr_ads1015_sampling_frequency_available.dev_attr.attr, 805 &iio_const_attr_ads1015_sampling_frequency_available.dev_attr.attr,
459 NULL, 806 NULL,
460}; 807};
@@ -464,7 +811,7 @@ static const struct attribute_group ads1015_attribute_group = {
464}; 811};
465 812
466static struct attribute *ads1115_attributes[] = { 813static struct attribute *ads1115_attributes[] = {
467 &iio_const_attr_scale_available.dev_attr.attr, 814 &iio_const_attr_ads1115_scale_available.dev_attr.attr,
468 &iio_const_attr_ads1115_sampling_frequency_available.dev_attr.attr, 815 &iio_const_attr_ads1115_sampling_frequency_available.dev_attr.attr,
469 NULL, 816 NULL,
470}; 817};
@@ -477,6 +824,10 @@ static const struct iio_info ads1015_info = {
477 .driver_module = THIS_MODULE, 824 .driver_module = THIS_MODULE,
478 .read_raw = ads1015_read_raw, 825 .read_raw = ads1015_read_raw,
479 .write_raw = ads1015_write_raw, 826 .write_raw = ads1015_write_raw,
827 .read_event_value = ads1015_read_event,
828 .write_event_value = ads1015_write_event,
829 .read_event_config = ads1015_read_event_config,
830 .write_event_config = ads1015_write_event_config,
480 .attrs = &ads1015_attribute_group, 831 .attrs = &ads1015_attribute_group,
481}; 832};
482 833
@@ -484,6 +835,10 @@ static const struct iio_info ads1115_info = {
484 .driver_module = THIS_MODULE, 835 .driver_module = THIS_MODULE,
485 .read_raw = ads1015_read_raw, 836 .read_raw = ads1015_read_raw,
486 .write_raw = ads1015_write_raw, 837 .write_raw = ads1015_write_raw,
838 .read_event_value = ads1015_read_event,
839 .write_event_value = ads1015_write_event,
840 .read_event_config = ads1015_read_event_config,
841 .write_event_config = ads1015_write_event_config,
487 .attrs = &ads1115_attribute_group, 842 .attrs = &ads1115_attribute_group,
488}; 843};
489 844
@@ -573,6 +928,13 @@ static void ads1015_get_channels_config(struct i2c_client *client)
573 } 928 }
574} 929}
575 930
931static int ads1015_set_conv_mode(struct ads1015_data *data, int mode)
932{
933 return regmap_update_bits(data->regmap, ADS1015_CFG_REG,
934 ADS1015_CFG_MOD_MASK,
935 mode << ADS1015_CFG_MOD_SHIFT);
936}
937
576static int ads1015_probe(struct i2c_client *client, 938static int ads1015_probe(struct i2c_client *client,
577 const struct i2c_device_id *id) 939 const struct i2c_device_id *id)
578{ 940{
@@ -580,6 +942,7 @@ static int ads1015_probe(struct i2c_client *client,
580 struct ads1015_data *data; 942 struct ads1015_data *data;
581 int ret; 943 int ret;
582 enum chip_ids chip; 944 enum chip_ids chip;
945 int i;
583 946
584 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 947 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
585 if (!indio_dev) 948 if (!indio_dev)
@@ -614,6 +977,18 @@ static int ads1015_probe(struct i2c_client *client,
614 break; 977 break;
615 } 978 }
616 979
980 data->event_channel = ADS1015_CHANNELS;
981 /*
982 * Set default lower and upper threshold to min and max value
983 * respectively.
984 */
985 for (i = 0; i < ADS1015_CHANNELS; i++) {
986 int realbits = indio_dev->channels[i].scan_type.realbits;
987
988 data->thresh_data[i].low_thresh = -1 << (realbits - 1);
989 data->thresh_data[i].high_thresh = (1 << (realbits - 1)) - 1;
990 }
991
617 /* we need to keep this ABI the same as used by hwmon ADS1015 driver */ 992 /* we need to keep this ABI the same as used by hwmon ADS1015 driver */
618 ads1015_get_channels_config(client); 993 ads1015_get_channels_config(client);
619 994
@@ -623,16 +998,56 @@ static int ads1015_probe(struct i2c_client *client,
623 return PTR_ERR(data->regmap); 998 return PTR_ERR(data->regmap);
624 } 999 }
625 1000
626 ret = iio_triggered_buffer_setup(indio_dev, NULL, 1001 ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL,
627 ads1015_trigger_handler, 1002 ads1015_trigger_handler,
628 &ads1015_buffer_setup_ops); 1003 &ads1015_buffer_setup_ops);
629 if (ret < 0) { 1004 if (ret < 0) {
630 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1005 dev_err(&client->dev, "iio triggered buffer setup failed\n");
631 return ret; 1006 return ret;
632 } 1007 }
1008
1009 if (client->irq) {
1010 unsigned long irq_trig =
1011 irqd_get_trigger_type(irq_get_irq_data(client->irq));
1012 unsigned int cfg_comp_mask = ADS1015_CFG_COMP_QUE_MASK |
1013 ADS1015_CFG_COMP_LAT_MASK | ADS1015_CFG_COMP_POL_MASK;
1014 unsigned int cfg_comp =
1015 ADS1015_CFG_COMP_DISABLE << ADS1015_CFG_COMP_QUE_SHIFT |
1016 1 << ADS1015_CFG_COMP_LAT_SHIFT;
1017
1018 switch (irq_trig) {
1019 case IRQF_TRIGGER_LOW:
1020 cfg_comp |= ADS1015_CFG_COMP_POL_LOW;
1021 break;
1022 case IRQF_TRIGGER_HIGH:
1023 cfg_comp |= ADS1015_CFG_COMP_POL_HIGH;
1024 break;
1025 default:
1026 return -EINVAL;
1027 }
1028
1029 ret = regmap_update_bits(data->regmap, ADS1015_CFG_REG,
1030 cfg_comp_mask, cfg_comp);
1031 if (ret)
1032 return ret;
1033
1034 ret = devm_request_threaded_irq(&client->dev, client->irq,
1035 NULL, ads1015_event_handler,
1036 irq_trig | IRQF_ONESHOT,
1037 client->name, indio_dev);
1038 if (ret)
1039 return ret;
1040 }
1041
1042 ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
1043 if (ret)
1044 return ret;
1045
1046 data->conv_invalid = true;
1047
633 ret = pm_runtime_set_active(&client->dev); 1048 ret = pm_runtime_set_active(&client->dev);
634 if (ret) 1049 if (ret)
635 goto err_buffer_cleanup; 1050 return ret;
636 pm_runtime_set_autosuspend_delay(&client->dev, ADS1015_SLEEP_DELAY_MS); 1051 pm_runtime_set_autosuspend_delay(&client->dev, ADS1015_SLEEP_DELAY_MS);
637 pm_runtime_use_autosuspend(&client->dev); 1052 pm_runtime_use_autosuspend(&client->dev);
638 pm_runtime_enable(&client->dev); 1053 pm_runtime_enable(&client->dev);
@@ -640,15 +1055,10 @@ static int ads1015_probe(struct i2c_client *client,
640 ret = iio_device_register(indio_dev); 1055 ret = iio_device_register(indio_dev);
641 if (ret < 0) { 1056 if (ret < 0) {
642 dev_err(&client->dev, "Failed to register IIO device\n"); 1057 dev_err(&client->dev, "Failed to register IIO device\n");
643 goto err_buffer_cleanup; 1058 return ret;
644 } 1059 }
645 1060
646 return 0; 1061 return 0;
647
648err_buffer_cleanup:
649 iio_triggered_buffer_cleanup(indio_dev);
650
651 return ret;
652} 1062}
653 1063
654static int ads1015_remove(struct i2c_client *client) 1064static int ads1015_remove(struct i2c_client *client)
@@ -662,12 +1072,8 @@ static int ads1015_remove(struct i2c_client *client)
662 pm_runtime_set_suspended(&client->dev); 1072 pm_runtime_set_suspended(&client->dev);
663 pm_runtime_put_noidle(&client->dev); 1073 pm_runtime_put_noidle(&client->dev);
664 1074
665 iio_triggered_buffer_cleanup(indio_dev);
666
667 /* power down single shot mode */ 1075 /* power down single shot mode */
668 return regmap_update_bits(data->regmap, ADS1015_CFG_REG, 1076 return ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
669 ADS1015_CFG_MOD_MASK,
670 ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
671} 1077}
672 1078
673#ifdef CONFIG_PM 1079#ifdef CONFIG_PM
@@ -676,19 +1082,20 @@ static int ads1015_runtime_suspend(struct device *dev)
676 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1082 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
677 struct ads1015_data *data = iio_priv(indio_dev); 1083 struct ads1015_data *data = iio_priv(indio_dev);
678 1084
679 return regmap_update_bits(data->regmap, ADS1015_CFG_REG, 1085 return ads1015_set_conv_mode(data, ADS1015_SINGLESHOT);
680 ADS1015_CFG_MOD_MASK,
681 ADS1015_SINGLESHOT << ADS1015_CFG_MOD_SHIFT);
682} 1086}
683 1087
684static int ads1015_runtime_resume(struct device *dev) 1088static int ads1015_runtime_resume(struct device *dev)
685{ 1089{
686 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1090 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
687 struct ads1015_data *data = iio_priv(indio_dev); 1091 struct ads1015_data *data = iio_priv(indio_dev);
1092 int ret;
688 1093
689 return regmap_update_bits(data->regmap, ADS1015_CFG_REG, 1094 ret = ads1015_set_conv_mode(data, ADS1015_CONTINUOUS);
690 ADS1015_CFG_MOD_MASK, 1095 if (!ret)
691 ADS1015_CONTINUOUS << ADS1015_CFG_MOD_SHIFT); 1096 data->conv_invalid = true;
1097
1098 return ret;
692} 1099}
693#endif 1100#endif
694 1101
diff --git a/drivers/iio/adc/ti-ads7950.c b/drivers/iio/adc/ti-ads7950.c
index 16a06633332c..a376190914ad 100644
--- a/drivers/iio/adc/ti-ads7950.c
+++ b/drivers/iio/adc/ti-ads7950.c
@@ -21,6 +21,7 @@
21 * GNU General Public License for more details. 21 * GNU General Public License for more details.
22 */ 22 */
23 23
24#include <linux/acpi.h>
24#include <linux/bitops.h> 25#include <linux/bitops.h>
25#include <linux/device.h> 26#include <linux/device.h>
26#include <linux/err.h> 27#include <linux/err.h>
@@ -37,6 +38,12 @@
37#include <linux/iio/trigger_consumer.h> 38#include <linux/iio/trigger_consumer.h>
38#include <linux/iio/triggered_buffer.h> 39#include <linux/iio/triggered_buffer.h>
39 40
41/*
42 * In case of ACPI, we use the 5000 mV as default for the reference pin.
43 * Device tree users encode that via the vref-supply regulator.
44 */
45#define TI_ADS7950_VA_MV_ACPI_DEFAULT 5000
46
40#define TI_ADS7950_CR_MANUAL BIT(12) 47#define TI_ADS7950_CR_MANUAL BIT(12)
41#define TI_ADS7950_CR_WRITE BIT(11) 48#define TI_ADS7950_CR_WRITE BIT(11)
42#define TI_ADS7950_CR_CHAN(ch) ((ch) << 7) 49#define TI_ADS7950_CR_CHAN(ch) ((ch) << 7)
@@ -58,6 +65,7 @@ struct ti_ads7950_state {
58 struct spi_message scan_single_msg; 65 struct spi_message scan_single_msg;
59 66
60 struct regulator *reg; 67 struct regulator *reg;
68 unsigned int vref_mv;
61 69
62 unsigned int settings; 70 unsigned int settings;
63 71
@@ -305,11 +313,15 @@ static int ti_ads7950_get_range(struct ti_ads7950_state *st)
305{ 313{
306 int vref; 314 int vref;
307 315
308 vref = regulator_get_voltage(st->reg); 316 if (st->vref_mv) {
309 if (vref < 0) 317 vref = st->vref_mv;
310 return vref; 318 } else {
319 vref = regulator_get_voltage(st->reg);
320 if (vref < 0)
321 return vref;
311 322
312 vref /= 1000; 323 vref /= 1000;
324 }
313 325
314 if (st->settings & TI_ADS7950_CR_RANGE_5V) 326 if (st->settings & TI_ADS7950_CR_RANGE_5V)
315 vref *= 2; 327 vref *= 2;
@@ -411,6 +423,10 @@ static int ti_ads7950_probe(struct spi_device *spi)
411 spi_message_init_with_transfers(&st->scan_single_msg, 423 spi_message_init_with_transfers(&st->scan_single_msg,
412 st->scan_single_xfer, 3); 424 st->scan_single_xfer, 3);
413 425
426 /* Use hard coded value for reference voltage in ACPI case */
427 if (ACPI_COMPANION(&spi->dev))
428 st->vref_mv = TI_ADS7950_VA_MV_ACPI_DEFAULT;
429
414 st->reg = devm_regulator_get(&spi->dev, "vref"); 430 st->reg = devm_regulator_get(&spi->dev, "vref");
415 if (IS_ERR(st->reg)) { 431 if (IS_ERR(st->reg)) {
416 dev_err(&spi->dev, "Failed get get regulator \"vref\"\n"); 432 dev_err(&spi->dev, "Failed get get regulator \"vref\"\n");
@@ -475,9 +491,27 @@ static const struct spi_device_id ti_ads7950_id[] = {
475}; 491};
476MODULE_DEVICE_TABLE(spi, ti_ads7950_id); 492MODULE_DEVICE_TABLE(spi, ti_ads7950_id);
477 493
494static const struct of_device_id ads7950_of_table[] = {
495 { .compatible = "ti,ads7950", .data = &ti_ads7950_chip_info[TI_ADS7950] },
496 { .compatible = "ti,ads7951", .data = &ti_ads7950_chip_info[TI_ADS7951] },
497 { .compatible = "ti,ads7952", .data = &ti_ads7950_chip_info[TI_ADS7952] },
498 { .compatible = "ti,ads7953", .data = &ti_ads7950_chip_info[TI_ADS7953] },
499 { .compatible = "ti,ads7954", .data = &ti_ads7950_chip_info[TI_ADS7954] },
500 { .compatible = "ti,ads7955", .data = &ti_ads7950_chip_info[TI_ADS7955] },
501 { .compatible = "ti,ads7956", .data = &ti_ads7950_chip_info[TI_ADS7956] },
502 { .compatible = "ti,ads7957", .data = &ti_ads7950_chip_info[TI_ADS7957] },
503 { .compatible = "ti,ads7958", .data = &ti_ads7950_chip_info[TI_ADS7958] },
504 { .compatible = "ti,ads7959", .data = &ti_ads7950_chip_info[TI_ADS7959] },
505 { .compatible = "ti,ads7960", .data = &ti_ads7950_chip_info[TI_ADS7960] },
506 { .compatible = "ti,ads7961", .data = &ti_ads7950_chip_info[TI_ADS7961] },
507 { },
508};
509MODULE_DEVICE_TABLE(of, ads7950_of_table);
510
478static struct spi_driver ti_ads7950_driver = { 511static struct spi_driver ti_ads7950_driver = {
479 .driver = { 512 .driver = {
480 .name = "ads7950", 513 .name = "ads7950",
514 .of_match_table = ads7950_of_table,
481 }, 515 },
482 .probe = ti_ads7950_probe, 516 .probe = ti_ads7950_probe,
483 .remove = ti_ads7950_remove, 517 .remove = ti_ads7950_remove,
diff --git a/drivers/iio/adc/xilinx-xadc-events.c b/drivers/iio/adc/xilinx-xadc-events.c
index 6d5c2a6f4e6e..dc0670308253 100644
--- a/drivers/iio/adc/xilinx-xadc-events.c
+++ b/drivers/iio/adc/xilinx-xadc-events.c
@@ -68,7 +68,7 @@ void xadc_handle_events(struct iio_dev *indio_dev, unsigned long events)
68 xadc_handle_event(indio_dev, i); 68 xadc_handle_event(indio_dev, i);
69} 69}
70 70
71static unsigned xadc_get_threshold_offset(const struct iio_chan_spec *chan, 71static unsigned int xadc_get_threshold_offset(const struct iio_chan_spec *chan,
72 enum iio_event_direction dir) 72 enum iio_event_direction dir)
73{ 73{
74 unsigned int offset; 74 unsigned int offset;
@@ -90,26 +90,24 @@ static unsigned xadc_get_threshold_offset(const struct iio_chan_spec *chan,
90 90
91static unsigned int xadc_get_alarm_mask(const struct iio_chan_spec *chan) 91static unsigned int xadc_get_alarm_mask(const struct iio_chan_spec *chan)
92{ 92{
93 if (chan->type == IIO_TEMP) { 93 if (chan->type == IIO_TEMP)
94 return XADC_ALARM_OT_MASK; 94 return XADC_ALARM_OT_MASK;
95 } else { 95 switch (chan->channel) {
96 switch (chan->channel) { 96 case 0:
97 case 0: 97 return XADC_ALARM_VCCINT_MASK;
98 return XADC_ALARM_VCCINT_MASK; 98 case 1:
99 case 1: 99 return XADC_ALARM_VCCAUX_MASK;
100 return XADC_ALARM_VCCAUX_MASK; 100 case 2:
101 case 2: 101 return XADC_ALARM_VCCBRAM_MASK;
102 return XADC_ALARM_VCCBRAM_MASK; 102 case 3:
103 case 3: 103 return XADC_ALARM_VCCPINT_MASK;
104 return XADC_ALARM_VCCPINT_MASK; 104 case 4:
105 case 4: 105 return XADC_ALARM_VCCPAUX_MASK;
106 return XADC_ALARM_VCCPAUX_MASK; 106 case 5:
107 case 5: 107 return XADC_ALARM_VCCODDR_MASK;
108 return XADC_ALARM_VCCODDR_MASK; 108 default:
109 default: 109 /* We will never get here */
110 /* We will never get here */ 110 return 0;
111 return 0;
112 }
113 } 111 }
114} 112}
115 113
diff --git a/drivers/iio/adc/xilinx-xadc.h b/drivers/iio/adc/xilinx-xadc.h
index f6f081965647..62edbdae1244 100644
--- a/drivers/iio/adc/xilinx-xadc.h
+++ b/drivers/iio/adc/xilinx-xadc.h
@@ -71,13 +71,13 @@ struct xadc {
71}; 71};
72 72
73struct xadc_ops { 73struct xadc_ops {
74 int (*read)(struct xadc *, unsigned int, uint16_t *); 74 int (*read)(struct xadc *xadc, unsigned int reg, uint16_t *val);
75 int (*write)(struct xadc *, unsigned int, uint16_t); 75 int (*write)(struct xadc *xadc, unsigned int reg, uint16_t val);
76 int (*setup)(struct platform_device *pdev, struct iio_dev *indio_dev, 76 int (*setup)(struct platform_device *pdev, struct iio_dev *indio_dev,
77 int irq); 77 int irq);
78 void (*update_alarm)(struct xadc *, unsigned int); 78 void (*update_alarm)(struct xadc *xadc, unsigned int alarm);
79 unsigned long (*get_dclk_rate)(struct xadc *); 79 unsigned long (*get_dclk_rate)(struct xadc *xadc);
80 irqreturn_t (*interrupt_handler)(int, void *); 80 irqreturn_t (*interrupt_handler)(int irq, void *devid);
81 81
82 unsigned int flags; 82 unsigned int flags;
83}; 83};
diff --git a/drivers/iio/chemical/Kconfig b/drivers/iio/chemical/Kconfig
index 4d799b5cceac..5cb5be7612b4 100644
--- a/drivers/iio/chemical/Kconfig
+++ b/drivers/iio/chemical/Kconfig
@@ -24,6 +24,8 @@ config ATLAS_PH_SENSOR
24config CCS811 24config CCS811
25 tristate "AMS CCS811 VOC sensor" 25 tristate "AMS CCS811 VOC sensor"
26 depends on I2C 26 depends on I2C
27 select IIO_BUFFER
28 select IIO_TRIGGERED_BUFFER
27 help 29 help
28 Say Y here to build I2C interface support for the AMS 30 Say Y here to build I2C interface support for the AMS
29 CCS811 VOC (Volatile Organic Compounds) sensor 31 CCS811 VOC (Volatile Organic Compounds) sensor
diff --git a/drivers/iio/chemical/ccs811.c b/drivers/iio/chemical/ccs811.c
index 8dbb5eddeb1f..840a6cbd5f0f 100644
--- a/drivers/iio/chemical/ccs811.c
+++ b/drivers/iio/chemical/ccs811.c
@@ -21,6 +21,9 @@
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/iio/iio.h> 23#include <linux/iio/iio.h>
24#include <linux/iio/buffer.h>
25#include <linux/iio/triggered_buffer.h>
26#include <linux/iio/trigger_consumer.h>
24#include <linux/module.h> 27#include <linux/module.h>
25 28
26#define CCS811_STATUS 0x00 29#define CCS811_STATUS 0x00
@@ -76,25 +79,42 @@ static const struct iio_chan_spec ccs811_channels[] = {
76 { 79 {
77 .type = IIO_CURRENT, 80 .type = IIO_CURRENT,
78 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 81 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
79 BIT(IIO_CHAN_INFO_SCALE) 82 BIT(IIO_CHAN_INFO_SCALE),
83 .scan_index = -1,
80 }, { 84 }, {
81 .type = IIO_VOLTAGE, 85 .type = IIO_VOLTAGE,
82 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 86 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
83 BIT(IIO_CHAN_INFO_SCALE) 87 BIT(IIO_CHAN_INFO_SCALE),
88 .scan_index = -1,
84 }, { 89 }, {
85 .type = IIO_CONCENTRATION, 90 .type = IIO_CONCENTRATION,
86 .channel2 = IIO_MOD_CO2, 91 .channel2 = IIO_MOD_CO2,
87 .modified = 1, 92 .modified = 1,
88 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 93 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
89 BIT(IIO_CHAN_INFO_OFFSET) | 94 BIT(IIO_CHAN_INFO_OFFSET) |
90 BIT(IIO_CHAN_INFO_SCALE) 95 BIT(IIO_CHAN_INFO_SCALE),
96 .scan_index = 0,
97 .scan_type = {
98 .sign = 'u',
99 .realbits = 16,
100 .storagebits = 16,
101 .endianness = IIO_BE,
102 },
91 }, { 103 }, {
92 .type = IIO_CONCENTRATION, 104 .type = IIO_CONCENTRATION,
93 .channel2 = IIO_MOD_VOC, 105 .channel2 = IIO_MOD_VOC,
94 .modified = 1, 106 .modified = 1,
95 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 107 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
96 BIT(IIO_CHAN_INFO_SCALE) 108 BIT(IIO_CHAN_INFO_SCALE),
109 .scan_index = 1,
110 .scan_type = {
111 .sign = 'u',
112 .realbits = 16,
113 .storagebits = 16,
114 .endianness = IIO_BE,
115 },
97 }, 116 },
117 IIO_CHAN_SOFT_TIMESTAMP(2),
98}; 118};
99 119
100/* 120/*
@@ -253,6 +273,31 @@ static const struct iio_info ccs811_info = {
253 .driver_module = THIS_MODULE, 273 .driver_module = THIS_MODULE,
254}; 274};
255 275
276static irqreturn_t ccs811_trigger_handler(int irq, void *p)
277{
278 struct iio_poll_func *pf = p;
279 struct iio_dev *indio_dev = pf->indio_dev;
280 struct ccs811_data *data = iio_priv(indio_dev);
281 struct i2c_client *client = data->client;
282 s16 buf[8]; /* s16 eCO2 + s16 TVOC + padding + 8 byte timestamp */
283 int ret;
284
285 ret = i2c_smbus_read_i2c_block_data(client, CCS811_ALG_RESULT_DATA, 4,
286 (u8 *)&buf);
287 if (ret != 4) {
288 dev_err(&client->dev, "cannot read sensor data\n");
289 goto err;
290 }
291
292 iio_push_to_buffers_with_timestamp(indio_dev, buf,
293 iio_get_time_ns(indio_dev));
294
295err:
296 iio_trigger_notify_done(indio_dev->trig);
297
298 return IRQ_HANDLED;
299}
300
256static int ccs811_probe(struct i2c_client *client, 301static int ccs811_probe(struct i2c_client *client,
257 const struct i2c_device_id *id) 302 const struct i2c_device_id *id)
258{ 303{
@@ -305,7 +350,27 @@ static int ccs811_probe(struct i2c_client *client,
305 indio_dev->channels = ccs811_channels; 350 indio_dev->channels = ccs811_channels;
306 indio_dev->num_channels = ARRAY_SIZE(ccs811_channels); 351 indio_dev->num_channels = ARRAY_SIZE(ccs811_channels);
307 352
308 return iio_device_register(indio_dev); 353 ret = iio_triggered_buffer_setup(indio_dev, NULL,
354 ccs811_trigger_handler, NULL);
355
356 if (ret < 0) {
357 dev_err(&client->dev, "triggered buffer setup failed\n");
358 goto err_poweroff;
359 }
360
361 ret = iio_device_register(indio_dev);
362 if (ret < 0) {
363 dev_err(&client->dev, "unable to register iio device\n");
364 goto err_buffer_cleanup;
365 }
366 return 0;
367
368err_buffer_cleanup:
369 iio_triggered_buffer_cleanup(indio_dev);
370err_poweroff:
371 i2c_smbus_write_byte_data(client, CCS811_MEAS_MODE, CCS811_MODE_IDLE);
372
373 return ret;
309} 374}
310 375
311static int ccs811_remove(struct i2c_client *client) 376static int ccs811_remove(struct i2c_client *client)
@@ -313,6 +378,7 @@ static int ccs811_remove(struct i2c_client *client)
313 struct iio_dev *indio_dev = i2c_get_clientdata(client); 378 struct iio_dev *indio_dev = i2c_get_clientdata(client);
314 379
315 iio_device_unregister(indio_dev); 380 iio_device_unregister(indio_dev);
381 iio_triggered_buffer_cleanup(indio_dev);
316 382
317 return i2c_smbus_write_byte_data(client, CCS811_MEAS_MODE, 383 return i2c_smbus_write_byte_data(client, CCS811_MEAS_MODE,
318 CCS811_MODE_IDLE); 384 CCS811_MODE_IDLE);
diff --git a/drivers/iio/dac/stm32-dac-core.c b/drivers/iio/dac/stm32-dac-core.c
index 32701be71cf7..55026fe1c610 100644
--- a/drivers/iio/dac/stm32-dac-core.c
+++ b/drivers/iio/dac/stm32-dac-core.c
@@ -125,7 +125,7 @@ static int stm32_dac_probe(struct platform_device *pdev)
125 goto err_vref; 125 goto err_vref;
126 } 126 }
127 127
128 priv->rst = devm_reset_control_get(dev, NULL); 128 priv->rst = devm_reset_control_get_exclusive(dev, NULL);
129 if (!IS_ERR(priv->rst)) { 129 if (!IS_ERR(priv->rst)) {
130 reset_control_assert(priv->rst); 130 reset_control_assert(priv->rst);
131 udelay(2); 131 udelay(2);
diff --git a/drivers/iio/light/apds9300.c b/drivers/iio/light/apds9300.c
index 649b26f67813..05eacd1ee40f 100644
--- a/drivers/iio/light/apds9300.c
+++ b/drivers/iio/light/apds9300.c
@@ -505,7 +505,7 @@ static SIMPLE_DEV_PM_OPS(apds9300_pm_ops, apds9300_suspend, apds9300_resume);
505#define APDS9300_PM_OPS NULL 505#define APDS9300_PM_OPS NULL
506#endif 506#endif
507 507
508static struct i2c_device_id apds9300_id[] = { 508static const struct i2c_device_id apds9300_id[] = {
509 { APDS9300_DRV_NAME, 0 }, 509 { APDS9300_DRV_NAME, 0 },
510 { } 510 { }
511}; 511};
diff --git a/drivers/iio/light/tsl2583.c b/drivers/iio/light/tsl2583.c
index 1679181d2bdd..fb711ed4862e 100644
--- a/drivers/iio/light/tsl2583.c
+++ b/drivers/iio/light/tsl2583.c
@@ -924,7 +924,7 @@ static const struct dev_pm_ops tsl2583_pm_ops = {
924 SET_RUNTIME_PM_OPS(tsl2583_suspend, tsl2583_resume, NULL) 924 SET_RUNTIME_PM_OPS(tsl2583_suspend, tsl2583_resume, NULL)
925}; 925};
926 926
927static struct i2c_device_id tsl2583_idtable[] = { 927static const struct i2c_device_id tsl2583_idtable[] = {
928 { "tsl2580", 0 }, 928 { "tsl2580", 0 },
929 { "tsl2581", 1 }, 929 { "tsl2581", 1 },
930 { "tsl2583", 2 }, 930 { "tsl2583", 2 },
diff --git a/drivers/iio/magnetometer/Kconfig b/drivers/iio/magnetometer/Kconfig
index 421ad90a5fbe..ed9d776d01af 100644
--- a/drivers/iio/magnetometer/Kconfig
+++ b/drivers/iio/magnetometer/Kconfig
@@ -13,8 +13,8 @@ config AK8974
13 select IIO_BUFFER 13 select IIO_BUFFER
14 select IIO_TRIGGERED_BUFFER 14 select IIO_TRIGGERED_BUFFER
15 help 15 help
16 Say yes here to build support for Asahi Kasei AK8974 or 16 Say yes here to build support for Asahi Kasei AK8974, AMI305 or
17 AMI305 I2C-based 3-axis magnetometer chips. 17 AMI306 I2C-based 3-axis magnetometer chips.
18 18
19 To compile this driver as a module, choose M here: the module 19 To compile this driver as a module, choose M here: the module
20 will be called ak8974. 20 will be called ak8974.
diff --git a/drivers/iio/magnetometer/ak8974.c b/drivers/iio/magnetometer/ak8974.c
index e13370dc9b1c..0bff76e96950 100644
--- a/drivers/iio/magnetometer/ak8974.c
+++ b/drivers/iio/magnetometer/ak8974.c
@@ -20,6 +20,7 @@
20#include <linux/mutex.h> 20#include <linux/mutex.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/bitops.h> 22#include <linux/bitops.h>
23#include <linux/random.h>
23#include <linux/regmap.h> 24#include <linux/regmap.h>
24#include <linux/regulator/consumer.h> 25#include <linux/regulator/consumer.h>
25#include <linux/pm_runtime.h> 26#include <linux/pm_runtime.h>
@@ -36,7 +37,7 @@
36 * and MSB is at the next higher address. 37 * and MSB is at the next higher address.
37 */ 38 */
38 39
39/* These registers are common for AK8974 and AMI305 */ 40/* These registers are common for AK8974 and AMI30x */
40#define AK8974_SELFTEST 0x0C 41#define AK8974_SELFTEST 0x0C
41#define AK8974_SELFTEST_IDLE 0x55 42#define AK8974_SELFTEST_IDLE 0x55
42#define AK8974_SELFTEST_OK 0xAA 43#define AK8974_SELFTEST_OK 0xAA
@@ -44,6 +45,7 @@
44#define AK8974_INFO 0x0D 45#define AK8974_INFO 0x0D
45 46
46#define AK8974_WHOAMI 0x0F 47#define AK8974_WHOAMI 0x0F
48#define AK8974_WHOAMI_VALUE_AMI306 0x46
47#define AK8974_WHOAMI_VALUE_AMI305 0x47 49#define AK8974_WHOAMI_VALUE_AMI305 0x47
48#define AK8974_WHOAMI_VALUE_AK8974 0x48 50#define AK8974_WHOAMI_VALUE_AK8974 0x48
49 51
@@ -73,6 +75,35 @@
73#define AK8974_TEMP 0x31 75#define AK8974_TEMP 0x31
74#define AMI305_TEMP 0x60 76#define AMI305_TEMP 0x60
75 77
78/* AMI306-specific control register */
79#define AMI306_CTRL4 0x5C
80
81/* AMI306 factory calibration data */
82
83/* fine axis sensitivity */
84#define AMI306_FINEOUTPUT_X 0x90
85#define AMI306_FINEOUTPUT_Y 0x92
86#define AMI306_FINEOUTPUT_Z 0x94
87
88/* axis sensitivity */
89#define AMI306_SENS_X 0x96
90#define AMI306_SENS_Y 0x98
91#define AMI306_SENS_Z 0x9A
92
93/* axis cross-interference */
94#define AMI306_GAIN_PARA_XZ 0x9C
95#define AMI306_GAIN_PARA_XY 0x9D
96#define AMI306_GAIN_PARA_YZ 0x9E
97#define AMI306_GAIN_PARA_YX 0x9F
98#define AMI306_GAIN_PARA_ZY 0xA0
99#define AMI306_GAIN_PARA_ZX 0xA1
100
101/* offset at ZERO magnetic field */
102#define AMI306_OFFZERO_X 0xF8
103#define AMI306_OFFZERO_Y 0xFA
104#define AMI306_OFFZERO_Z 0xFC
105
106
76#define AK8974_INT_X_HIGH BIT(7) /* Axis over +threshold */ 107#define AK8974_INT_X_HIGH BIT(7) /* Axis over +threshold */
77#define AK8974_INT_Y_HIGH BIT(6) 108#define AK8974_INT_Y_HIGH BIT(6)
78#define AK8974_INT_Z_HIGH BIT(5) 109#define AK8974_INT_Z_HIGH BIT(5)
@@ -158,6 +189,26 @@ struct ak8974 {
158static const char ak8974_reg_avdd[] = "avdd"; 189static const char ak8974_reg_avdd[] = "avdd";
159static const char ak8974_reg_dvdd[] = "dvdd"; 190static const char ak8974_reg_dvdd[] = "dvdd";
160 191
192static int ak8974_get_u16_val(struct ak8974 *ak8974, u8 reg, u16 *val)
193{
194 int ret;
195 __le16 bulk;
196
197 ret = regmap_bulk_read(ak8974->map, reg, &bulk, 2);
198 if (ret)
199 return ret;
200 *val = le16_to_cpu(bulk);
201
202 return 0;
203}
204
205static int ak8974_set_u16_val(struct ak8974 *ak8974, u8 reg, u16 val)
206{
207 __le16 bulk = cpu_to_le16(val);
208
209 return regmap_bulk_write(ak8974->map, reg, &bulk, 2);
210}
211
161static int ak8974_set_power(struct ak8974 *ak8974, bool mode) 212static int ak8974_set_power(struct ak8974 *ak8974, bool mode)
162{ 213{
163 int ret; 214 int ret;
@@ -209,6 +260,12 @@ static int ak8974_configure(struct ak8974 *ak8974)
209 ret = regmap_write(ak8974->map, AK8974_CTRL3, 0); 260 ret = regmap_write(ak8974->map, AK8974_CTRL3, 0);
210 if (ret) 261 if (ret)
211 return ret; 262 return ret;
263 if (ak8974->variant == AK8974_WHOAMI_VALUE_AMI306) {
264 /* magic from datasheet: set high-speed measurement mode */
265 ret = ak8974_set_u16_val(ak8974, AMI306_CTRL4, 0xA07E);
266 if (ret)
267 return ret;
268 }
212 ret = regmap_write(ak8974->map, AK8974_INT_CTRL, AK8974_INT_CTRL_POL); 269 ret = regmap_write(ak8974->map, AK8974_INT_CTRL, AK8974_INT_CTRL_POL);
213 if (ret) 270 if (ret)
214 return ret; 271 return ret;
@@ -388,17 +445,18 @@ static int ak8974_selftest(struct ak8974 *ak8974)
388 return 0; 445 return 0;
389} 446}
390 447
391static int ak8974_get_u16_val(struct ak8974 *ak8974, u8 reg, u16 *val) 448static void ak8974_read_calib_data(struct ak8974 *ak8974, unsigned int reg,
449 __le16 *tab, size_t tab_size)
392{ 450{
393 int ret; 451 int ret = regmap_bulk_read(ak8974->map, reg, tab, tab_size);
394 __le16 bulk; 452 if (ret) {
395 453 memset(tab, 0xFF, tab_size);
396 ret = regmap_bulk_read(ak8974->map, reg, &bulk, 2); 454 dev_warn(&ak8974->i2c->dev,
397 if (ret) 455 "can't read calibration data (regs %u..%zu): %d\n",
398 return ret; 456 reg, reg + tab_size - 1, ret);
399 *val = le16_to_cpu(bulk); 457 } else {
400 458 add_device_randomness(tab, tab_size);
401 return 0; 459 }
402} 460}
403 461
404static int ak8974_detect(struct ak8974 *ak8974) 462static int ak8974_detect(struct ak8974 *ak8974)
@@ -413,9 +471,13 @@ static int ak8974_detect(struct ak8974 *ak8974)
413 if (ret) 471 if (ret)
414 return ret; 472 return ret;
415 473
474 name = "ami305";
475
416 switch (whoami) { 476 switch (whoami) {
477 case AK8974_WHOAMI_VALUE_AMI306:
478 name = "ami306";
479 /* fall-through */
417 case AK8974_WHOAMI_VALUE_AMI305: 480 case AK8974_WHOAMI_VALUE_AMI305:
418 name = "ami305";
419 ret = regmap_read(ak8974->map, AMI305_VER, &fw); 481 ret = regmap_read(ak8974->map, AMI305_VER, &fw);
420 if (ret) 482 if (ret)
421 return ret; 483 return ret;
@@ -423,6 +485,7 @@ static int ak8974_detect(struct ak8974 *ak8974)
423 ret = ak8974_get_u16_val(ak8974, AMI305_SN, &sn); 485 ret = ak8974_get_u16_val(ak8974, AMI305_SN, &sn);
424 if (ret) 486 if (ret)
425 return ret; 487 return ret;
488 add_device_randomness(&sn, sizeof(sn));
426 dev_info(&ak8974->i2c->dev, 489 dev_info(&ak8974->i2c->dev,
427 "detected %s, FW ver %02x, S/N: %04x\n", 490 "detected %s, FW ver %02x, S/N: %04x\n",
428 name, fw, sn); 491 name, fw, sn);
@@ -440,6 +503,33 @@ static int ak8974_detect(struct ak8974 *ak8974)
440 ak8974->name = name; 503 ak8974->name = name;
441 ak8974->variant = whoami; 504 ak8974->variant = whoami;
442 505
506 if (whoami == AK8974_WHOAMI_VALUE_AMI306) {
507 __le16 fab_data1[9], fab_data2[3];
508 int i;
509
510 ak8974_read_calib_data(ak8974, AMI306_FINEOUTPUT_X,
511 fab_data1, sizeof(fab_data1));
512 ak8974_read_calib_data(ak8974, AMI306_OFFZERO_X,
513 fab_data2, sizeof(fab_data2));
514
515 for (i = 0; i < 3; ++i) {
516 static const char axis[3] = "XYZ";
517 static const char pgaxis[6] = "ZYZXYX";
518 unsigned offz = le16_to_cpu(fab_data2[i]) & 0x7F;
519 unsigned fine = le16_to_cpu(fab_data1[i]);
520 unsigned sens = le16_to_cpu(fab_data1[i + 3]);
521 unsigned pgain1 = le16_to_cpu(fab_data1[i + 6]);
522 unsigned pgain2 = pgain1 >> 8;
523
524 pgain1 &= 0xFF;
525
526 dev_info(&ak8974->i2c->dev,
527 "factory calibration for axis %c: offz=%u sens=%u fine=%u pga%c=%u pga%c=%u\n",
528 axis[i], offz, sens, fine, pgaxis[i * 2],
529 pgain1, pgaxis[i * 2 + 1], pgain2);
530 }
531 }
532
443 return 0; 533 return 0;
444} 534}
445 535
@@ -602,19 +692,27 @@ static bool ak8974_writeable_reg(struct device *dev, unsigned int reg)
602 case AMI305_OFFSET_Y + 1: 692 case AMI305_OFFSET_Y + 1:
603 case AMI305_OFFSET_Z: 693 case AMI305_OFFSET_Z:
604 case AMI305_OFFSET_Z + 1: 694 case AMI305_OFFSET_Z + 1:
605 if (ak8974->variant == AK8974_WHOAMI_VALUE_AMI305) 695 return ak8974->variant == AK8974_WHOAMI_VALUE_AMI305 ||
606 return true; 696 ak8974->variant == AK8974_WHOAMI_VALUE_AMI306;
607 return false; 697 case AMI306_CTRL4:
698 case AMI306_CTRL4 + 1:
699 return ak8974->variant == AK8974_WHOAMI_VALUE_AMI306;
608 default: 700 default:
609 return false; 701 return false;
610 } 702 }
611} 703}
612 704
705static bool ak8974_precious_reg(struct device *dev, unsigned int reg)
706{
707 return reg == AK8974_INT_CLEAR;
708}
709
613static const struct regmap_config ak8974_regmap_config = { 710static const struct regmap_config ak8974_regmap_config = {
614 .reg_bits = 8, 711 .reg_bits = 8,
615 .val_bits = 8, 712 .val_bits = 8,
616 .max_register = 0xff, 713 .max_register = 0xff,
617 .writeable_reg = ak8974_writeable_reg, 714 .writeable_reg = ak8974_writeable_reg,
715 .precious_reg = ak8974_precious_reg,
618}; 716};
619 717
620static int ak8974_probe(struct i2c_client *i2c, 718static int ak8974_probe(struct i2c_client *i2c,
@@ -678,7 +776,7 @@ static int ak8974_probe(struct i2c_client *i2c,
678 776
679 ret = ak8974_detect(ak8974); 777 ret = ak8974_detect(ak8974);
680 if (ret) { 778 if (ret) {
681 dev_err(&i2c->dev, "neither AK8974 nor AMI305 found\n"); 779 dev_err(&i2c->dev, "neither AK8974 nor AMI30x found\n");
682 goto power_off; 780 goto power_off;
683 } 781 }
684 782
@@ -827,6 +925,7 @@ static const struct dev_pm_ops ak8974_dev_pm_ops = {
827 925
828static const struct i2c_device_id ak8974_id[] = { 926static const struct i2c_device_id ak8974_id[] = {
829 {"ami305", 0 }, 927 {"ami305", 0 },
928 {"ami306", 0 },
830 {"ak8974", 0 }, 929 {"ak8974", 0 },
831 {} 930 {}
832}; 931};
@@ -850,7 +949,7 @@ static struct i2c_driver ak8974_driver = {
850}; 949};
851module_i2c_driver(ak8974_driver); 950module_i2c_driver(ak8974_driver);
852 951
853MODULE_DESCRIPTION("AK8974 and AMI305 3-axis magnetometer driver"); 952MODULE_DESCRIPTION("AK8974 and AMI30x 3-axis magnetometer driver");
854MODULE_AUTHOR("Samu Onkalo"); 953MODULE_AUTHOR("Samu Onkalo");
855MODULE_AUTHOR("Linus Walleij"); 954MODULE_AUTHOR("Linus Walleij");
856MODULE_LICENSE("GPL v2"); 955MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/magnetometer/st_magn.h b/drivers/iio/magnetometer/st_magn.h
index 9daca4681922..8fe51ce427bd 100644
--- a/drivers/iio/magnetometer/st_magn.h
+++ b/drivers/iio/magnetometer/st_magn.h
@@ -19,6 +19,7 @@
19#define LSM303DLM_MAGN_DEV_NAME "lsm303dlm_magn" 19#define LSM303DLM_MAGN_DEV_NAME "lsm303dlm_magn"
20#define LIS3MDL_MAGN_DEV_NAME "lis3mdl" 20#define LIS3MDL_MAGN_DEV_NAME "lis3mdl"
21#define LSM303AGR_MAGN_DEV_NAME "lsm303agr_magn" 21#define LSM303AGR_MAGN_DEV_NAME "lsm303agr_magn"
22#define LIS2MDL_MAGN_DEV_NAME "lis2mdl"
22 23
23int st_magn_common_probe(struct iio_dev *indio_dev); 24int st_magn_common_probe(struct iio_dev *indio_dev);
24void st_magn_common_remove(struct iio_dev *indio_dev); 25void st_magn_common_remove(struct iio_dev *indio_dev);
diff --git a/drivers/iio/magnetometer/st_magn_core.c b/drivers/iio/magnetometer/st_magn_core.c
index 3573636bad8e..703e77008652 100644
--- a/drivers/iio/magnetometer/st_magn_core.c
+++ b/drivers/iio/magnetometer/st_magn_core.c
@@ -323,6 +323,7 @@ static const struct st_sensor_settings st_magn_sensors_settings[] = {
323 .wai_addr = 0x4f, 323 .wai_addr = 0x4f,
324 .sensors_supported = { 324 .sensors_supported = {
325 [0] = LSM303AGR_MAGN_DEV_NAME, 325 [0] = LSM303AGR_MAGN_DEV_NAME,
326 [1] = LIS2MDL_MAGN_DEV_NAME,
326 }, 327 },
327 .ch = (struct iio_chan_spec *)st_magn_3_16bit_channels, 328 .ch = (struct iio_chan_spec *)st_magn_3_16bit_channels,
328 .odr = { 329 .odr = {
diff --git a/drivers/iio/magnetometer/st_magn_i2c.c b/drivers/iio/magnetometer/st_magn_i2c.c
index 6a6c8121ac2c..feaa28cf6a77 100644
--- a/drivers/iio/magnetometer/st_magn_i2c.c
+++ b/drivers/iio/magnetometer/st_magn_i2c.c
@@ -40,6 +40,10 @@ static const struct of_device_id st_magn_of_match[] = {
40 .compatible = "st,lsm303agr-magn", 40 .compatible = "st,lsm303agr-magn",
41 .data = LSM303AGR_MAGN_DEV_NAME, 41 .data = LSM303AGR_MAGN_DEV_NAME,
42 }, 42 },
43 {
44 .compatible = "st,lis2mdl",
45 .data = LIS2MDL_MAGN_DEV_NAME,
46 },
43 {}, 47 {},
44}; 48};
45MODULE_DEVICE_TABLE(of, st_magn_of_match); 49MODULE_DEVICE_TABLE(of, st_magn_of_match);
@@ -85,6 +89,7 @@ static const struct i2c_device_id st_magn_id_table[] = {
85 { LSM303DLM_MAGN_DEV_NAME }, 89 { LSM303DLM_MAGN_DEV_NAME },
86 { LIS3MDL_MAGN_DEV_NAME }, 90 { LIS3MDL_MAGN_DEV_NAME },
87 { LSM303AGR_MAGN_DEV_NAME }, 91 { LSM303AGR_MAGN_DEV_NAME },
92 { LIS2MDL_MAGN_DEV_NAME },
88 {}, 93 {},
89}; 94};
90MODULE_DEVICE_TABLE(i2c, st_magn_id_table); 95MODULE_DEVICE_TABLE(i2c, st_magn_id_table);
diff --git a/drivers/iio/magnetometer/st_magn_spi.c b/drivers/iio/magnetometer/st_magn_spi.c
index 1ea64dd318aa..7b7cd08fcc32 100644
--- a/drivers/iio/magnetometer/st_magn_spi.c
+++ b/drivers/iio/magnetometer/st_magn_spi.c
@@ -33,6 +33,10 @@ static const struct of_device_id st_magn_of_match[] = {
33 .compatible = "st,lsm303agr-magn", 33 .compatible = "st,lsm303agr-magn",
34 .data = LSM303AGR_MAGN_DEV_NAME, 34 .data = LSM303AGR_MAGN_DEV_NAME,
35 }, 35 },
36 {
37 .compatible = "st,lis2mdl",
38 .data = LIS2MDL_MAGN_DEV_NAME,
39 },
36 {} 40 {}
37}; 41};
38MODULE_DEVICE_TABLE(of, st_magn_of_match); 42MODULE_DEVICE_TABLE(of, st_magn_of_match);
@@ -74,6 +78,7 @@ static int st_magn_spi_remove(struct spi_device *spi)
74static const struct spi_device_id st_magn_id_table[] = { 78static const struct spi_device_id st_magn_id_table[] = {
75 { LIS3MDL_MAGN_DEV_NAME }, 79 { LIS3MDL_MAGN_DEV_NAME },
76 { LSM303AGR_MAGN_DEV_NAME }, 80 { LSM303AGR_MAGN_DEV_NAME },
81 { LIS2MDL_MAGN_DEV_NAME },
77 {}, 82 {},
78}; 83};
79MODULE_DEVICE_TABLE(spi, st_magn_id_table); 84MODULE_DEVICE_TABLE(spi, st_magn_id_table);
diff --git a/drivers/iio/pressure/st_pressure_core.c b/drivers/iio/pressure/st_pressure_core.c
index f1bce05ffa13..34611a8ea2ce 100644
--- a/drivers/iio/pressure/st_pressure_core.c
+++ b/drivers/iio/pressure/st_pressure_core.c
@@ -390,7 +390,7 @@ static const struct st_sensor_settings st_press_sensors_settings[] = {
390 .drdy_irq = { 390 .drdy_irq = {
391 .addr = 0x23, 391 .addr = 0x23,
392 .mask_int1 = 0x01, 392 .mask_int1 = 0x01,
393 .mask_int2 = 0x10, 393 .mask_int2 = 0x00,
394 .addr_ihl = 0x22, 394 .addr_ihl = 0x22,
395 .mask_ihl = 0x80, 395 .mask_ihl = 0x80,
396 .addr_od = 0x22, 396 .addr_od = 0x22,
@@ -449,7 +449,7 @@ static const struct st_sensor_settings st_press_sensors_settings[] = {
449 .drdy_irq = { 449 .drdy_irq = {
450 .addr = 0x12, 450 .addr = 0x12,
451 .mask_int1 = 0x04, 451 .mask_int1 = 0x04,
452 .mask_int2 = 0x08, 452 .mask_int2 = 0x00,
453 .addr_ihl = 0x12, 453 .addr_ihl = 0x12,
454 .mask_ihl = 0x80, 454 .mask_ihl = 0x80,
455 .addr_od = 0x12, 455 .addr_od = 0x12,
diff --git a/drivers/iio/proximity/Kconfig b/drivers/iio/proximity/Kconfig
index 5b81a8c9d438..ae070950f920 100644
--- a/drivers/iio/proximity/Kconfig
+++ b/drivers/iio/proximity/Kconfig
@@ -57,12 +57,12 @@ config SX9500
57 module will be called sx9500. 57 module will be called sx9500.
58 58
59config SRF08 59config SRF08
60 tristate "Devantech SRF08 ultrasonic ranger sensor" 60 tristate "Devantech SRF02/SRF08/SRF10 ultrasonic ranger sensor"
61 depends on I2C 61 depends on I2C
62 help 62 help
63 Say Y here to build a driver for Devantech SRF08 ultrasonic 63 Say Y here to build a driver for Devantech SRF02/SRF08/SRF10
64 ranger sensor. This driver can be used to measure the distance 64 ultrasonic ranger sensors with i2c interface.
65 of objects. 65 This driver can be used to measure the distance of objects.
66 66
67 To compile this driver as a module, choose M here: the 67 To compile this driver as a module, choose M here: the
68 module will be called srf08. 68 module will be called srf08.
diff --git a/drivers/iio/proximity/srf08.c b/drivers/iio/proximity/srf08.c
index 49316cbf7c60..9380d545aab1 100644
--- a/drivers/iio/proximity/srf08.c
+++ b/drivers/iio/proximity/srf08.c
@@ -1,14 +1,18 @@
1/* 1/*
2 * srf08.c - Support for Devantech SRF08 ultrasonic ranger 2 * srf08.c - Support for Devantech SRFxx ultrasonic ranger
3 * with i2c interface
4 * actually supported are srf02, srf08, srf10
3 * 5 *
4 * Copyright (c) 2016 Andreas Klinger <ak@it-klinger.de> 6 * Copyright (c) 2016, 2017 Andreas Klinger <ak@it-klinger.de>
5 * 7 *
6 * This file is subject to the terms and conditions of version 2 of 8 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main 9 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details. 10 * directory of this archive for more details.
9 * 11 *
10 * For details about the device see: 12 * For details about the device see:
11 * http://www.robot-electronics.co.uk/htm/srf08tech.html 13 * http://www.robot-electronics.co.uk/htm/srf08tech.html
14 * http://www.robot-electronics.co.uk/htm/srf10tech.htm
15 * http://www.robot-electronics.co.uk/htm/srf02tech.htm
12 */ 16 */
13 17
14#include <linux/err.h> 18#include <linux/err.h>
@@ -18,6 +22,9 @@
18#include <linux/bitops.h> 22#include <linux/bitops.h>
19#include <linux/iio/iio.h> 23#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h> 24#include <linux/iio/sysfs.h>
25#include <linux/iio/buffer.h>
26#include <linux/iio/trigger_consumer.h>
27#include <linux/iio/triggered_buffer.h>
21 28
22/* registers of SRF08 device */ 29/* registers of SRF08 device */
23#define SRF08_WRITE_COMMAND 0x00 /* Command Register */ 30#define SRF08_WRITE_COMMAND 0x00 /* Command Register */
@@ -30,14 +37,46 @@
30 37
31#define SRF08_CMD_RANGING_CM 0x51 /* Ranging Mode - Result in cm */ 38#define SRF08_CMD_RANGING_CM 0x51 /* Ranging Mode - Result in cm */
32 39
33#define SRF08_DEFAULT_GAIN 1025 /* default analogue value of Gain */ 40enum srf08_sensor_type {
34#define SRF08_DEFAULT_RANGE 6020 /* default value of Range in mm */ 41 SRF02,
42 SRF08,
43 SRF10,
44 SRF_MAX_TYPE
45};
46
47struct srf08_chip_info {
48 const int *sensitivity_avail;
49 int num_sensitivity_avail;
50 int sensitivity_default;
51
52 /* default value of Range in mm */
53 int range_default;
54};
35 55
36struct srf08_data { 56struct srf08_data {
37 struct i2c_client *client; 57 struct i2c_client *client;
38 int sensitivity; /* Gain */ 58
39 int range_mm; /* max. Range in mm */ 59 /*
60 * Gain in the datasheet is called sensitivity here to distinct it
61 * from the gain used with amplifiers of adc's
62 */
63 int sensitivity;
64
65 /* max. Range in mm */
66 int range_mm;
40 struct mutex lock; 67 struct mutex lock;
68
69 /*
70 * triggered buffer
71 * 1x16-bit channel + 3x16 padding + 4x16 timestamp
72 */
73 s16 buffer[8];
74
75 /* Sensor-Type */
76 enum srf08_sensor_type sensor_type;
77
78 /* Chip-specific information */
79 const struct srf08_chip_info *chip_info;
41}; 80};
42 81
43/* 82/*
@@ -47,11 +86,42 @@ struct srf08_data {
47 * But with ADC's this term is already used differently and that's why it 86 * But with ADC's this term is already used differently and that's why it
48 * is called "Sensitivity" here. 87 * is called "Sensitivity" here.
49 */ 88 */
50static const int srf08_sensitivity[] = { 89static const struct srf08_chip_info srf02_chip_info = {
90 .sensitivity_avail = NULL,
91 .num_sensitivity_avail = 0,
92 .sensitivity_default = 0,
93
94 .range_default = 0,
95};
96
97static const int srf08_sensitivity_avail[] = {
51 94, 97, 100, 103, 107, 110, 114, 118, 98 94, 97, 100, 103, 107, 110, 114, 118,
52 123, 128, 133, 139, 145, 152, 159, 168, 99 123, 128, 133, 139, 145, 152, 159, 168,
53 177, 187, 199, 212, 227, 245, 265, 288, 100 177, 187, 199, 212, 227, 245, 265, 288,
54 317, 352, 395, 450, 524, 626, 777, 1025 }; 101 317, 352, 395, 450, 524, 626, 777, 1025
102 };
103
104static const struct srf08_chip_info srf08_chip_info = {
105 .sensitivity_avail = srf08_sensitivity_avail,
106 .num_sensitivity_avail = ARRAY_SIZE(srf08_sensitivity_avail),
107 .sensitivity_default = 1025,
108
109 .range_default = 6020,
110};
111
112static const int srf10_sensitivity_avail[] = {
113 40, 40, 50, 60, 70, 80, 100, 120,
114 140, 200, 250, 300, 350, 400, 500, 600,
115 700,
116 };
117
118static const struct srf08_chip_info srf10_chip_info = {
119 .sensitivity_avail = srf10_sensitivity_avail,
120 .num_sensitivity_avail = ARRAY_SIZE(srf10_sensitivity_avail),
121 .sensitivity_default = 700,
122
123 .range_default = 6020,
124};
55 125
56static int srf08_read_ranging(struct srf08_data *data) 126static int srf08_read_ranging(struct srf08_data *data)
57{ 127{
@@ -110,6 +180,29 @@ static int srf08_read_ranging(struct srf08_data *data)
110 return ret; 180 return ret;
111} 181}
112 182
183static irqreturn_t srf08_trigger_handler(int irq, void *p)
184{
185 struct iio_poll_func *pf = p;
186 struct iio_dev *indio_dev = pf->indio_dev;
187 struct srf08_data *data = iio_priv(indio_dev);
188 s16 sensor_data;
189
190 sensor_data = srf08_read_ranging(data);
191 if (sensor_data < 0)
192 goto err;
193
194 mutex_lock(&data->lock);
195
196 data->buffer[0] = sensor_data;
197 iio_push_to_buffers_with_timestamp(indio_dev,
198 data->buffer, pf->timestamp);
199
200 mutex_unlock(&data->lock);
201err:
202 iio_trigger_notify_done(indio_dev->trig);
203 return IRQ_HANDLED;
204}
205
113static int srf08_read_raw(struct iio_dev *indio_dev, 206static int srf08_read_raw(struct iio_dev *indio_dev,
114 struct iio_chan_spec const *channel, int *val, 207 struct iio_chan_spec const *channel, int *val,
115 int *val2, long mask) 208 int *val2, long mask)
@@ -225,9 +318,13 @@ static ssize_t srf08_show_sensitivity_available(struct device *dev,
225 struct device_attribute *attr, char *buf) 318 struct device_attribute *attr, char *buf)
226{ 319{
227 int i, len = 0; 320 int i, len = 0;
321 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
322 struct srf08_data *data = iio_priv(indio_dev);
228 323
229 for (i = 0; i < ARRAY_SIZE(srf08_sensitivity); i++) 324 for (i = 0; i < data->chip_info->num_sensitivity_avail; i++)
230 len += sprintf(buf + len, "%d ", srf08_sensitivity[i]); 325 if (data->chip_info->sensitivity_avail[i])
326 len += sprintf(buf + len, "%d ",
327 data->chip_info->sensitivity_avail[i]);
231 328
232 len += sprintf(buf + len, "\n"); 329 len += sprintf(buf + len, "\n");
233 330
@@ -256,19 +353,21 @@ static ssize_t srf08_write_sensitivity(struct srf08_data *data,
256 int ret, i; 353 int ret, i;
257 u8 regval; 354 u8 regval;
258 355
259 for (i = 0; i < ARRAY_SIZE(srf08_sensitivity); i++) 356 if (!val)
260 if (val == srf08_sensitivity[i]) { 357 return -EINVAL;
358
359 for (i = 0; i < data->chip_info->num_sensitivity_avail; i++)
360 if (val && (val == data->chip_info->sensitivity_avail[i])) {
261 regval = i; 361 regval = i;
262 break; 362 break;
263 } 363 }
264 364
265 if (i >= ARRAY_SIZE(srf08_sensitivity)) 365 if (i >= data->chip_info->num_sensitivity_avail)
266 return -EINVAL; 366 return -EINVAL;
267 367
268 mutex_lock(&data->lock); 368 mutex_lock(&data->lock);
269 369
270 ret = i2c_smbus_write_byte_data(client, 370 ret = i2c_smbus_write_byte_data(client, SRF08_WRITE_MAX_GAIN, regval);
271 SRF08_WRITE_MAX_GAIN, regval);
272 if (ret < 0) { 371 if (ret < 0) {
273 dev_err(&client->dev, "write_sensitivity - err: %d\n", ret); 372 dev_err(&client->dev, "write_sensitivity - err: %d\n", ret);
274 mutex_unlock(&data->lock); 373 mutex_unlock(&data->lock);
@@ -323,7 +422,15 @@ static const struct iio_chan_spec srf08_channels[] = {
323 .info_mask_separate = 422 .info_mask_separate =
324 BIT(IIO_CHAN_INFO_RAW) | 423 BIT(IIO_CHAN_INFO_RAW) |
325 BIT(IIO_CHAN_INFO_SCALE), 424 BIT(IIO_CHAN_INFO_SCALE),
425 .scan_index = 0,
426 .scan_type = {
427 .sign = 's',
428 .realbits = 16,
429 .storagebits = 16,
430 .endianness = IIO_CPU,
431 },
326 }, 432 },
433 IIO_CHAN_SOFT_TIMESTAMP(1),
327}; 434};
328 435
329static const struct iio_info srf08_info = { 436static const struct iio_info srf08_info = {
@@ -332,6 +439,15 @@ static const struct iio_info srf08_info = {
332 .driver_module = THIS_MODULE, 439 .driver_module = THIS_MODULE,
333}; 440};
334 441
442/*
443 * srf02 don't have an adjustable range or sensitivity,
444 * so we don't need attributes at all
445 */
446static const struct iio_info srf02_info = {
447 .read_raw = srf08_read_raw,
448 .driver_module = THIS_MODULE,
449};
450
335static int srf08_probe(struct i2c_client *client, 451static int srf08_probe(struct i2c_client *client,
336 const struct i2c_device_id *id) 452 const struct i2c_device_id *id)
337{ 453{
@@ -352,34 +468,84 @@ static int srf08_probe(struct i2c_client *client,
352 data = iio_priv(indio_dev); 468 data = iio_priv(indio_dev);
353 i2c_set_clientdata(client, indio_dev); 469 i2c_set_clientdata(client, indio_dev);
354 data->client = client; 470 data->client = client;
471 data->sensor_type = (enum srf08_sensor_type)id->driver_data;
472
473 switch (data->sensor_type) {
474 case SRF02:
475 data->chip_info = &srf02_chip_info;
476 indio_dev->info = &srf02_info;
477 break;
478 case SRF08:
479 data->chip_info = &srf08_chip_info;
480 indio_dev->info = &srf08_info;
481 break;
482 case SRF10:
483 data->chip_info = &srf10_chip_info;
484 indio_dev->info = &srf08_info;
485 break;
486 default:
487 return -EINVAL;
488 }
355 489
356 indio_dev->name = "srf08"; 490 indio_dev->name = id->name;
357 indio_dev->dev.parent = &client->dev; 491 indio_dev->dev.parent = &client->dev;
358 indio_dev->modes = INDIO_DIRECT_MODE; 492 indio_dev->modes = INDIO_DIRECT_MODE;
359 indio_dev->info = &srf08_info;
360 indio_dev->channels = srf08_channels; 493 indio_dev->channels = srf08_channels;
361 indio_dev->num_channels = ARRAY_SIZE(srf08_channels); 494 indio_dev->num_channels = ARRAY_SIZE(srf08_channels);
362 495
363 mutex_init(&data->lock); 496 mutex_init(&data->lock);
364 497
365 /* 498 ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev,
366 * set default values of device here 499 iio_pollfunc_store_time, srf08_trigger_handler, NULL);
367 * these register values cannot be read from the hardware 500 if (ret < 0) {
368 * therefore set driver specific default values 501 dev_err(&client->dev, "setup of iio triggered buffer failed\n");
369 */
370 ret = srf08_write_range_mm(data, SRF08_DEFAULT_RANGE);
371 if (ret < 0)
372 return ret; 502 return ret;
503 }
373 504
374 ret = srf08_write_sensitivity(data, SRF08_DEFAULT_GAIN); 505 if (data->chip_info->range_default) {
375 if (ret < 0) 506 /*
376 return ret; 507 * set default range of device in mm here
508 * these register values cannot be read from the hardware
509 * therefore set driver specific default values
510 *
511 * srf02 don't have a default value so it'll be omitted
512 */
513 ret = srf08_write_range_mm(data,
514 data->chip_info->range_default);
515 if (ret < 0)
516 return ret;
517 }
518
519 if (data->chip_info->sensitivity_default) {
520 /*
521 * set default sensitivity of device here
522 * these register values cannot be read from the hardware
523 * therefore set driver specific default values
524 *
525 * srf02 don't have a default value so it'll be omitted
526 */
527 ret = srf08_write_sensitivity(data,
528 data->chip_info->sensitivity_default);
529 if (ret < 0)
530 return ret;
531 }
377 532
378 return devm_iio_device_register(&client->dev, indio_dev); 533 return devm_iio_device_register(&client->dev, indio_dev);
379} 534}
380 535
536static const struct of_device_id of_srf08_match[] = {
537 { .compatible = "devantech,srf02", (void *)SRF02},
538 { .compatible = "devantech,srf08", (void *)SRF08},
539 { .compatible = "devantech,srf10", (void *)SRF10},
540 {},
541};
542
543MODULE_DEVICE_TABLE(of, of_srf08_match);
544
381static const struct i2c_device_id srf08_id[] = { 545static const struct i2c_device_id srf08_id[] = {
382 { "srf08", 0 }, 546 { "srf02", SRF02 },
547 { "srf08", SRF08 },
548 { "srf10", SRF10 },
383 { } 549 { }
384}; 550};
385MODULE_DEVICE_TABLE(i2c, srf08_id); 551MODULE_DEVICE_TABLE(i2c, srf08_id);
@@ -387,6 +553,7 @@ MODULE_DEVICE_TABLE(i2c, srf08_id);
387static struct i2c_driver srf08_driver = { 553static struct i2c_driver srf08_driver = {
388 .driver = { 554 .driver = {
389 .name = "srf08", 555 .name = "srf08",
556 .of_match_table = of_srf08_match,
390 }, 557 },
391 .probe = srf08_probe, 558 .probe = srf08_probe,
392 .id_table = srf08_id, 559 .id_table = srf08_id,
@@ -394,5 +561,5 @@ static struct i2c_driver srf08_driver = {
394module_i2c_driver(srf08_driver); 561module_i2c_driver(srf08_driver);
395 562
396MODULE_AUTHOR("Andreas Klinger <ak@it-klinger.de>"); 563MODULE_AUTHOR("Andreas Klinger <ak@it-klinger.de>");
397MODULE_DESCRIPTION("Devantech SRF08 ultrasonic ranger driver"); 564MODULE_DESCRIPTION("Devantech SRF02/SRF08/SRF10 i2c ultrasonic ranger driver");
398MODULE_LICENSE("GPL"); 565MODULE_LICENSE("GPL");
diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c
index d22bc56dd9fc..a9bc5b603b86 100644
--- a/drivers/iio/trigger/stm32-timer-trigger.c
+++ b/drivers/iio/trigger/stm32-timer-trigger.c
@@ -13,6 +13,7 @@
13#include <linux/mfd/stm32-timers.h> 13#include <linux/mfd/stm32-timers.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/of_device.h>
16 17
17#define MAX_TRIGGERS 7 18#define MAX_TRIGGERS 7
18#define MAX_VALIDS 5 19#define MAX_VALIDS 5
@@ -28,9 +29,14 @@ static const void *triggers_table[][MAX_TRIGGERS] = {
28 { TIM7_TRGO,}, 29 { TIM7_TRGO,},
29 { TIM8_TRGO, TIM8_TRGO2, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4,}, 30 { TIM8_TRGO, TIM8_TRGO2, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4,},
30 { TIM9_TRGO, TIM9_CH1, TIM9_CH2,}, 31 { TIM9_TRGO, TIM9_CH1, TIM9_CH2,},
31 { }, /* timer 10 */ 32 { TIM10_OC1,},
32 { }, /* timer 11 */ 33 { TIM11_OC1,},
33 { TIM12_TRGO, TIM12_CH1, TIM12_CH2,}, 34 { TIM12_TRGO, TIM12_CH1, TIM12_CH2,},
35 { TIM13_OC1,},
36 { TIM14_OC1,},
37 { TIM15_TRGO,},
38 { TIM16_OC1,},
39 { TIM17_OC1,},
34}; 40};
35 41
36/* List the triggers accepted by each timer */ 42/* List the triggers accepted by each timer */
@@ -43,10 +49,30 @@ static const void *valids_table[][MAX_VALIDS] = {
43 { }, /* timer 6 */ 49 { }, /* timer 6 */
44 { }, /* timer 7 */ 50 { }, /* timer 7 */
45 { TIM1_TRGO, TIM2_TRGO, TIM4_TRGO, TIM5_TRGO,}, 51 { TIM1_TRGO, TIM2_TRGO, TIM4_TRGO, TIM5_TRGO,},
46 { TIM2_TRGO, TIM3_TRGO,}, 52 { TIM2_TRGO, TIM3_TRGO, TIM10_OC1, TIM11_OC1,},
53 { }, /* timer 10 */
54 { }, /* timer 11 */
55 { TIM4_TRGO, TIM5_TRGO, TIM13_OC1, TIM14_OC1,},
56};
57
58static const void *stm32h7_valids_table[][MAX_VALIDS] = {
59 { TIM15_TRGO, TIM2_TRGO, TIM3_TRGO, TIM4_TRGO,},
60 { TIM1_TRGO, TIM8_TRGO, TIM3_TRGO, TIM4_TRGO,},
61 { TIM1_TRGO, TIM2_TRGO, TIM15_TRGO, TIM4_TRGO,},
62 { TIM1_TRGO, TIM2_TRGO, TIM3_TRGO, TIM8_TRGO,},
63 { TIM1_TRGO, TIM8_TRGO, TIM3_TRGO, TIM4_TRGO,},
64 { }, /* timer 6 */
65 { }, /* timer 7 */
66 { TIM1_TRGO, TIM2_TRGO, TIM4_TRGO, TIM5_TRGO,},
67 { }, /* timer 9 */
47 { }, /* timer 10 */ 68 { }, /* timer 10 */
48 { }, /* timer 11 */ 69 { }, /* timer 11 */
49 { TIM4_TRGO, TIM5_TRGO,}, 70 { TIM4_TRGO, TIM5_TRGO, TIM13_OC1, TIM14_OC1,},
71 { }, /* timer 13 */
72 { }, /* timer 14 */
73 { TIM1_TRGO, TIM3_TRGO, TIM16_OC1, TIM17_OC1,},
74 { }, /* timer 16 */
75 { }, /* timer 17 */
50}; 76};
51 77
52struct stm32_timer_trigger { 78struct stm32_timer_trigger {
@@ -59,11 +85,21 @@ struct stm32_timer_trigger {
59 bool has_trgo2; 85 bool has_trgo2;
60}; 86};
61 87
88struct stm32_timer_trigger_cfg {
89 const void *(*valids_table)[MAX_VALIDS];
90 const unsigned int num_valids_table;
91};
92
62static bool stm32_timer_is_trgo2_name(const char *name) 93static bool stm32_timer_is_trgo2_name(const char *name)
63{ 94{
64 return !!strstr(name, "trgo2"); 95 return !!strstr(name, "trgo2");
65} 96}
66 97
98static bool stm32_timer_is_trgo_name(const char *name)
99{
100 return (!!strstr(name, "trgo") && !strstr(name, "trgo2"));
101}
102
67static int stm32_timer_start(struct stm32_timer_trigger *priv, 103static int stm32_timer_start(struct stm32_timer_trigger *priv,
68 struct iio_trigger *trig, 104 struct iio_trigger *trig,
69 unsigned int frequency) 105 unsigned int frequency)
@@ -328,6 +364,7 @@ static int stm32_setup_iio_triggers(struct stm32_timer_trigger *priv)
328 364
329 while (cur && *cur) { 365 while (cur && *cur) {
330 struct iio_trigger *trig; 366 struct iio_trigger *trig;
367 bool cur_is_trgo = stm32_timer_is_trgo_name(*cur);
331 bool cur_is_trgo2 = stm32_timer_is_trgo2_name(*cur); 368 bool cur_is_trgo2 = stm32_timer_is_trgo2_name(*cur);
332 369
333 if (cur_is_trgo2 && !priv->has_trgo2) { 370 if (cur_is_trgo2 && !priv->has_trgo2) {
@@ -344,10 +381,9 @@ static int stm32_setup_iio_triggers(struct stm32_timer_trigger *priv)
344 381
345 /* 382 /*
346 * sampling frequency and master mode attributes 383 * sampling frequency and master mode attributes
347 * should only be available on trgo trigger which 384 * should only be available on trgo/trgo2 triggers
348 * is always the first in the list.
349 */ 385 */
350 if (cur == priv->triggers || cur_is_trgo2) 386 if (cur_is_trgo || cur_is_trgo2)
351 trig->dev.groups = stm32_trigger_attr_groups; 387 trig->dev.groups = stm32_trigger_attr_groups;
352 388
353 iio_trigger_set_drvdata(trig, priv); 389 iio_trigger_set_drvdata(trig, priv);
@@ -734,18 +770,22 @@ static int stm32_timer_trigger_probe(struct platform_device *pdev)
734 struct device *dev = &pdev->dev; 770 struct device *dev = &pdev->dev;
735 struct stm32_timer_trigger *priv; 771 struct stm32_timer_trigger *priv;
736 struct stm32_timers *ddata = dev_get_drvdata(pdev->dev.parent); 772 struct stm32_timers *ddata = dev_get_drvdata(pdev->dev.parent);
773 const struct stm32_timer_trigger_cfg *cfg;
737 unsigned int index; 774 unsigned int index;
738 int ret; 775 int ret;
739 776
740 if (of_property_read_u32(dev->of_node, "reg", &index)) 777 if (of_property_read_u32(dev->of_node, "reg", &index))
741 return -EINVAL; 778 return -EINVAL;
742 779
780 cfg = (const struct stm32_timer_trigger_cfg *)
781 of_match_device(dev->driver->of_match_table, dev)->data;
782
743 if (index >= ARRAY_SIZE(triggers_table) || 783 if (index >= ARRAY_SIZE(triggers_table) ||
744 index >= ARRAY_SIZE(valids_table)) 784 index >= cfg->num_valids_table)
745 return -EINVAL; 785 return -EINVAL;
746 786
747 /* Create an IIO device only if we have triggers to be validated */ 787 /* Create an IIO device only if we have triggers to be validated */
748 if (*valids_table[index]) 788 if (*cfg->valids_table[index])
749 priv = stm32_setup_counter_device(dev); 789 priv = stm32_setup_counter_device(dev);
750 else 790 else
751 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 791 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -758,7 +798,7 @@ static int stm32_timer_trigger_probe(struct platform_device *pdev)
758 priv->clk = ddata->clk; 798 priv->clk = ddata->clk;
759 priv->max_arr = ddata->max_arr; 799 priv->max_arr = ddata->max_arr;
760 priv->triggers = triggers_table[index]; 800 priv->triggers = triggers_table[index];
761 priv->valids = valids_table[index]; 801 priv->valids = cfg->valids_table[index];
762 stm32_timer_detect_trgo2(priv); 802 stm32_timer_detect_trgo2(priv);
763 803
764 ret = stm32_setup_iio_triggers(priv); 804 ret = stm32_setup_iio_triggers(priv);
@@ -770,8 +810,24 @@ static int stm32_timer_trigger_probe(struct platform_device *pdev)
770 return 0; 810 return 0;
771} 811}
772 812
813static const struct stm32_timer_trigger_cfg stm32_timer_trg_cfg = {
814 .valids_table = valids_table,
815 .num_valids_table = ARRAY_SIZE(valids_table),
816};
817
818static const struct stm32_timer_trigger_cfg stm32h7_timer_trg_cfg = {
819 .valids_table = stm32h7_valids_table,
820 .num_valids_table = ARRAY_SIZE(stm32h7_valids_table),
821};
822
773static const struct of_device_id stm32_trig_of_match[] = { 823static const struct of_device_id stm32_trig_of_match[] = {
774 { .compatible = "st,stm32-timer-trigger", }, 824 {
825 .compatible = "st,stm32-timer-trigger",
826 .data = (void *)&stm32_timer_trg_cfg,
827 }, {
828 .compatible = "st,stm32h7-timer-trigger",
829 .data = (void *)&stm32h7_timer_trg_cfg,
830 },
775 { /* end node */ }, 831 { /* end node */ },
776}; 832};
777MODULE_DEVICE_TABLE(of, stm32_trig_of_match); 833MODULE_DEVICE_TABLE(of, stm32_trig_of_match);
diff --git a/drivers/staging/iio/adc/ad7606_par.c b/drivers/staging/iio/adc/ad7606_par.c
index cd6c410c0484..3eb6f8f312dd 100644
--- a/drivers/staging/iio/adc/ad7606_par.c
+++ b/drivers/staging/iio/adc/ad7606_par.c
@@ -57,8 +57,8 @@ static int ad7606_par_probe(struct platform_device *pdev)
57 57
58 irq = platform_get_irq(pdev, 0); 58 irq = platform_get_irq(pdev, 0);
59 if (irq < 0) { 59 if (irq < 0) {
60 dev_err(&pdev->dev, "no irq\n"); 60 dev_err(&pdev->dev, "no irq: %d\n", irq);
61 return -ENODEV; 61 return irq;
62 } 62 }
63 63
64 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 64 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
diff --git a/include/linux/iio/timer/stm32-timer-trigger.h b/include/linux/iio/timer/stm32-timer-trigger.h
index fa7d786ed99e..d68add80ab86 100644
--- a/include/linux/iio/timer/stm32-timer-trigger.h
+++ b/include/linux/iio/timer/stm32-timer-trigger.h
@@ -55,10 +55,24 @@
55#define TIM9_CH1 "tim9_ch1" 55#define TIM9_CH1 "tim9_ch1"
56#define TIM9_CH2 "tim9_ch2" 56#define TIM9_CH2 "tim9_ch2"
57 57
58#define TIM10_OC1 "tim10_oc1"
59
60#define TIM11_OC1 "tim11_oc1"
61
58#define TIM12_TRGO "tim12_trgo" 62#define TIM12_TRGO "tim12_trgo"
59#define TIM12_CH1 "tim12_ch1" 63#define TIM12_CH1 "tim12_ch1"
60#define TIM12_CH2 "tim12_ch2" 64#define TIM12_CH2 "tim12_ch2"
61 65
66#define TIM13_OC1 "tim13_oc1"
67
68#define TIM14_OC1 "tim14_oc1"
69
70#define TIM15_TRGO "tim15_trgo"
71
72#define TIM16_OC1 "tim16_oc1"
73
74#define TIM17_OC1 "tim17_oc1"
75
62bool is_stm32_timer_trigger(struct iio_trigger *trig); 76bool is_stm32_timer_trigger(struct iio_trigger *trig);
63 77
64#endif 78#endif
diff --git a/tools/Makefile b/tools/Makefile
index 221e1ce78b06..13d5d0a34721 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -93,7 +93,7 @@ kvm_stat: FORCE
93all: acpi cgroup cpupower gpio hv firewire lguest liblockdep \ 93all: acpi cgroup cpupower gpio hv firewire lguest liblockdep \
94 perf selftests turbostat usb \ 94 perf selftests turbostat usb \
95 virtio vm net x86_energy_perf_policy \ 95 virtio vm net x86_energy_perf_policy \
96 tmon freefall objtool kvm_stat 96 tmon freefall iio objtool kvm_stat
97 97
98acpi_install: 98acpi_install:
99 $(call descend,power/$(@:_install=),install) 99 $(call descend,power/$(@:_install=),install)
@@ -101,7 +101,7 @@ acpi_install:
101cpupower_install: 101cpupower_install:
102 $(call descend,power/$(@:_install=),install) 102 $(call descend,power/$(@:_install=),install)
103 103
104cgroup_install firewire_install gpio_install hv_install lguest_install perf_install usb_install virtio_install vm_install net_install objtool_install: 104cgroup_install firewire_install gpio_install hv_install iio_install lguest_install perf_install usb_install virtio_install vm_install net_install objtool_install:
105 $(call descend,$(@:_install=),install) 105 $(call descend,$(@:_install=),install)
106 106
107liblockdep_install: 107liblockdep_install:
@@ -123,7 +123,7 @@ kvm_stat_install:
123 $(call descend,kvm/$(@:_install=),install) 123 $(call descend,kvm/$(@:_install=),install)
124 124
125install: acpi_install cgroup_install cpupower_install gpio_install \ 125install: acpi_install cgroup_install cpupower_install gpio_install \
126 hv_install firewire_install lguest_install liblockdep_install \ 126 hv_install firewire_install iio_install lguest_install liblockdep_install \
127 perf_install selftests_install turbostat_install usb_install \ 127 perf_install selftests_install turbostat_install usb_install \
128 virtio_install vm_install net_install x86_energy_perf_policy_install \ 128 virtio_install vm_install net_install x86_energy_perf_policy_install \
129 tmon_install freefall_install objtool_install kvm_stat_install 129 tmon_install freefall_install objtool_install kvm_stat_install
diff --git a/tools/iio/Build b/tools/iio/Build
new file mode 100644
index 000000000000..f74cbda64710
--- /dev/null
+++ b/tools/iio/Build
@@ -0,0 +1,3 @@
1lsiio-y += lsiio.o iio_utils.o
2iio_event_monitor-y += iio_event_monitor.o iio_utils.o
3iio_generic_buffer-y += iio_generic_buffer.o iio_utils.o
diff --git a/tools/iio/Makefile b/tools/iio/Makefile
index 8f08e03a9a5e..d4d956020adf 100644
--- a/tools/iio/Makefile
+++ b/tools/iio/Makefile
@@ -1,31 +1,67 @@
1include ../scripts/Makefile.include
2
3bindir ?= /usr/bin
4
5ifeq ($(srctree),)
6srctree := $(patsubst %/,%,$(dir $(CURDIR)))
7srctree := $(patsubst %/,%,$(dir $(srctree)))
8endif
9
10# Do not use make's built-in rules
11# (this improves performance and avoids hard-to-debug behaviour);
12MAKEFLAGS += -r
13
1CC = $(CROSS_COMPILE)gcc 14CC = $(CROSS_COMPILE)gcc
2CFLAGS += -Wall -g -D_GNU_SOURCE -D__EXPORTED_HEADERS__ -I../../include/uapi -I../../include 15LD = $(CROSS_COMPILE)ld
16CFLAGS += -O2 -Wall -g -D_GNU_SOURCE -I$(OUTPUT)include
3 17
4BINDIR=usr/bin 18ALL_TARGETS := iio_event_monitor lsiio iio_generic_buffer
5INSTALL_PROGRAM=install -m 755 -p 19ALL_PROGRAMS := $(patsubst %,$(OUTPUT)%,$(ALL_TARGETS))
6DEL_FILE=rm -f
7 20
8all: iio_event_monitor lsiio iio_generic_buffer 21all: $(ALL_PROGRAMS)
9 22
10iio_event_monitor: iio_event_monitor.o iio_utils.o 23export srctree OUTPUT CC LD CFLAGS
24include $(srctree)/tools/build/Makefile.include
11 25
12lsiio: lsiio.o iio_utils.o 26#
27# We need the following to be outside of kernel tree
28#
29$(OUTPUT)include/linux/iio: ../../include/uapi/linux/iio
30 mkdir -p $(OUTPUT)include/linux/iio 2>&1 || true
31 ln -sf $(CURDIR)/../../include/uapi/linux/iio/events.h $@
32 ln -sf $(CURDIR)/../../include/uapi/linux/iio/types.h $@
13 33
14iio_generic_buffer: iio_generic_buffer.o iio_utils.o 34prepare: $(OUTPUT)include/linux/iio
15 35
16%.o: %.c iio_utils.h 36LSIIO_IN := $(OUTPUT)lsiio-in.o
37$(LSIIO_IN): prepare FORCE
38 $(Q)$(MAKE) $(build)=lsiio
39$(OUTPUT)lsiio: $(LSIIO_IN)
40 $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $< -o $@
17 41
18install: 42IIO_EVENT_MONITOR_IN := $(OUTPUT)iio_event_monitor-in.o
19 - mkdir -p $(INSTALL_ROOT)/$(BINDIR) 43$(IIO_EVENT_MONITOR_IN): prepare FORCE
20 - $(INSTALL_PROGRAM) "iio_event_monitor" "$(INSTALL_ROOT)/$(BINDIR)/iio_event_monitor" 44 $(Q)$(MAKE) $(build)=iio_event_monitor
21 - $(INSTALL_PROGRAM) "lsiio" "$(INSTALL_ROOT)/$(BINDIR)/lsiio" 45$(OUTPUT)iio_event_monitor: $(IIO_EVENT_MONITOR_IN)
22 - $(INSTALL_PROGRAM) "iio_generic_buffer" "$(INSTALL_ROOT)/$(BINDIR)/iio_generic_buffer" 46 $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $< -o $@
23 47
24uninstall: 48IIO_GENERIC_BUFFER_IN := $(OUTPUT)iio_generic_buffer-in.o
25 $(DEL_FILE) "$(INSTALL_ROOT)/$(BINDIR)/iio_event_monitor" 49$(IIO_GENERIC_BUFFER_IN): prepare FORCE
26 $(DEL_FILE) "$(INSTALL_ROOT)/$(BINDIR)/lsiio" 50 $(Q)$(MAKE) $(build)=iio_generic_buffer
27 $(DEL_FILE) "$(INSTALL_ROOT)/$(BINDIR)/iio_generic_buffer" 51$(OUTPUT)iio_generic_buffer: $(IIO_GENERIC_BUFFER_IN)
52 $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $< -o $@
28 53
29.PHONY: clean
30clean: 54clean:
31 rm -f *.o iio_event_monitor lsiio iio_generic_buffer 55 rm -f $(ALL_PROGRAMS)
56 rm -rf $(OUTPUT)include/linux/iio
57 find $(if $(OUTPUT),$(OUTPUT),.) -name '*.o' -delete -o -name '\.*.d' -delete
58
59install: $(ALL_PROGRAMS)
60 install -d -m 755 $(DESTDIR)$(bindir); \
61 for program in $(ALL_PROGRAMS); do \
62 install $$program $(DESTDIR)$(bindir); \
63 done
64
65FORCE:
66
67.PHONY: all install clean FORCE prepare