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authorLinus Torvalds <torvalds@linux-foundation.org>2017-09-03 12:50:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2017-09-03 12:50:26 -0400
commit5e3b19d8165c2af2afee313c9b40eee55cf27a55 (patch)
tree2e0f109adc9297e0a9e84ebdffa82e401f3ee996
parentd0fa6ea10e438cfd4471ac196655fbb2c2b1329a (diff)
parent2c0e8382386f618c85d20cb05e7cf7df8cdd382c (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "The two indirect syscall fixes have sat in linux-next for a few days. I did check back with a hardware designer to ensure a SYNC is really what's required for the GIC fix and so the GIC fix didn't make it into to linux-next in time for this final pull request. It builds in local build tests and passes Imagination's test system" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: irqchip: mips-gic: SYNC after enabling GIC region MIPS: Remove pt_regs adjustments in indirect syscall handler MIPS: seccomp: Fix indirect syscall args
-rw-r--r--arch/mips/kernel/ptrace.c10
-rw-r--r--arch/mips/kernel/scall32-o32.S11
-rw-r--r--arch/mips/kernel/scall64-o32.S6
-rw-r--r--drivers/irqchip/irq-mips-gic.c5
4 files changed, 8 insertions, 24 deletions
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 6dd13641a418..1395654cfc8d 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -872,15 +872,13 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
872 if (unlikely(test_thread_flag(TIF_SECCOMP))) { 872 if (unlikely(test_thread_flag(TIF_SECCOMP))) {
873 int ret, i; 873 int ret, i;
874 struct seccomp_data sd; 874 struct seccomp_data sd;
875 unsigned long args[6];
875 876
876 sd.nr = syscall; 877 sd.nr = syscall;
877 sd.arch = syscall_get_arch(); 878 sd.arch = syscall_get_arch();
878 for (i = 0; i < 6; i++) { 879 syscall_get_arguments(current, regs, 0, 6, args);
879 unsigned long v, r; 880 for (i = 0; i < 6; i++)
880 881 sd.args[i] = args[i];
881 r = mips_get_syscall_arg(&v, current, regs, i);
882 sd.args[i] = r ? 0 : v;
883 }
884 sd.instruction_pointer = KSTK_EIP(current); 882 sd.instruction_pointer = KSTK_EIP(current);
885 883
886 ret = __secure_computing(&sd); 884 ret = __secure_computing(&sd);
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 27c2f90eeb21..a9a7d78803cd 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -190,12 +190,6 @@ illegal_syscall:
190 sll t1, t0, 2 190 sll t1, t0, 2
191 beqz v0, einval 191 beqz v0, einval
192 lw t2, sys_call_table(t1) # syscall routine 192 lw t2, sys_call_table(t1) # syscall routine
193 sw a0, PT_R2(sp) # call routine directly on restart
194
195 /* Some syscalls like execve get their arguments from struct pt_regs
196 and claim zero arguments in the syscall table. Thus we have to
197 assume the worst case and shuffle around all potential arguments.
198 If you want performance, don't use indirect syscalls. */
199 193
200 move a0, a1 # shift argument registers 194 move a0, a1 # shift argument registers
201 move a1, a2 195 move a1, a2
@@ -207,11 +201,6 @@ illegal_syscall:
207 sw t4, 16(sp) 201 sw t4, 16(sp)
208 sw t5, 20(sp) 202 sw t5, 20(sp)
209 sw t6, 24(sp) 203 sw t6, 24(sp)
210 sw a0, PT_R4(sp) # .. and push back a0 - a3, some
211 sw a1, PT_R5(sp) # syscalls expect them there
212 sw a2, PT_R6(sp)
213 sw a3, PT_R7(sp)
214 sw a3, PT_R26(sp) # update a3 for syscall restarting
215 jr t2 204 jr t2
216 /* Unreached */ 205 /* Unreached */
217 206
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index c30bc520885f..9ebe3e2403b1 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -198,7 +198,6 @@ LEAF(sys32_syscall)
198 dsll t1, t0, 3 198 dsll t1, t0, 3
199 beqz v0, einval 199 beqz v0, einval
200 ld t2, sys32_call_table(t1) # syscall routine 200 ld t2, sys32_call_table(t1) # syscall routine
201 sd a0, PT_R2(sp) # call routine directly on restart
202 201
203 move a0, a1 # shift argument registers 202 move a0, a1 # shift argument registers
204 move a1, a2 203 move a1, a2
@@ -207,11 +206,6 @@ LEAF(sys32_syscall)
207 move a4, a5 206 move a4, a5
208 move a5, a6 207 move a5, a6
209 move a6, a7 208 move a6, a7
210 sd a0, PT_R4(sp) # ... and push back a0 - a3, some
211 sd a1, PT_R5(sp) # syscalls expect them there
212 sd a2, PT_R6(sp)
213 sd a3, PT_R7(sp)
214 sd a3, PT_R26(sp) # update a3 for syscall restarting
215 jr t2 209 jr t2
216 /* Unreached */ 210 /* Unreached */
217 211
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 6ab1d3afec02..48ee1bad473f 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -1020,8 +1020,11 @@ static int __init gic_of_init(struct device_node *node,
1020 gic_len = resource_size(&res); 1020 gic_len = resource_size(&res);
1021 } 1021 }
1022 1022
1023 if (mips_cm_present()) 1023 if (mips_cm_present()) {
1024 write_gcr_gic_base(gic_base | CM_GCR_GIC_BASE_GICEN_MSK); 1024 write_gcr_gic_base(gic_base | CM_GCR_GIC_BASE_GICEN_MSK);
1025 /* Ensure GIC region is enabled before trying to access it */
1026 __sync();
1027 }
1025 gic_present = true; 1028 gic_present = true;
1026 1029
1027 __gic_init(gic_base, gic_len, cpu_vec, 0, node); 1030 __gic_init(gic_base, gic_len, cpu_vec, 0, node);