diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2016-07-05 06:24:28 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-07-07 15:06:23 -0400 |
commit | 5e037834eb6218e4fa845347dbd9ef1b49c2550e (patch) | |
tree | fd30e4ec59f3239b34ca0361f7d6fcd23f69b010 | |
parent | 9a88d22bb090f39e234bec9e4d416c8acdcdbb93 (diff) |
drm/amd/powerplay: add definitions related to di/dt feature for fiji and polaris.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.h | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.h | 13 |
2 files changed, 26 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.h b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.h index 66849996566c..fec772421733 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_powertune.h | |||
@@ -36,6 +36,19 @@ enum fiji_pt_config_reg_type { | |||
36 | #define POWERCONTAINMENT_FEATURE_TDCLimit 0x00000002 | 36 | #define POWERCONTAINMENT_FEATURE_TDCLimit 0x00000002 |
37 | #define POWERCONTAINMENT_FEATURE_PkgPwrLimit 0x00000004 | 37 | #define POWERCONTAINMENT_FEATURE_PkgPwrLimit 0x00000004 |
38 | 38 | ||
39 | #define DIDT_SQ_CTRL0__UNUSED_0_MASK 0xffffffc0 | ||
40 | #define DIDT_SQ_CTRL0__UNUSED_0__SHIFT 0x6 | ||
41 | #define DIDT_TD_CTRL0__UNUSED_0_MASK 0xffffffc0 | ||
42 | #define DIDT_TD_CTRL0__UNUSED_0__SHIFT 0x6 | ||
43 | #define DIDT_TCP_CTRL0__UNUSED_0_MASK 0xffffffc0 | ||
44 | #define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x6 | ||
45 | #define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK 0xe0000000 | ||
46 | #define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001d | ||
47 | #define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK 0xe0000000 | ||
48 | #define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001d | ||
49 | #define DIDT_TCP_TUNING_CTRL__UNUSED_0_MASK 0xe0000000 | ||
50 | #define DIDT_TCP_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001d | ||
51 | |||
39 | struct fiji_pt_config_reg { | 52 | struct fiji_pt_config_reg { |
40 | uint32_t offset; | 53 | uint32_t offset; |
41 | uint32_t mask; | 54 | uint32_t mask; |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.h b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.h index 43626e9a8aa3..d492d6d28867 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.h | |||
@@ -31,6 +31,19 @@ enum polaris10_pt_config_reg_type { | |||
31 | POLARIS10_CONFIGREG_MAX | 31 | POLARIS10_CONFIGREG_MAX |
32 | }; | 32 | }; |
33 | 33 | ||
34 | #define DIDT_SQ_CTRL0__UNUSED_0_MASK 0xfffc0000 | ||
35 | #define DIDT_SQ_CTRL0__UNUSED_0__SHIFT 0x12 | ||
36 | #define DIDT_TD_CTRL0__UNUSED_0_MASK 0xfffc0000 | ||
37 | #define DIDT_TD_CTRL0__UNUSED_0__SHIFT 0x12 | ||
38 | #define DIDT_TCP_CTRL0__UNUSED_0_MASK 0xfffc0000 | ||
39 | #define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x12 | ||
40 | #define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 | ||
41 | #define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e | ||
42 | #define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 | ||
43 | #define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e | ||
44 | #define DIDT_TCP_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 | ||
45 | #define DIDT_TCP_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e | ||
46 | |||
34 | /* PowerContainment Features */ | 47 | /* PowerContainment Features */ |
35 | #define POWERCONTAINMENT_FEATURE_DTE 0x00000001 | 48 | #define POWERCONTAINMENT_FEATURE_DTE 0x00000001 |
36 | #define POWERCONTAINMENT_FEATURE_TDCLimit 0x00000002 | 49 | #define POWERCONTAINMENT_FEATURE_TDCLimit 0x00000002 |