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authorXing Zheng <zhengxing@rock-chips.com>2016-06-21 23:16:52 -0400
committerHeiko Stuebner <heiko@sntech.de>2016-06-27 15:28:25 -0400
commit5d3d7c72b920f9aa44f9b64cdd8a1c5bf5cbea07 (patch)
tree8bfaa0717bb8c50e058fc349db9be481b73e7e94
parentccada2489206b5f1870ac132408bf41ffe51995a (diff)
ARM: dts: rockchip: add GMAC nodes for RK322x SoCs
This patch add the GMAC dt nodes for rk322x SoCs. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm/boot/dts/rk322x.dtsi61
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 26f3becc83c4..9e6bf0e311bb 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -415,6 +415,25 @@
415 status = "disabled"; 415 status = "disabled";
416 }; 416 };
417 417
418 gmac: ethernet@30200000 {
419 compatible = "rockchip,rk3228-gmac";
420 reg = <0x30200000 0x10000>;
421 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
422 interrupt-names = "macirq";
423 clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX>,
424 <&cru SCLK_MAC_TX>, <&cru SCLK_MAC_REF>,
425 <&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>,
426 <&cru PCLK_GMAC>;
427 clock-names = "stmmaceth", "mac_clk_rx",
428 "mac_clk_tx", "clk_mac_ref",
429 "clk_mac_refout", "aclk_mac",
430 "pclk_mac";
431 resets = <&cru SRST_GMAC>;
432 reset-names = "stmmaceth";
433 rockchip,grf = <&grf>;
434 status = "disabled";
435 };
436
418 gic: interrupt-controller@32010000 { 437 gic: interrupt-controller@32010000 {
419 compatible = "arm,gic-400"; 438 compatible = "arm,gic-400";
420 interrupt-controller; 439 interrupt-controller;
@@ -499,6 +518,10 @@
499 bias-disable; 518 bias-disable;
500 }; 519 };
501 520
521 pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {
522 drive-strength = <12>;
523 };
524
502 emmc { 525 emmc {
503 emmc_clk: emmc-clk { 526 emmc_clk: emmc-clk {
504 rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>; 527 rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
@@ -520,6 +543,44 @@
520 }; 543 };
521 }; 544 };
522 545
546 gmac {
547 rgmii_pins: rgmii-pins {
548 rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
549 <2 12 RK_FUNC_1 &pcfg_pull_none>,
550 <2 25 RK_FUNC_1 &pcfg_pull_none>,
551 <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
552 <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
553 <2 22 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
554 <2 23 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
555 <2 9 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
556 <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
557 <2 17 RK_FUNC_1 &pcfg_pull_none>,
558 <2 16 RK_FUNC_1 &pcfg_pull_none>,
559 <2 21 RK_FUNC_2 &pcfg_pull_none>,
560 <2 20 RK_FUNC_2 &pcfg_pull_none>,
561 <2 11 RK_FUNC_1 &pcfg_pull_none>,
562 <2 8 RK_FUNC_1 &pcfg_pull_none>;
563 };
564
565 rmii_pins: rmii-pins {
566 rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
567 <2 12 RK_FUNC_1 &pcfg_pull_none>,
568 <2 25 RK_FUNC_1 &pcfg_pull_none>,
569 <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
570 <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
571 <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
572 <2 17 RK_FUNC_1 &pcfg_pull_none>,
573 <2 16 RK_FUNC_1 &pcfg_pull_none>,
574 <2 8 RK_FUNC_1 &pcfg_pull_none>,
575 <2 15 RK_FUNC_1 &pcfg_pull_none>;
576 };
577
578 phy_pins: phy-pins {
579 rockchip,pins = <2 14 RK_FUNC_2 &pcfg_pull_none>,
580 <2 8 RK_FUNC_2 &pcfg_pull_none>;
581 };
582 };
583
523 i2c0 { 584 i2c0 {
524 i2c0_xfer: i2c0-xfer { 585 i2c0_xfer: i2c0-xfer {
525 rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>, 586 rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,