diff options
author | Oscar Mateo <oscar.mateo@intel.com> | 2018-05-08 17:29:34 -0400 |
---|---|---|
committer | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2018-05-11 08:57:53 -0400 |
commit | 5ba700c73a89b0bace1a89a08e7a7eca5f011152 (patch) | |
tree | 5dab27d79aecbed9a91ba147ffbeecc9b0922e54 | |
parent | 5215eef35fcbbc8f9bd68adff90eb813e8c3b7cf (diff) |
drm/i915/icl: Wa_1406838659
Disable CGPSF unit clock gating to prevent an issue.
v2: Rebased on top of the WA refactoring
v3: Added References (Mika)
v4:
- Rebased
- C, not lisp (Chris)
- Remove unintentional whitespaces (Mika)
- Fixed in C0 (Mika)
References: HSDES#1406838659
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-13-git-send-email-oscar.mateo@intel.com
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_workarounds.c | 6 |
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7cb2ddc42e1b..ce484271e30a 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -3848,6 +3848,9 @@ enum { | |||
3848 | #define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434) | 3848 | #define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434) |
3849 | #define VFUNIT_CLKGATE_DIS (1 << 20) | 3849 | #define VFUNIT_CLKGATE_DIS (1 << 20) |
3850 | 3850 | ||
3851 | #define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560) | ||
3852 | #define CGPSF_CLKGATE_DIS (1 << 3) | ||
3853 | |||
3851 | /* | 3854 | /* |
3852 | * Display engine regs | 3855 | * Display engine regs |
3853 | */ | 3856 | */ |
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 2a4e3ee5af10..942d32256c53 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c | |||
@@ -755,6 +755,12 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) | |||
755 | I915_WRITE(GEN10_L3_CHICKEN_MODE_REGISTER, | 755 | I915_WRITE(GEN10_L3_CHICKEN_MODE_REGISTER, |
756 | I915_READ(GEN10_L3_CHICKEN_MODE_REGISTER) | | 756 | I915_READ(GEN10_L3_CHICKEN_MODE_REGISTER) | |
757 | GEN11_I2M_WRITE_DISABLE); | 757 | GEN11_I2M_WRITE_DISABLE); |
758 | |||
759 | /* Wa_1406838659:icl (pre-prod) */ | ||
760 | if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0)) | ||
761 | I915_WRITE(INF_UNIT_LEVEL_CLKGATE, | ||
762 | I915_READ(INF_UNIT_LEVEL_CLKGATE) | | ||
763 | CGPSF_CLKGATE_DIS); | ||
758 | } | 764 | } |
759 | 765 | ||
760 | void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv) | 766 | void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv) |