diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-08-30 08:54:04 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-10-02 17:38:16 -0400 |
| commit | 5b162cc4ac27ba76e576abc9090c54cf90a17980 (patch) | |
| tree | 074b28ac9e47d49fa14583e05ad91ffa96d6678b | |
| parent | 10653022456dc77b398777fd8e95126c77954b49 (diff) | |
Revert "serial: sh-sci: Allow for compressed SCIF address"
This reverts commit 2d4dd0da45401c7ae7332b4d1eb7bbb1348edde9.
This broke earlycon on all Renesas ARM platforms using a SCIF port for the
serial console (R-Car, RZ/A1, RZ/G1, RZ/G2 SoCs), due to an incorrect value
of port->regshift.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/tty/serial/sh-sci.c | 25 |
1 files changed, 10 insertions, 15 deletions
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 5d42c9a63001..ab3f6e91853d 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c | |||
| @@ -346,15 +346,15 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = { | |||
| 346 | [SCIx_SH4_SCIF_REGTYPE] = { | 346 | [SCIx_SH4_SCIF_REGTYPE] = { |
| 347 | .regs = { | 347 | .regs = { |
| 348 | [SCSMR] = { 0x00, 16 }, | 348 | [SCSMR] = { 0x00, 16 }, |
| 349 | [SCBRR] = { 0x02, 8 }, | 349 | [SCBRR] = { 0x04, 8 }, |
| 350 | [SCSCR] = { 0x04, 16 }, | 350 | [SCSCR] = { 0x08, 16 }, |
| 351 | [SCxTDR] = { 0x06, 8 }, | 351 | [SCxTDR] = { 0x0c, 8 }, |
| 352 | [SCxSR] = { 0x08, 16 }, | 352 | [SCxSR] = { 0x10, 16 }, |
| 353 | [SCxRDR] = { 0x0a, 8 }, | 353 | [SCxRDR] = { 0x14, 8 }, |
| 354 | [SCFCR] = { 0x0c, 16 }, | 354 | [SCFCR] = { 0x18, 16 }, |
| 355 | [SCFDR] = { 0x0e, 16 }, | 355 | [SCFDR] = { 0x1c, 16 }, |
| 356 | [SCSPTR] = { 0x10, 16 }, | 356 | [SCSPTR] = { 0x20, 16 }, |
| 357 | [SCLSR] = { 0x12, 16 }, | 357 | [SCLSR] = { 0x24, 16 }, |
| 358 | }, | 358 | }, |
| 359 | .fifosize = 16, | 359 | .fifosize = 16, |
| 360 | .overrun_reg = SCLSR, | 360 | .overrun_reg = SCLSR, |
| @@ -2837,7 +2837,7 @@ static int sci_init_single(struct platform_device *dev, | |||
| 2837 | { | 2837 | { |
| 2838 | struct uart_port *port = &sci_port->port; | 2838 | struct uart_port *port = &sci_port->port; |
| 2839 | const struct resource *res; | 2839 | const struct resource *res; |
| 2840 | unsigned int i, regtype; | 2840 | unsigned int i; |
| 2841 | int ret; | 2841 | int ret; |
| 2842 | 2842 | ||
| 2843 | sci_port->cfg = p; | 2843 | sci_port->cfg = p; |
| @@ -2874,7 +2874,6 @@ static int sci_init_single(struct platform_device *dev, | |||
| 2874 | if (unlikely(sci_port->params == NULL)) | 2874 | if (unlikely(sci_port->params == NULL)) |
| 2875 | return -EINVAL; | 2875 | return -EINVAL; |
| 2876 | 2876 | ||
| 2877 | regtype = sci_port->params - sci_port_params; | ||
| 2878 | switch (p->type) { | 2877 | switch (p->type) { |
| 2879 | case PORT_SCIFB: | 2878 | case PORT_SCIFB: |
| 2880 | sci_port->rx_trigger = 48; | 2879 | sci_port->rx_trigger = 48; |
| @@ -2929,10 +2928,6 @@ static int sci_init_single(struct platform_device *dev, | |||
| 2929 | port->regshift = 1; | 2928 | port->regshift = 1; |
| 2930 | } | 2929 | } |
| 2931 | 2930 | ||
| 2932 | if (regtype == SCIx_SH4_SCIF_REGTYPE) | ||
| 2933 | if (sci_port->reg_size >= 0x20) | ||
| 2934 | port->regshift = 1; | ||
| 2935 | |||
| 2936 | /* | 2931 | /* |
| 2937 | * The UART port needs an IRQ value, so we peg this to the RX IRQ | 2932 | * The UART port needs an IRQ value, so we peg this to the RX IRQ |
| 2938 | * for the multi-IRQ ports, which is where we are primarily | 2933 | * for the multi-IRQ ports, which is where we are primarily |
