diff options
author | Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2013-06-13 10:41:28 -0400 |
---|---|---|
committer | Chris Ball <cjb@laptop.org> | 2013-07-05 12:46:28 -0400 |
commit | 599115686d8f62999a871f7d7ee87de3b939b258 (patch) | |
tree | 2017d330b0aa6f454b53a44b466266ae5c5b57a2 | |
parent | c73e41c898bb59aaf50098c2c672c7132a88fdbc (diff) |
mmc: sdhci: fix ctrl_2 on super-speed selection
This patch fixes the HC ctrl_2 programming where, in case of
SDR104 and HS200, we have to write 100b in the the UHS Mode
bits. We wrote 101b that is reserved from Arasan Specs.
Reported-by: Youssef Triki <youssef.triki@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
-rw-r--r-- | drivers/mmc/host/sdhci.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 9bd6ab203843..3ad3973bdb33 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
@@ -1543,16 +1543,15 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) | |||
1543 | ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); | 1543 | ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
1544 | /* Select Bus Speed Mode for host */ | 1544 | /* Select Bus Speed Mode for host */ |
1545 | ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; | 1545 | ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; |
1546 | if (ios->timing == MMC_TIMING_MMC_HS200) | 1546 | if ((ios->timing == MMC_TIMING_MMC_HS200) || |
1547 | ctrl_2 |= SDHCI_CTRL_HS_SDR200; | 1547 | (ios->timing == MMC_TIMING_UHS_SDR104)) |
1548 | ctrl_2 |= SDHCI_CTRL_UHS_SDR104; | ||
1548 | else if (ios->timing == MMC_TIMING_UHS_SDR12) | 1549 | else if (ios->timing == MMC_TIMING_UHS_SDR12) |
1549 | ctrl_2 |= SDHCI_CTRL_UHS_SDR12; | 1550 | ctrl_2 |= SDHCI_CTRL_UHS_SDR12; |
1550 | else if (ios->timing == MMC_TIMING_UHS_SDR25) | 1551 | else if (ios->timing == MMC_TIMING_UHS_SDR25) |
1551 | ctrl_2 |= SDHCI_CTRL_UHS_SDR25; | 1552 | ctrl_2 |= SDHCI_CTRL_UHS_SDR25; |
1552 | else if (ios->timing == MMC_TIMING_UHS_SDR50) | 1553 | else if (ios->timing == MMC_TIMING_UHS_SDR50) |
1553 | ctrl_2 |= SDHCI_CTRL_UHS_SDR50; | 1554 | ctrl_2 |= SDHCI_CTRL_UHS_SDR50; |
1554 | else if (ios->timing == MMC_TIMING_UHS_SDR104) | ||
1555 | ctrl_2 |= SDHCI_CTRL_UHS_SDR104; | ||
1556 | else if (ios->timing == MMC_TIMING_UHS_DDR50) | 1555 | else if (ios->timing == MMC_TIMING_UHS_DDR50) |
1557 | ctrl_2 |= SDHCI_CTRL_UHS_DDR50; | 1556 | ctrl_2 |= SDHCI_CTRL_UHS_DDR50; |
1558 | sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); | 1557 | sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); |