Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "Just two small fixes: one radeon, one amdkfd"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/amdkfd: fix topology bug with capability attr.
  drm/radeon: use proper ACR regisiter for DCE3.2

2 files changed, 3 insertions, 3 deletions

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index e469c4b2e8cc..c25728bc388a 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -684,8 +684,6 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
                         dev->node_props.cpu_core_id_base);
         sysfs_show_32bit_prop(buffer, "simd_id_base",
                         dev->node_props.simd_id_base);
-        sysfs_show_32bit_prop(buffer, "capability",
-                        dev->node_props.capability);
         sysfs_show_32bit_prop(buffer, "max_waves_per_simd",
                         dev->node_props.max_waves_per_simd);
         sysfs_show_32bit_prop(buffer, "lds_size_in_kb",
@@ -736,6 +734,8 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
                         dev->gpu->kfd2kgd->get_fw_version(
                                                 dev->gpu->kgd,
                                                 KGD_ENGINE_MEC1));
+                sysfs_show_32bit_prop(buffer, "capability",
+                                dev->node_props.capability);
         }
 
         return sysfs_show_32bit_prop(buffer, "max_engine_clk_ccompute",
diff --git a/drivers/gpu/drm/radeon/dce3_1_afmt.c b/drivers/gpu/drm/radeon/dce3_1_afmt.c
index f04205170b8a..cfa3a84a2af0 100644
--- a/drivers/gpu/drm/radeon/dce3_1_afmt.c
+++ b/drivers/gpu/drm/radeon/dce3_1_afmt.c
@@ -173,7 +173,7 @@ void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
         struct drm_device *dev = encoder->dev;
         struct radeon_device *rdev = dev->dev_private;
 
-        WREG32(HDMI0_ACR_PACKET_CONTROL + offset,
+        WREG32(DCE3_HDMI0_ACR_PACKET_CONTROL + offset,
                 HDMI0_ACR_SOURCE |              /* select SW CTS value */
                 HDMI0_ACR_AUTO_SEND);   /* allow hw to sent ACR packets when required */