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authorHans de Goede <hdegoede@redhat.com>2017-07-08 09:40:08 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-07-24 16:43:17 -0400
commit58eefe2f3f53f294cdb5a2b6121973b5ae508f01 (patch)
tree6cf04e64bddbb11db572a0f68f8d112188466f0b
parent520eccdfe187591a51ea9ab4c1a024ae4d0f68d9 (diff)
ACPI / PMIC: xpower: Do pinswitch magic when reading GPADC
Testing has shown that the TS-pin's bias-current needs to be disabled when reading the GPIO0 pin in GPADC mode. It seems that there is only 1 bias current source and to be able to use it for the GPIO0 pin in GPADC mode it must be temporarily turned off for the TS pin, but the datasheet does not mention this. This commit adds the necessary writes to turn the TS pin BIAS current off before and back on after reading the GPADC. This fixes the GPADC always returning a reading of 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r--drivers/acpi/pmic/intel_pmic_xpower.c21
1 files changed, 18 insertions, 3 deletions
diff --git a/drivers/acpi/pmic/intel_pmic_xpower.c b/drivers/acpi/pmic/intel_pmic_xpower.c
index 3b7d5be5b7ed..6c99d3f81095 100644
--- a/drivers/acpi/pmic/intel_pmic_xpower.c
+++ b/drivers/acpi/pmic/intel_pmic_xpower.c
@@ -27,6 +27,9 @@
27#define GPI1_LDO_ON (3 << 0) 27#define GPI1_LDO_ON (3 << 0)
28#define GPI1_LDO_OFF (4 << 0) 28#define GPI1_LDO_OFF (4 << 0)
29 29
30#define AXP288_ADC_TS_PIN_GPADC 0xf2
31#define AXP288_ADC_TS_PIN_ON 0xf3
32
30static struct pmic_table power_table[] = { 33static struct pmic_table power_table[] = {
31 { 34 {
32 .address = 0x00, 35 .address = 0x00,
@@ -209,11 +212,23 @@ static int intel_xpower_pmic_update_power(struct regmap *regmap, int reg,
209static int intel_xpower_pmic_get_raw_temp(struct regmap *regmap, int reg) 212static int intel_xpower_pmic_get_raw_temp(struct regmap *regmap, int reg)
210{ 213{
211 u8 buf[2]; 214 u8 buf[2];
215 int ret;
212 216
213 if (regmap_bulk_read(regmap, AXP288_GP_ADC_H, buf, 2)) 217 ret = regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL,
214 return -EIO; 218 AXP288_ADC_TS_PIN_GPADC);
219 if (ret)
220 return ret;
221
222 /* After switching to the GPADC pin give things some time to settle */
223 usleep_range(6000, 10000);
224
225 ret = regmap_bulk_read(regmap, AXP288_GP_ADC_H, buf, 2);
226 if (ret == 0)
227 ret = (buf[0] << 4) + ((buf[1] >> 4) & 0x0f);
228
229 regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, AXP288_ADC_TS_PIN_ON);
215 230
216 return (buf[0] << 4) + ((buf[1] >> 4) & 0x0F); 231 return ret;
217} 232}
218 233
219static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = { 234static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = {