diff options
author | Christian König <christian.koenig@amd.com> | 2018-07-18 14:28:08 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-19 14:56:44 -0400 |
commit | 58c24b7c893cb1739918c875ae3cf4bb5f86ebb7 (patch) | |
tree | 59526e4b7f19b7c6cbf7ea21bf6bca134e203dcb | |
parent | 4841203102a337b4b627e6dd3a1dc8c88aec982b (diff) |
drm/amdgpu: remove superflous UVD encode entity
Not sure what that was every used for, but now it is completely unused.
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 14 |
3 files changed, 0 insertions, 27 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h index 8b23a1b00c76..cae3f526216b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | |||
@@ -48,7 +48,6 @@ struct amdgpu_uvd_inst { | |||
48 | struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; | 48 | struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS]; |
49 | struct amdgpu_irq_src irq; | 49 | struct amdgpu_irq_src irq; |
50 | struct drm_sched_entity entity; | 50 | struct drm_sched_entity entity; |
51 | struct drm_sched_entity entity_enc; | ||
52 | uint32_t srbm_soft_reset; | 51 | uint32_t srbm_soft_reset; |
53 | }; | 52 | }; |
54 | 53 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c index b796dc8375cd..598dbeaba636 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | |||
@@ -418,16 +418,6 @@ static int uvd_v6_0_sw_init(void *handle) | |||
418 | adev->uvd.num_enc_rings = 0; | 418 | adev->uvd.num_enc_rings = 0; |
419 | 419 | ||
420 | DRM_INFO("UVD ENC is disabled\n"); | 420 | DRM_INFO("UVD ENC is disabled\n"); |
421 | } else { | ||
422 | struct drm_sched_rq *rq; | ||
423 | ring = &adev->uvd.inst->ring_enc[0]; | ||
424 | rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL]; | ||
425 | r = drm_sched_entity_init(&adev->uvd.inst->entity_enc, | ||
426 | &rq, 1, NULL); | ||
427 | if (r) { | ||
428 | DRM_ERROR("Failed setting up UVD ENC run queue.\n"); | ||
429 | return r; | ||
430 | } | ||
431 | } | 421 | } |
432 | 422 | ||
433 | r = amdgpu_uvd_resume(adev); | 423 | r = amdgpu_uvd_resume(adev); |
@@ -463,8 +453,6 @@ static int uvd_v6_0_sw_fini(void *handle) | |||
463 | return r; | 453 | return r; |
464 | 454 | ||
465 | if (uvd_v6_0_enc_support(adev)) { | 455 | if (uvd_v6_0_enc_support(adev)) { |
466 | drm_sched_entity_destroy(&adev->uvd.inst->ring_enc[0].sched, &adev->uvd.inst->entity_enc); | ||
467 | |||
468 | for (i = 0; i < adev->uvd.num_enc_rings; ++i) | 456 | for (i = 0; i < adev->uvd.num_enc_rings; ++i) |
469 | amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); | 457 | amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]); |
470 | } | 458 | } |
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c index 831bb995b0ed..db5f3d78ab12 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | |||
@@ -389,7 +389,6 @@ static int uvd_v7_0_early_init(void *handle) | |||
389 | static int uvd_v7_0_sw_init(void *handle) | 389 | static int uvd_v7_0_sw_init(void *handle) |
390 | { | 390 | { |
391 | struct amdgpu_ring *ring; | 391 | struct amdgpu_ring *ring; |
392 | struct drm_sched_rq *rq; | ||
393 | int i, j, r; | 392 | int i, j, r; |
394 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 393 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
395 | 394 | ||
@@ -421,17 +420,6 @@ static int uvd_v7_0_sw_init(void *handle) | |||
421 | DRM_INFO("PSP loading UVD firmware\n"); | 420 | DRM_INFO("PSP loading UVD firmware\n"); |
422 | } | 421 | } |
423 | 422 | ||
424 | for (j = 0; j < adev->uvd.num_uvd_inst; j++) { | ||
425 | ring = &adev->uvd.inst[j].ring_enc[0]; | ||
426 | rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL]; | ||
427 | r = drm_sched_entity_init(&adev->uvd.inst[j].entity_enc, | ||
428 | &rq, 1, NULL); | ||
429 | if (r) { | ||
430 | DRM_ERROR("(%d)Failed setting up UVD ENC run queue.\n", j); | ||
431 | return r; | ||
432 | } | ||
433 | } | ||
434 | |||
435 | r = amdgpu_uvd_resume(adev); | 423 | r = amdgpu_uvd_resume(adev); |
436 | if (r) | 424 | if (r) |
437 | return r; | 425 | return r; |
@@ -484,8 +472,6 @@ static int uvd_v7_0_sw_fini(void *handle) | |||
484 | return r; | 472 | return r; |
485 | 473 | ||
486 | for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { | 474 | for (j = 0; j < adev->uvd.num_uvd_inst; ++j) { |
487 | drm_sched_entity_destroy(&adev->uvd.inst[j].ring_enc[0].sched, &adev->uvd.inst[j].entity_enc); | ||
488 | |||
489 | for (i = 0; i < adev->uvd.num_enc_rings; ++i) | 475 | for (i = 0; i < adev->uvd.num_enc_rings; ++i) |
490 | amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); | 476 | amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]); |
491 | } | 477 | } |