diff options
| author | Thierry Reding <treding@nvidia.com> | 2019-01-25 05:22:52 -0500 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-01-25 10:18:23 -0500 |
| commit | 589997a157df82fa04fec63ef4d01e73545fd415 (patch) | |
| tree | 9010d62fb857a1ef387f00ca0759e3f4532ca810 | |
| parent | d32dde2c5a110f2d69add70d7a9f1c20d82d0ef1 (diff) | |
soc/tegra: pmc: Pass struct tegra_pmc * where possible
Instead of using the global pmc variable, pass around a pointer where
possible. Also, replace most occurrences of pr_*() functions by their
equivalent dev_*() functions, reusing the pmc->dev pointer.
It's not possible to get completely rid of the global variable because
some of the public API that this driver exposes still relies on it.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
| -rw-r--r-- | drivers/soc/tegra/pmc.c | 267 |
1 files changed, 152 insertions, 115 deletions
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 986f2171ff38..27b0a0310abc 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c | |||
| @@ -344,30 +344,36 @@ to_powergate(struct generic_pm_domain *domain) | |||
| 344 | return container_of(domain, struct tegra_powergate, genpd); | 344 | return container_of(domain, struct tegra_powergate, genpd); |
| 345 | } | 345 | } |
| 346 | 346 | ||
| 347 | static u32 tegra_pmc_readl(unsigned long offset) | 347 | static u32 tegra_pmc_readl(struct tegra_pmc *pmc, unsigned long offset) |
| 348 | { | 348 | { |
| 349 | return readl(pmc->base + offset); | 349 | return readl(pmc->base + offset); |
| 350 | } | 350 | } |
| 351 | 351 | ||
| 352 | static void tegra_pmc_writel(u32 value, unsigned long offset) | 352 | static void tegra_pmc_writel(struct tegra_pmc *pmc, u32 value, |
| 353 | unsigned long offset) | ||
| 353 | { | 354 | { |
| 354 | writel(value, pmc->base + offset); | 355 | writel(value, pmc->base + offset); |
| 355 | } | 356 | } |
| 356 | 357 | ||
| 358 | /* | ||
| 359 | * TODO Figure out a way to call this with the struct tegra_pmc * passed in. | ||
| 360 | * This currently doesn't work because readx_poll_timeout() can only operate | ||
| 361 | * on functions that take a single argument. | ||
| 362 | */ | ||
| 357 | static inline bool tegra_powergate_state(int id) | 363 | static inline bool tegra_powergate_state(int id) |
| 358 | { | 364 | { |
| 359 | if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) | 365 | if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps) |
| 360 | return (tegra_pmc_readl(GPU_RG_CNTRL) & 0x1) == 0; | 366 | return (tegra_pmc_readl(pmc, GPU_RG_CNTRL) & 0x1) == 0; |
| 361 | else | 367 | else |
| 362 | return (tegra_pmc_readl(PWRGATE_STATUS) & BIT(id)) != 0; | 368 | return (tegra_pmc_readl(pmc, PWRGATE_STATUS) & BIT(id)) != 0; |
| 363 | } | 369 | } |
| 364 | 370 | ||
| 365 | static inline bool tegra_powergate_is_valid(int id) | 371 | static inline bool tegra_powergate_is_valid(struct tegra_pmc *pmc, int id) |
| 366 | { | 372 | { |
| 367 | return (pmc->soc && pmc->soc->powergates[id]); | 373 | return (pmc->soc && pmc->soc->powergates[id]); |
| 368 | } | 374 | } |
| 369 | 375 | ||
| 370 | static inline bool tegra_powergate_is_available(int id) | 376 | static inline bool tegra_powergate_is_available(struct tegra_pmc *pmc, int id) |
| 371 | { | 377 | { |
| 372 | return test_bit(id, pmc->powergates_available); | 378 | return test_bit(id, pmc->powergates_available); |
| 373 | } | 379 | } |
| @@ -380,7 +386,7 @@ static int tegra_powergate_lookup(struct tegra_pmc *pmc, const char *name) | |||
| 380 | return -EINVAL; | 386 | return -EINVAL; |
| 381 | 387 | ||
| 382 | for (i = 0; i < pmc->soc->num_powergates; i++) { | 388 | for (i = 0; i < pmc->soc->num_powergates; i++) { |
| 383 | if (!tegra_powergate_is_valid(i)) | 389 | if (!tegra_powergate_is_valid(pmc, i)) |
| 384 | continue; | 390 | continue; |
| 385 | 391 | ||
| 386 | if (!strcmp(name, pmc->soc->powergates[i])) | 392 | if (!strcmp(name, pmc->soc->powergates[i])) |
| @@ -392,10 +398,12 @@ static int tegra_powergate_lookup(struct tegra_pmc *pmc, const char *name) | |||
| 392 | 398 | ||
| 393 | /** | 399 | /** |
| 394 | * tegra_powergate_set() - set the state of a partition | 400 | * tegra_powergate_set() - set the state of a partition |
| 401 | * @pmc: power management controller | ||
| 395 | * @id: partition ID | 402 | * @id: partition ID |
| 396 | * @new_state: new state of the partition | 403 | * @new_state: new state of the partition |
| 397 | */ | 404 | */ |
| 398 | static int tegra_powergate_set(unsigned int id, bool new_state) | 405 | static int tegra_powergate_set(struct tegra_pmc *pmc, unsigned int id, |
| 406 | bool new_state) | ||
| 399 | { | 407 | { |
| 400 | bool status; | 408 | bool status; |
| 401 | int err; | 409 | int err; |
| @@ -410,7 +418,7 @@ static int tegra_powergate_set(unsigned int id, bool new_state) | |||
| 410 | return 0; | 418 | return 0; |
| 411 | } | 419 | } |
| 412 | 420 | ||
| 413 | tegra_pmc_writel(PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); | 421 | tegra_pmc_writel(pmc, PWRGATE_TOGGLE_START | id, PWRGATE_TOGGLE); |
| 414 | 422 | ||
| 415 | err = readx_poll_timeout(tegra_powergate_state, id, status, | 423 | err = readx_poll_timeout(tegra_powergate_state, id, status, |
| 416 | status == new_state, 10, 100000); | 424 | status == new_state, 10, 100000); |
| @@ -420,7 +428,8 @@ static int tegra_powergate_set(unsigned int id, bool new_state) | |||
| 420 | return err; | 428 | return err; |
| 421 | } | 429 | } |
| 422 | 430 | ||
| 423 | static int __tegra_powergate_remove_clamping(unsigned int id) | 431 | static int __tegra_powergate_remove_clamping(struct tegra_pmc *pmc, |
| 432 | unsigned int id) | ||
| 424 | { | 433 | { |
| 425 | u32 mask; | 434 | u32 mask; |
| 426 | 435 | ||
| @@ -432,7 +441,7 @@ static int __tegra_powergate_remove_clamping(unsigned int id) | |||
| 432 | */ | 441 | */ |
| 433 | if (id == TEGRA_POWERGATE_3D) { | 442 | if (id == TEGRA_POWERGATE_3D) { |
| 434 | if (pmc->soc->has_gpu_clamps) { | 443 | if (pmc->soc->has_gpu_clamps) { |
| 435 | tegra_pmc_writel(0, GPU_RG_CNTRL); | 444 | tegra_pmc_writel(pmc, 0, GPU_RG_CNTRL); |
| 436 | goto out; | 445 | goto out; |
| 437 | } | 446 | } |
| 438 | } | 447 | } |
| @@ -448,7 +457,7 @@ static int __tegra_powergate_remove_clamping(unsigned int id) | |||
| 448 | else | 457 | else |
| 449 | mask = (1 << id); | 458 | mask = (1 << id); |
| 450 | 459 | ||
| 451 | tegra_pmc_writel(mask, REMOVE_CLAMPING); | 460 | tegra_pmc_writel(pmc, mask, REMOVE_CLAMPING); |
| 452 | 461 | ||
| 453 | out: | 462 | out: |
| 454 | mutex_unlock(&pmc->powergates_lock); | 463 | mutex_unlock(&pmc->powergates_lock); |
| @@ -500,7 +509,7 @@ static int tegra_powergate_power_up(struct tegra_powergate *pg, | |||
| 500 | 509 | ||
| 501 | usleep_range(10, 20); | 510 | usleep_range(10, 20); |
| 502 | 511 | ||
| 503 | err = tegra_powergate_set(pg->id, true); | 512 | err = tegra_powergate_set(pg->pmc, pg->id, true); |
| 504 | if (err < 0) | 513 | if (err < 0) |
| 505 | return err; | 514 | return err; |
| 506 | 515 | ||
| @@ -512,7 +521,7 @@ static int tegra_powergate_power_up(struct tegra_powergate *pg, | |||
| 512 | 521 | ||
| 513 | usleep_range(10, 20); | 522 | usleep_range(10, 20); |
| 514 | 523 | ||
| 515 | err = __tegra_powergate_remove_clamping(pg->id); | 524 | err = __tegra_powergate_remove_clamping(pg->pmc, pg->id); |
| 516 | if (err) | 525 | if (err) |
| 517 | goto disable_clks; | 526 | goto disable_clks; |
| 518 | 527 | ||
| @@ -539,7 +548,7 @@ disable_clks: | |||
| 539 | usleep_range(10, 20); | 548 | usleep_range(10, 20); |
| 540 | 549 | ||
| 541 | powergate_off: | 550 | powergate_off: |
| 542 | tegra_powergate_set(pg->id, false); | 551 | tegra_powergate_set(pg->pmc, pg->id, false); |
| 543 | 552 | ||
| 544 | return err; | 553 | return err; |
| 545 | } | 554 | } |
| @@ -564,7 +573,7 @@ static int tegra_powergate_power_down(struct tegra_powergate *pg) | |||
| 564 | 573 | ||
| 565 | usleep_range(10, 20); | 574 | usleep_range(10, 20); |
| 566 | 575 | ||
| 567 | err = tegra_powergate_set(pg->id, false); | 576 | err = tegra_powergate_set(pg->pmc, pg->id, false); |
| 568 | if (err) | 577 | if (err) |
| 569 | goto assert_resets; | 578 | goto assert_resets; |
| 570 | 579 | ||
| @@ -585,12 +594,13 @@ disable_clks: | |||
| 585 | static int tegra_genpd_power_on(struct generic_pm_domain *domain) | 594 | static int tegra_genpd_power_on(struct generic_pm_domain *domain) |
| 586 | { | 595 | { |
| 587 | struct tegra_powergate *pg = to_powergate(domain); | 596 | struct tegra_powergate *pg = to_powergate(domain); |
| 597 | struct device *dev = pg->pmc->dev; | ||
| 588 | int err; | 598 | int err; |
| 589 | 599 | ||
| 590 | err = tegra_powergate_power_up(pg, true); | 600 | err = tegra_powergate_power_up(pg, true); |
| 591 | if (err) | 601 | if (err) |
| 592 | pr_err("failed to turn on PM domain %s: %d\n", pg->genpd.name, | 602 | dev_err(dev, "failed to turn on PM domain %s: %d\n", |
| 593 | err); | 603 | pg->genpd.name, err); |
| 594 | 604 | ||
| 595 | return err; | 605 | return err; |
| 596 | } | 606 | } |
| @@ -598,12 +608,13 @@ static int tegra_genpd_power_on(struct generic_pm_domain *domain) | |||
| 598 | static int tegra_genpd_power_off(struct generic_pm_domain *domain) | 608 | static int tegra_genpd_power_off(struct generic_pm_domain *domain) |
| 599 | { | 609 | { |
| 600 | struct tegra_powergate *pg = to_powergate(domain); | 610 | struct tegra_powergate *pg = to_powergate(domain); |
| 611 | struct device *dev = pg->pmc->dev; | ||
| 601 | int err; | 612 | int err; |
| 602 | 613 | ||
| 603 | err = tegra_powergate_power_down(pg); | 614 | err = tegra_powergate_power_down(pg); |
| 604 | if (err) | 615 | if (err) |
| 605 | pr_err("failed to turn off PM domain %s: %d\n", | 616 | dev_err(dev, "failed to turn off PM domain %s: %d\n", |
| 606 | pg->genpd.name, err); | 617 | pg->genpd.name, err); |
| 607 | 618 | ||
| 608 | return err; | 619 | return err; |
| 609 | } | 620 | } |
| @@ -614,10 +625,10 @@ static int tegra_genpd_power_off(struct generic_pm_domain *domain) | |||
| 614 | */ | 625 | */ |
| 615 | int tegra_powergate_power_on(unsigned int id) | 626 | int tegra_powergate_power_on(unsigned int id) |
| 616 | { | 627 | { |
| 617 | if (!tegra_powergate_is_available(id)) | 628 | if (!tegra_powergate_is_available(pmc, id)) |
| 618 | return -EINVAL; | 629 | return -EINVAL; |
| 619 | 630 | ||
| 620 | return tegra_powergate_set(id, true); | 631 | return tegra_powergate_set(pmc, id, true); |
| 621 | } | 632 | } |
| 622 | 633 | ||
| 623 | /** | 634 | /** |
| @@ -626,20 +637,21 @@ int tegra_powergate_power_on(unsigned int id) | |||
| 626 | */ | 637 | */ |
| 627 | int tegra_powergate_power_off(unsigned int id) | 638 | int tegra_powergate_power_off(unsigned int id) |
| 628 | { | 639 | { |
| 629 | if (!tegra_powergate_is_available(id)) | 640 | if (!tegra_powergate_is_available(pmc, id)) |
| 630 | return -EINVAL; | 641 | return -EINVAL; |
| 631 | 642 | ||
| 632 | return tegra_powergate_set(id, false); | 643 | return tegra_powergate_set(pmc, id, false); |
| 633 | } | 644 | } |
| 634 | EXPORT_SYMBOL(tegra_powergate_power_off); | 645 | EXPORT_SYMBOL(tegra_powergate_power_off); |
| 635 | 646 | ||
| 636 | /** | 647 | /** |
| 637 | * tegra_powergate_is_powered() - check if partition is powered | 648 | * tegra_powergate_is_powered() - check if partition is powered |
| 649 | * @pmc: power management controller | ||
| 638 | * @id: partition ID | 650 | * @id: partition ID |
| 639 | */ | 651 | */ |
| 640 | static int tegra_powergate_is_powered(unsigned int id) | 652 | static int tegra_powergate_is_powered(struct tegra_pmc *pmc, unsigned int id) |
| 641 | { | 653 | { |
| 642 | if (!tegra_powergate_is_valid(id)) | 654 | if (!tegra_powergate_is_valid(pmc, id)) |
| 643 | return -EINVAL; | 655 | return -EINVAL; |
| 644 | 656 | ||
| 645 | return tegra_powergate_state(id); | 657 | return tegra_powergate_state(id); |
| @@ -651,10 +663,10 @@ static int tegra_powergate_is_powered(unsigned int id) | |||
| 651 | */ | 663 | */ |
| 652 | int tegra_powergate_remove_clamping(unsigned int id) | 664 | int tegra_powergate_remove_clamping(unsigned int id) |
| 653 | { | 665 | { |
| 654 | if (!tegra_powergate_is_available(id)) | 666 | if (!tegra_powergate_is_available(pmc, id)) |
| 655 | return -EINVAL; | 667 | return -EINVAL; |
| 656 | 668 | ||
| 657 | return __tegra_powergate_remove_clamping(id); | 669 | return __tegra_powergate_remove_clamping(pmc, id); |
| 658 | } | 670 | } |
| 659 | EXPORT_SYMBOL(tegra_powergate_remove_clamping); | 671 | EXPORT_SYMBOL(tegra_powergate_remove_clamping); |
| 660 | 672 | ||
| @@ -672,7 +684,7 @@ int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk, | |||
| 672 | struct tegra_powergate *pg; | 684 | struct tegra_powergate *pg; |
| 673 | int err; | 685 | int err; |
| 674 | 686 | ||
| 675 | if (!tegra_powergate_is_available(id)) | 687 | if (!tegra_powergate_is_available(pmc, id)) |
| 676 | return -EINVAL; | 688 | return -EINVAL; |
| 677 | 689 | ||
| 678 | pg = kzalloc(sizeof(*pg), GFP_KERNEL); | 690 | pg = kzalloc(sizeof(*pg), GFP_KERNEL); |
| @@ -687,7 +699,8 @@ int tegra_powergate_sequence_power_up(unsigned int id, struct clk *clk, | |||
| 687 | 699 | ||
| 688 | err = tegra_powergate_power_up(pg, false); | 700 | err = tegra_powergate_power_up(pg, false); |
| 689 | if (err) | 701 | if (err) |
| 690 | pr_err("failed to turn on partition %d: %d\n", id, err); | 702 | dev_err(pmc->dev, "failed to turn on partition %d: %d\n", id, |
| 703 | err); | ||
| 691 | 704 | ||
| 692 | kfree(pg); | 705 | kfree(pg); |
| 693 | 706 | ||
| @@ -697,12 +710,14 @@ EXPORT_SYMBOL(tegra_powergate_sequence_power_up); | |||
| 697 | 710 | ||
| 698 | /** | 711 | /** |
| 699 | * tegra_get_cpu_powergate_id() - convert from CPU ID to partition ID | 712 | * tegra_get_cpu_powergate_id() - convert from CPU ID to partition ID |
| 713 | * @pmc: power management controller | ||
| 700 | * @cpuid: CPU partition ID | 714 | * @cpuid: CPU partition ID |
| 701 | * | 715 | * |
| 702 | * Returns the partition ID corresponding to the CPU partition ID or a | 716 | * Returns the partition ID corresponding to the CPU partition ID or a |
| 703 | * negative error code on failure. | 717 | * negative error code on failure. |
| 704 | */ | 718 | */ |
| 705 | static int tegra_get_cpu_powergate_id(unsigned int cpuid) | 719 | static int tegra_get_cpu_powergate_id(struct tegra_pmc *pmc, |
| 720 | unsigned int cpuid) | ||
| 706 | { | 721 | { |
| 707 | if (pmc->soc && cpuid < pmc->soc->num_cpu_powergates) | 722 | if (pmc->soc && cpuid < pmc->soc->num_cpu_powergates) |
| 708 | return pmc->soc->cpu_powergates[cpuid]; | 723 | return pmc->soc->cpu_powergates[cpuid]; |
| @@ -718,11 +733,11 @@ bool tegra_pmc_cpu_is_powered(unsigned int cpuid) | |||
| 718 | { | 733 | { |
| 719 | int id; | 734 | int id; |
| 720 | 735 | ||
| 721 | id = tegra_get_cpu_powergate_id(cpuid); | 736 | id = tegra_get_cpu_powergate_id(pmc, cpuid); |
| 722 | if (id < 0) | 737 | if (id < 0) |
| 723 | return false; | 738 | return false; |
| 724 | 739 | ||
| 725 | return tegra_powergate_is_powered(id); | 740 | return tegra_powergate_is_powered(pmc, id); |
| 726 | } | 741 | } |
| 727 | 742 | ||
| 728 | /** | 743 | /** |
| @@ -733,11 +748,11 @@ int tegra_pmc_cpu_power_on(unsigned int cpuid) | |||
| 733 | { | 748 | { |
| 734 | int id; | 749 | int id; |
| 735 | 750 | ||
| 736 | id = tegra_get_cpu_powergate_id(cpuid); | 751 | id = tegra_get_cpu_powergate_id(pmc, cpuid); |
| 737 | if (id < 0) | 752 | if (id < 0) |
| 738 | return id; | 753 | return id; |
| 739 | 754 | ||
| 740 | return tegra_powergate_set(id, true); | 755 | return tegra_powergate_set(pmc, id, true); |
| 741 | } | 756 | } |
| 742 | 757 | ||
| 743 | /** | 758 | /** |
| @@ -748,7 +763,7 @@ int tegra_pmc_cpu_remove_clamping(unsigned int cpuid) | |||
| 748 | { | 763 | { |
| 749 | int id; | 764 | int id; |
| 750 | 765 | ||
| 751 | id = tegra_get_cpu_powergate_id(cpuid); | 766 | id = tegra_get_cpu_powergate_id(pmc, cpuid); |
| 752 | if (id < 0) | 767 | if (id < 0) |
| 753 | return id; | 768 | return id; |
| 754 | 769 | ||
| @@ -778,9 +793,9 @@ static int tegra_pmc_restart_notify(struct notifier_block *this, | |||
| 778 | writel(value, pmc->scratch + pmc->soc->regs->scratch0); | 793 | writel(value, pmc->scratch + pmc->soc->regs->scratch0); |
| 779 | 794 | ||
| 780 | /* reset everything but PMC_SCRATCH0 and PMC_RST_STATUS */ | 795 | /* reset everything but PMC_SCRATCH0 and PMC_RST_STATUS */ |
| 781 | value = tegra_pmc_readl(PMC_CNTRL); | 796 | value = tegra_pmc_readl(pmc, PMC_CNTRL); |
| 782 | value |= PMC_CNTRL_MAIN_RST; | 797 | value |= PMC_CNTRL_MAIN_RST; |
| 783 | tegra_pmc_writel(value, PMC_CNTRL); | 798 | tegra_pmc_writel(pmc, value, PMC_CNTRL); |
| 784 | 799 | ||
| 785 | return NOTIFY_DONE; | 800 | return NOTIFY_DONE; |
| 786 | } | 801 | } |
| @@ -799,7 +814,7 @@ static int powergate_show(struct seq_file *s, void *data) | |||
| 799 | seq_printf(s, "------------------\n"); | 814 | seq_printf(s, "------------------\n"); |
| 800 | 815 | ||
| 801 | for (i = 0; i < pmc->soc->num_powergates; i++) { | 816 | for (i = 0; i < pmc->soc->num_powergates; i++) { |
| 802 | status = tegra_powergate_is_powered(i); | 817 | status = tegra_powergate_is_powered(pmc, i); |
| 803 | if (status < 0) | 818 | if (status < 0) |
| 804 | continue; | 819 | continue; |
| 805 | 820 | ||
| @@ -861,12 +876,13 @@ err: | |||
| 861 | static int tegra_powergate_of_get_resets(struct tegra_powergate *pg, | 876 | static int tegra_powergate_of_get_resets(struct tegra_powergate *pg, |
| 862 | struct device_node *np, bool off) | 877 | struct device_node *np, bool off) |
| 863 | { | 878 | { |
| 879 | struct device *dev = pg->pmc->dev; | ||
| 864 | int err; | 880 | int err; |
| 865 | 881 | ||
| 866 | pg->reset = of_reset_control_array_get_exclusive(np); | 882 | pg->reset = of_reset_control_array_get_exclusive(np); |
| 867 | if (IS_ERR(pg->reset)) { | 883 | if (IS_ERR(pg->reset)) { |
| 868 | err = PTR_ERR(pg->reset); | 884 | err = PTR_ERR(pg->reset); |
| 869 | pr_err("failed to get device resets: %d\n", err); | 885 | dev_err(dev, "failed to get device resets: %d\n", err); |
| 870 | return err; | 886 | return err; |
| 871 | } | 887 | } |
| 872 | 888 | ||
| @@ -883,6 +899,7 @@ static int tegra_powergate_of_get_resets(struct tegra_powergate *pg, | |||
| 883 | 899 | ||
| 884 | static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) | 900 | static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) |
| 885 | { | 901 | { |
| 902 | struct device *dev = pmc->dev; | ||
| 886 | struct tegra_powergate *pg; | 903 | struct tegra_powergate *pg; |
| 887 | int id, err; | 904 | int id, err; |
| 888 | bool off; | 905 | bool off; |
| @@ -893,7 +910,7 @@ static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) | |||
| 893 | 910 | ||
| 894 | id = tegra_powergate_lookup(pmc, np->name); | 911 | id = tegra_powergate_lookup(pmc, np->name); |
| 895 | if (id < 0) { | 912 | if (id < 0) { |
| 896 | pr_err("powergate lookup failed for %pOFn: %d\n", np, id); | 913 | dev_err(dev, "powergate lookup failed for %pOFn: %d\n", np, id); |
| 897 | goto free_mem; | 914 | goto free_mem; |
| 898 | } | 915 | } |
| 899 | 916 | ||
| @@ -909,17 +926,17 @@ static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) | |||
| 909 | pg->genpd.power_on = tegra_genpd_power_on; | 926 | pg->genpd.power_on = tegra_genpd_power_on; |
| 910 | pg->pmc = pmc; | 927 | pg->pmc = pmc; |
| 911 | 928 | ||
| 912 | off = !tegra_powergate_is_powered(pg->id); | 929 | off = !tegra_powergate_is_powered(pmc, pg->id); |
| 913 | 930 | ||
| 914 | err = tegra_powergate_of_get_clks(pg, np); | 931 | err = tegra_powergate_of_get_clks(pg, np); |
| 915 | if (err < 0) { | 932 | if (err < 0) { |
| 916 | pr_err("failed to get clocks for %pOFn: %d\n", np, err); | 933 | dev_err(dev, "failed to get clocks for %pOFn: %d\n", np, err); |
| 917 | goto set_available; | 934 | goto set_available; |
| 918 | } | 935 | } |
| 919 | 936 | ||
| 920 | err = tegra_powergate_of_get_resets(pg, np, off); | 937 | err = tegra_powergate_of_get_resets(pg, np, off); |
| 921 | if (err < 0) { | 938 | if (err < 0) { |
| 922 | pr_err("failed to get resets for %pOFn: %d\n", np, err); | 939 | dev_err(dev, "failed to get resets for %pOFn: %d\n", np, err); |
| 923 | goto remove_clks; | 940 | goto remove_clks; |
| 924 | } | 941 | } |
| 925 | 942 | ||
| @@ -932,19 +949,19 @@ static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) | |||
| 932 | 949 | ||
| 933 | err = pm_genpd_init(&pg->genpd, NULL, off); | 950 | err = pm_genpd_init(&pg->genpd, NULL, off); |
| 934 | if (err < 0) { | 951 | if (err < 0) { |
| 935 | pr_err("failed to initialise PM domain %pOFn: %d\n", np, | 952 | dev_err(dev, "failed to initialise PM domain %pOFn: %d\n", np, |
| 936 | err); | 953 | err); |
| 937 | goto remove_resets; | 954 | goto remove_resets; |
| 938 | } | 955 | } |
| 939 | 956 | ||
| 940 | err = of_genpd_add_provider_simple(np, &pg->genpd); | 957 | err = of_genpd_add_provider_simple(np, &pg->genpd); |
| 941 | if (err < 0) { | 958 | if (err < 0) { |
| 942 | pr_err("failed to add PM domain provider for %pOFn: %d\n", | 959 | dev_err(dev, "failed to add PM domain provider for %pOFn: %d\n", |
| 943 | np, err); | 960 | np, err); |
| 944 | goto remove_genpd; | 961 | goto remove_genpd; |
| 945 | } | 962 | } |
| 946 | 963 | ||
| 947 | pr_debug("added PM domain %s\n", pg->genpd.name); | 964 | dev_dbg(dev, "added PM domain %s\n", pg->genpd.name); |
| 948 | 965 | ||
| 949 | return; | 966 | return; |
| 950 | 967 | ||
| @@ -1000,7 +1017,8 @@ tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id) | |||
| 1000 | return NULL; | 1017 | return NULL; |
| 1001 | } | 1018 | } |
| 1002 | 1019 | ||
| 1003 | static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id, | 1020 | static int tegra_io_pad_get_dpd_register_bit(struct tegra_pmc *pmc, |
| 1021 | enum tegra_io_pad id, | ||
| 1004 | unsigned long *request, | 1022 | unsigned long *request, |
| 1005 | unsigned long *status, | 1023 | unsigned long *status, |
| 1006 | u32 *mask) | 1024 | u32 *mask) |
| @@ -1009,7 +1027,7 @@ static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id, | |||
| 1009 | 1027 | ||
| 1010 | pad = tegra_io_pad_find(pmc, id); | 1028 | pad = tegra_io_pad_find(pmc, id); |
| 1011 | if (!pad) { | 1029 | if (!pad) { |
| 1012 | pr_err("invalid I/O pad ID %u\n", id); | 1030 | dev_err(pmc->dev, "invalid I/O pad ID %u\n", id); |
| 1013 | return -ENOENT; | 1031 | return -ENOENT; |
| 1014 | } | 1032 | } |
| 1015 | 1033 | ||
| @@ -1029,43 +1047,44 @@ static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id, | |||
| 1029 | return 0; | 1047 | return 0; |
| 1030 | } | 1048 | } |
| 1031 | 1049 | ||
| 1032 | static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request, | 1050 | static int tegra_io_pad_prepare(struct tegra_pmc *pmc, enum tegra_io_pad id, |
| 1033 | unsigned long *status, u32 *mask) | 1051 | unsigned long *request, unsigned long *status, |
| 1052 | u32 *mask) | ||
| 1034 | { | 1053 | { |
| 1035 | unsigned long rate, value; | 1054 | unsigned long rate, value; |
| 1036 | int err; | 1055 | int err; |
| 1037 | 1056 | ||
| 1038 | err = tegra_io_pad_get_dpd_register_bit(id, request, status, mask); | 1057 | err = tegra_io_pad_get_dpd_register_bit(pmc, id, request, status, mask); |
| 1039 | if (err) | 1058 | if (err) |
| 1040 | return err; | 1059 | return err; |
| 1041 | 1060 | ||
| 1042 | if (pmc->clk) { | 1061 | if (pmc->clk) { |
| 1043 | rate = clk_get_rate(pmc->clk); | 1062 | rate = clk_get_rate(pmc->clk); |
| 1044 | if (!rate) { | 1063 | if (!rate) { |
| 1045 | pr_err("failed to get clock rate\n"); | 1064 | dev_err(pmc->dev, "failed to get clock rate\n"); |
| 1046 | return -ENODEV; | 1065 | return -ENODEV; |
| 1047 | } | 1066 | } |
| 1048 | 1067 | ||
| 1049 | tegra_pmc_writel(DPD_SAMPLE_ENABLE, DPD_SAMPLE); | 1068 | tegra_pmc_writel(pmc, DPD_SAMPLE_ENABLE, DPD_SAMPLE); |
| 1050 | 1069 | ||
| 1051 | /* must be at least 200 ns, in APB (PCLK) clock cycles */ | 1070 | /* must be at least 200 ns, in APB (PCLK) clock cycles */ |
| 1052 | value = DIV_ROUND_UP(1000000000, rate); | 1071 | value = DIV_ROUND_UP(1000000000, rate); |
| 1053 | value = DIV_ROUND_UP(200, value); | 1072 | value = DIV_ROUND_UP(200, value); |
| 1054 | tegra_pmc_writel(value, SEL_DPD_TIM); | 1073 | tegra_pmc_writel(pmc, value, SEL_DPD_TIM); |
| 1055 | } | 1074 | } |
| 1056 | 1075 | ||
| 1057 | return 0; | 1076 | return 0; |
| 1058 | } | 1077 | } |
| 1059 | 1078 | ||
| 1060 | static int tegra_io_pad_poll(unsigned long offset, u32 mask, | 1079 | static int tegra_io_pad_poll(struct tegra_pmc *pmc, unsigned long offset, |
| 1061 | u32 val, unsigned long timeout) | 1080 | u32 mask, u32 val, unsigned long timeout) |
| 1062 | { | 1081 | { |
| 1063 | u32 value; | 1082 | u32 value; |
| 1064 | 1083 | ||
| 1065 | timeout = jiffies + msecs_to_jiffies(timeout); | 1084 | timeout = jiffies + msecs_to_jiffies(timeout); |
| 1066 | 1085 | ||
| 1067 | while (time_after(timeout, jiffies)) { | 1086 | while (time_after(timeout, jiffies)) { |
| 1068 | value = tegra_pmc_readl(offset); | 1087 | value = tegra_pmc_readl(pmc, offset); |
| 1069 | if ((value & mask) == val) | 1088 | if ((value & mask) == val) |
| 1070 | return 0; | 1089 | return 0; |
| 1071 | 1090 | ||
| @@ -1075,10 +1094,10 @@ static int tegra_io_pad_poll(unsigned long offset, u32 mask, | |||
| 1075 | return -ETIMEDOUT; | 1094 | return -ETIMEDOUT; |
| 1076 | } | 1095 | } |
| 1077 | 1096 | ||
| 1078 | static void tegra_io_pad_unprepare(void) | 1097 | static void tegra_io_pad_unprepare(struct tegra_pmc *pmc) |
| 1079 | { | 1098 | { |
| 1080 | if (pmc->clk) | 1099 | if (pmc->clk) |
| 1081 | tegra_pmc_writel(DPD_SAMPLE_DISABLE, DPD_SAMPLE); | 1100 | tegra_pmc_writel(pmc, DPD_SAMPLE_DISABLE, DPD_SAMPLE); |
| 1082 | } | 1101 | } |
| 1083 | 1102 | ||
| 1084 | /** | 1103 | /** |
| @@ -1095,21 +1114,21 @@ int tegra_io_pad_power_enable(enum tegra_io_pad id) | |||
| 1095 | 1114 | ||
| 1096 | mutex_lock(&pmc->powergates_lock); | 1115 | mutex_lock(&pmc->powergates_lock); |
| 1097 | 1116 | ||
| 1098 | err = tegra_io_pad_prepare(id, &request, &status, &mask); | 1117 | err = tegra_io_pad_prepare(pmc, id, &request, &status, &mask); |
| 1099 | if (err < 0) { | 1118 | if (err < 0) { |
| 1100 | pr_err("failed to prepare I/O pad: %d\n", err); | 1119 | dev_err(pmc->dev, "failed to prepare I/O pad: %d\n", err); |
| 1101 | goto unlock; | 1120 | goto unlock; |
| 1102 | } | 1121 | } |
| 1103 | 1122 | ||
| 1104 | tegra_pmc_writel(IO_DPD_REQ_CODE_OFF | mask, request); | 1123 | tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_OFF | mask, request); |
| 1105 | 1124 | ||
| 1106 | err = tegra_io_pad_poll(status, mask, 0, 250); | 1125 | err = tegra_io_pad_poll(pmc, status, mask, 0, 250); |
| 1107 | if (err < 0) { | 1126 | if (err < 0) { |
| 1108 | pr_err("failed to enable I/O pad: %d\n", err); | 1127 | dev_err(pmc->dev, "failed to enable I/O pad: %d\n", err); |
| 1109 | goto unlock; | 1128 | goto unlock; |
| 1110 | } | 1129 | } |
| 1111 | 1130 | ||
| 1112 | tegra_io_pad_unprepare(); | 1131 | tegra_io_pad_unprepare(pmc); |
| 1113 | 1132 | ||
| 1114 | unlock: | 1133 | unlock: |
| 1115 | mutex_unlock(&pmc->powergates_lock); | 1134 | mutex_unlock(&pmc->powergates_lock); |
| @@ -1131,21 +1150,21 @@ int tegra_io_pad_power_disable(enum tegra_io_pad id) | |||
| 1131 | 1150 | ||
| 1132 | mutex_lock(&pmc->powergates_lock); | 1151 | mutex_lock(&pmc->powergates_lock); |
| 1133 | 1152 | ||
| 1134 | err = tegra_io_pad_prepare(id, &request, &status, &mask); | 1153 | err = tegra_io_pad_prepare(pmc, id, &request, &status, &mask); |
| 1135 | if (err < 0) { | 1154 | if (err < 0) { |
| 1136 | pr_err("failed to prepare I/O pad: %d\n", err); | 1155 | dev_err(pmc->dev, "failed to prepare I/O pad: %d\n", err); |
| 1137 | goto unlock; | 1156 | goto unlock; |
| 1138 | } | 1157 | } |
| 1139 | 1158 | ||
| 1140 | tegra_pmc_writel(IO_DPD_REQ_CODE_ON | mask, request); | 1159 | tegra_pmc_writel(pmc, IO_DPD_REQ_CODE_ON | mask, request); |
| 1141 | 1160 | ||
| 1142 | err = tegra_io_pad_poll(status, mask, mask, 250); | 1161 | err = tegra_io_pad_poll(pmc, status, mask, mask, 250); |
| 1143 | if (err < 0) { | 1162 | if (err < 0) { |
| 1144 | pr_err("failed to disable I/O pad: %d\n", err); | 1163 | dev_err(pmc->dev, "failed to disable I/O pad: %d\n", err); |
| 1145 | goto unlock; | 1164 | goto unlock; |
| 1146 | } | 1165 | } |
| 1147 | 1166 | ||
| 1148 | tegra_io_pad_unprepare(); | 1167 | tegra_io_pad_unprepare(pmc); |
| 1149 | 1168 | ||
| 1150 | unlock: | 1169 | unlock: |
| 1151 | mutex_unlock(&pmc->powergates_lock); | 1170 | mutex_unlock(&pmc->powergates_lock); |
| @@ -1153,22 +1172,24 @@ unlock: | |||
| 1153 | } | 1172 | } |
| 1154 | EXPORT_SYMBOL(tegra_io_pad_power_disable); | 1173 | EXPORT_SYMBOL(tegra_io_pad_power_disable); |
| 1155 | 1174 | ||
| 1156 | static int tegra_io_pad_is_powered(enum tegra_io_pad id) | 1175 | static int tegra_io_pad_is_powered(struct tegra_pmc *pmc, enum tegra_io_pad id) |
| 1157 | { | 1176 | { |
| 1158 | unsigned long request, status; | 1177 | unsigned long request, status; |
| 1159 | u32 mask, value; | 1178 | u32 mask, value; |
| 1160 | int err; | 1179 | int err; |
| 1161 | 1180 | ||
| 1162 | err = tegra_io_pad_get_dpd_register_bit(id, &request, &status, &mask); | 1181 | err = tegra_io_pad_get_dpd_register_bit(pmc, id, &request, &status, |
| 1182 | &mask); | ||
| 1163 | if (err) | 1183 | if (err) |
| 1164 | return err; | 1184 | return err; |
| 1165 | 1185 | ||
| 1166 | value = tegra_pmc_readl(status); | 1186 | value = tegra_pmc_readl(pmc, status); |
| 1167 | 1187 | ||
| 1168 | return !(value & mask); | 1188 | return !(value & mask); |
| 1169 | } | 1189 | } |
| 1170 | 1190 | ||
| 1171 | static int tegra_io_pad_set_voltage(enum tegra_io_pad id, int voltage) | 1191 | static int tegra_io_pad_set_voltage(struct tegra_pmc *pmc, enum tegra_io_pad id, |
| 1192 | int voltage) | ||
| 1172 | { | 1193 | { |
| 1173 | const struct tegra_io_pad_soc *pad; | 1194 | const struct tegra_io_pad_soc *pad; |
| 1174 | u32 value; | 1195 | u32 value; |
| @@ -1183,29 +1204,29 @@ static int tegra_io_pad_set_voltage(enum tegra_io_pad id, int voltage) | |||
| 1183 | mutex_lock(&pmc->powergates_lock); | 1204 | mutex_lock(&pmc->powergates_lock); |
| 1184 | 1205 | ||
| 1185 | if (pmc->soc->has_impl_33v_pwr) { | 1206 | if (pmc->soc->has_impl_33v_pwr) { |
| 1186 | value = tegra_pmc_readl(PMC_IMPL_E_33V_PWR); | 1207 | value = tegra_pmc_readl(pmc, PMC_IMPL_E_33V_PWR); |
| 1187 | 1208 | ||
| 1188 | if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8) | 1209 | if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8) |
| 1189 | value &= ~BIT(pad->voltage); | 1210 | value &= ~BIT(pad->voltage); |
| 1190 | else | 1211 | else |
| 1191 | value |= BIT(pad->voltage); | 1212 | value |= BIT(pad->voltage); |
| 1192 | 1213 | ||
| 1193 | tegra_pmc_writel(value, PMC_IMPL_E_33V_PWR); | 1214 | tegra_pmc_writel(pmc, value, PMC_IMPL_E_33V_PWR); |
| 1194 | } else { | 1215 | } else { |
| 1195 | /* write-enable PMC_PWR_DET_VALUE[pad->voltage] */ | 1216 | /* write-enable PMC_PWR_DET_VALUE[pad->voltage] */ |
| 1196 | value = tegra_pmc_readl(PMC_PWR_DET); | 1217 | value = tegra_pmc_readl(pmc, PMC_PWR_DET); |
| 1197 | value |= BIT(pad->voltage); | 1218 | value |= BIT(pad->voltage); |
| 1198 | tegra_pmc_writel(value, PMC_PWR_DET); | 1219 | tegra_pmc_writel(pmc, value, PMC_PWR_DET); |
| 1199 | 1220 | ||
| 1200 | /* update I/O voltage */ | 1221 | /* update I/O voltage */ |
| 1201 | value = tegra_pmc_readl(PMC_PWR_DET_VALUE); | 1222 | value = tegra_pmc_readl(pmc, PMC_PWR_DET_VALUE); |
| 1202 | 1223 | ||
| 1203 | if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8) | 1224 | if (voltage == TEGRA_IO_PAD_VOLTAGE_1V8) |
| 1204 | value &= ~BIT(pad->voltage); | 1225 | value &= ~BIT(pad->voltage); |
| 1205 | else | 1226 | else |
| 1206 | value |= BIT(pad->voltage); | 1227 | value |= BIT(pad->voltage); |
| 1207 | 1228 | ||
| 1208 | tegra_pmc_writel(value, PMC_PWR_DET_VALUE); | 1229 | tegra_pmc_writel(pmc, value, PMC_PWR_DET_VALUE); |
| 1209 | } | 1230 | } |
| 1210 | 1231 | ||
| 1211 | mutex_unlock(&pmc->powergates_lock); | 1232 | mutex_unlock(&pmc->powergates_lock); |
| @@ -1215,7 +1236,7 @@ static int tegra_io_pad_set_voltage(enum tegra_io_pad id, int voltage) | |||
| 1215 | return 0; | 1236 | return 0; |
| 1216 | } | 1237 | } |
| 1217 | 1238 | ||
| 1218 | static int tegra_io_pad_get_voltage(enum tegra_io_pad id) | 1239 | static int tegra_io_pad_get_voltage(struct tegra_pmc *pmc, enum tegra_io_pad id) |
| 1219 | { | 1240 | { |
| 1220 | const struct tegra_io_pad_soc *pad; | 1241 | const struct tegra_io_pad_soc *pad; |
| 1221 | u32 value; | 1242 | u32 value; |
| @@ -1228,9 +1249,9 @@ static int tegra_io_pad_get_voltage(enum tegra_io_pad id) | |||
| 1228 | return -ENOTSUPP; | 1249 | return -ENOTSUPP; |
| 1229 | 1250 | ||
| 1230 | if (pmc->soc->has_impl_33v_pwr) | 1251 | if (pmc->soc->has_impl_33v_pwr) |
| 1231 | value = tegra_pmc_readl(PMC_IMPL_E_33V_PWR); | 1252 | value = tegra_pmc_readl(pmc, PMC_IMPL_E_33V_PWR); |
| 1232 | else | 1253 | else |
| 1233 | value = tegra_pmc_readl(PMC_PWR_DET_VALUE); | 1254 | value = tegra_pmc_readl(pmc, PMC_PWR_DET_VALUE); |
| 1234 | 1255 | ||
| 1235 | if ((value & BIT(pad->voltage)) == 0) | 1256 | if ((value & BIT(pad->voltage)) == 0) |
| 1236 | return TEGRA_IO_PAD_VOLTAGE_1V8; | 1257 | return TEGRA_IO_PAD_VOLTAGE_1V8; |
| @@ -1302,21 +1323,21 @@ void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode) | |||
| 1302 | 1323 | ||
| 1303 | ticks = pmc->cpu_good_time * rate + USEC_PER_SEC - 1; | 1324 | ticks = pmc->cpu_good_time * rate + USEC_PER_SEC - 1; |
| 1304 | do_div(ticks, USEC_PER_SEC); | 1325 | do_div(ticks, USEC_PER_SEC); |
| 1305 | tegra_pmc_writel(ticks, PMC_CPUPWRGOOD_TIMER); | 1326 | tegra_pmc_writel(pmc, ticks, PMC_CPUPWRGOOD_TIMER); |
| 1306 | 1327 | ||
| 1307 | ticks = pmc->cpu_off_time * rate + USEC_PER_SEC - 1; | 1328 | ticks = pmc->cpu_off_time * rate + USEC_PER_SEC - 1; |
| 1308 | do_div(ticks, USEC_PER_SEC); | 1329 | do_div(ticks, USEC_PER_SEC); |
| 1309 | tegra_pmc_writel(ticks, PMC_CPUPWROFF_TIMER); | 1330 | tegra_pmc_writel(pmc, ticks, PMC_CPUPWROFF_TIMER); |
| 1310 | 1331 | ||
| 1311 | wmb(); | 1332 | wmb(); |
| 1312 | 1333 | ||
| 1313 | pmc->rate = rate; | 1334 | pmc->rate = rate; |
| 1314 | } | 1335 | } |
| 1315 | 1336 | ||
| 1316 | value = tegra_pmc_readl(PMC_CNTRL); | 1337 | value = tegra_pmc_readl(pmc, PMC_CNTRL); |
| 1317 | value &= ~PMC_CNTRL_SIDE_EFFECT_LP0; | 1338 | value &= ~PMC_CNTRL_SIDE_EFFECT_LP0; |
| 1318 | value |= PMC_CNTRL_CPU_PWRREQ_OE; | 1339 | value |= PMC_CNTRL_CPU_PWRREQ_OE; |
| 1319 | tegra_pmc_writel(value, PMC_CNTRL); | 1340 | tegra_pmc_writel(pmc, value, PMC_CNTRL); |
| 1320 | } | 1341 | } |
| 1321 | #endif | 1342 | #endif |
| 1322 | 1343 | ||
| @@ -1438,13 +1459,13 @@ static void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc) | |||
| 1438 | if (of_property_read_u32(np, "nvidia,pinmux-id", &pinmux)) | 1459 | if (of_property_read_u32(np, "nvidia,pinmux-id", &pinmux)) |
| 1439 | pinmux = 0; | 1460 | pinmux = 0; |
| 1440 | 1461 | ||
| 1441 | value = tegra_pmc_readl(PMC_SENSOR_CTRL); | 1462 | value = tegra_pmc_readl(pmc, PMC_SENSOR_CTRL); |
| 1442 | value |= PMC_SENSOR_CTRL_SCRATCH_WRITE; | 1463 | value |= PMC_SENSOR_CTRL_SCRATCH_WRITE; |
| 1443 | tegra_pmc_writel(value, PMC_SENSOR_CTRL); | 1464 | tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL); |
| 1444 | 1465 | ||
| 1445 | value = (reg_data << PMC_SCRATCH54_DATA_SHIFT) | | 1466 | value = (reg_data << PMC_SCRATCH54_DATA_SHIFT) | |
| 1446 | (reg_addr << PMC_SCRATCH54_ADDR_SHIFT); | 1467 | (reg_addr << PMC_SCRATCH54_ADDR_SHIFT); |
| 1447 | tegra_pmc_writel(value, PMC_SCRATCH54); | 1468 | tegra_pmc_writel(pmc, value, PMC_SCRATCH54); |
| 1448 | 1469 | ||
| 1449 | value = PMC_SCRATCH55_RESET_TEGRA; | 1470 | value = PMC_SCRATCH55_RESET_TEGRA; |
| 1450 | value |= ctrl_id << PMC_SCRATCH55_CNTRL_ID_SHIFT; | 1471 | value |= ctrl_id << PMC_SCRATCH55_CNTRL_ID_SHIFT; |
| @@ -1462,11 +1483,11 @@ static void tegra_pmc_init_tsense_reset(struct tegra_pmc *pmc) | |||
| 1462 | 1483 | ||
| 1463 | value |= checksum << PMC_SCRATCH55_CHECKSUM_SHIFT; | 1484 | value |= checksum << PMC_SCRATCH55_CHECKSUM_SHIFT; |
| 1464 | 1485 | ||
| 1465 | tegra_pmc_writel(value, PMC_SCRATCH55); | 1486 | tegra_pmc_writel(pmc, value, PMC_SCRATCH55); |
| 1466 | 1487 | ||
| 1467 | value = tegra_pmc_readl(PMC_SENSOR_CTRL); | 1488 | value = tegra_pmc_readl(pmc, PMC_SENSOR_CTRL); |
| 1468 | value |= PMC_SENSOR_CTRL_ENABLE_RST; | 1489 | value |= PMC_SENSOR_CTRL_ENABLE_RST; |
| 1469 | tegra_pmc_writel(value, PMC_SENSOR_CTRL); | 1490 | tegra_pmc_writel(pmc, value, PMC_SENSOR_CTRL); |
| 1470 | 1491 | ||
| 1471 | dev_info(pmc->dev, "emergency thermal reset enabled\n"); | 1492 | dev_info(pmc->dev, "emergency thermal reset enabled\n"); |
| 1472 | 1493 | ||
| @@ -1476,12 +1497,16 @@ out: | |||
| 1476 | 1497 | ||
| 1477 | static int tegra_io_pad_pinctrl_get_groups_count(struct pinctrl_dev *pctl_dev) | 1498 | static int tegra_io_pad_pinctrl_get_groups_count(struct pinctrl_dev *pctl_dev) |
| 1478 | { | 1499 | { |
| 1500 | struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); | ||
| 1501 | |||
| 1479 | return pmc->soc->num_io_pads; | 1502 | return pmc->soc->num_io_pads; |
| 1480 | } | 1503 | } |
| 1481 | 1504 | ||
| 1482 | static const char *tegra_io_pad_pinctrl_get_group_name( | 1505 | static const char *tegra_io_pad_pinctrl_get_group_name( |
| 1483 | struct pinctrl_dev *pctl, unsigned int group) | 1506 | struct pinctrl_dev *pctl, unsigned int group) |
| 1484 | { | 1507 | { |
| 1508 | struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl); | ||
| 1509 | |||
| 1485 | return pmc->soc->io_pads[group].name; | 1510 | return pmc->soc->io_pads[group].name; |
| 1486 | } | 1511 | } |
| 1487 | 1512 | ||
| @@ -1490,6 +1515,8 @@ static int tegra_io_pad_pinctrl_get_group_pins(struct pinctrl_dev *pctl_dev, | |||
| 1490 | const unsigned int **pins, | 1515 | const unsigned int **pins, |
| 1491 | unsigned int *num_pins) | 1516 | unsigned int *num_pins) |
| 1492 | { | 1517 | { |
| 1518 | struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); | ||
| 1519 | |||
| 1493 | *pins = &pmc->soc->io_pads[group].id; | 1520 | *pins = &pmc->soc->io_pads[group].id; |
| 1494 | *num_pins = 1; | 1521 | *num_pins = 1; |
| 1495 | return 0; | 1522 | return 0; |
| @@ -1506,23 +1533,25 @@ static const struct pinctrl_ops tegra_io_pad_pinctrl_ops = { | |||
| 1506 | static int tegra_io_pad_pinconf_get(struct pinctrl_dev *pctl_dev, | 1533 | static int tegra_io_pad_pinconf_get(struct pinctrl_dev *pctl_dev, |
| 1507 | unsigned int pin, unsigned long *config) | 1534 | unsigned int pin, unsigned long *config) |
| 1508 | { | 1535 | { |
| 1509 | const struct tegra_io_pad_soc *pad = tegra_io_pad_find(pmc, pin); | ||
| 1510 | enum pin_config_param param = pinconf_to_config_param(*config); | 1536 | enum pin_config_param param = pinconf_to_config_param(*config); |
| 1537 | struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); | ||
| 1538 | const struct tegra_io_pad_soc *pad; | ||
| 1511 | int ret; | 1539 | int ret; |
| 1512 | u32 arg; | 1540 | u32 arg; |
| 1513 | 1541 | ||
| 1542 | pad = tegra_io_pad_find(pmc, pin); | ||
| 1514 | if (!pad) | 1543 | if (!pad) |
| 1515 | return -EINVAL; | 1544 | return -EINVAL; |
| 1516 | 1545 | ||
| 1517 | switch (param) { | 1546 | switch (param) { |
| 1518 | case PIN_CONFIG_POWER_SOURCE: | 1547 | case PIN_CONFIG_POWER_SOURCE: |
| 1519 | ret = tegra_io_pad_get_voltage(pad->id); | 1548 | ret = tegra_io_pad_get_voltage(pmc, pad->id); |
| 1520 | if (ret < 0) | 1549 | if (ret < 0) |
| 1521 | return ret; | 1550 | return ret; |
| 1522 | arg = ret; | 1551 | arg = ret; |
| 1523 | break; | 1552 | break; |
| 1524 | case PIN_CONFIG_LOW_POWER_MODE: | 1553 | case PIN_CONFIG_LOW_POWER_MODE: |
| 1525 | ret = tegra_io_pad_is_powered(pad->id); | 1554 | ret = tegra_io_pad_is_powered(pmc, pad->id); |
| 1526 | if (ret < 0) | 1555 | if (ret < 0) |
| 1527 | return ret; | 1556 | return ret; |
| 1528 | arg = !ret; | 1557 | arg = !ret; |
| @@ -1540,12 +1569,14 @@ static int tegra_io_pad_pinconf_set(struct pinctrl_dev *pctl_dev, | |||
| 1540 | unsigned int pin, unsigned long *configs, | 1569 | unsigned int pin, unsigned long *configs, |
| 1541 | unsigned int num_configs) | 1570 | unsigned int num_configs) |
| 1542 | { | 1571 | { |
| 1543 | const struct tegra_io_pad_soc *pad = tegra_io_pad_find(pmc, pin); | 1572 | struct tegra_pmc *pmc = pinctrl_dev_get_drvdata(pctl_dev); |
| 1573 | const struct tegra_io_pad_soc *pad; | ||
| 1544 | enum pin_config_param param; | 1574 | enum pin_config_param param; |
| 1545 | unsigned int i; | 1575 | unsigned int i; |
| 1546 | int err; | 1576 | int err; |
| 1547 | u32 arg; | 1577 | u32 arg; |
| 1548 | 1578 | ||
| 1579 | pad = tegra_io_pad_find(pmc, pin); | ||
| 1549 | if (!pad) | 1580 | if (!pad) |
| 1550 | return -EINVAL; | 1581 | return -EINVAL; |
| 1551 | 1582 | ||
| @@ -1566,7 +1597,7 @@ static int tegra_io_pad_pinconf_set(struct pinctrl_dev *pctl_dev, | |||
| 1566 | if (arg != TEGRA_IO_PAD_VOLTAGE_1V8 && | 1597 | if (arg != TEGRA_IO_PAD_VOLTAGE_1V8 && |
| 1567 | arg != TEGRA_IO_PAD_VOLTAGE_3V3) | 1598 | arg != TEGRA_IO_PAD_VOLTAGE_3V3) |
| 1568 | return -EINVAL; | 1599 | return -EINVAL; |
| 1569 | err = tegra_io_pad_set_voltage(pad->id, arg); | 1600 | err = tegra_io_pad_set_voltage(pmc, pad->id, arg); |
| 1570 | if (err) | 1601 | if (err) |
| 1571 | return err; | 1602 | return err; |
| 1572 | break; | 1603 | break; |
| @@ -1615,7 +1646,7 @@ static ssize_t reset_reason_show(struct device *dev, | |||
| 1615 | { | 1646 | { |
| 1616 | u32 value, rst_src; | 1647 | u32 value, rst_src; |
| 1617 | 1648 | ||
| 1618 | value = tegra_pmc_readl(pmc->soc->regs->rst_status); | 1649 | value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); |
| 1619 | rst_src = (value & pmc->soc->regs->rst_source_mask) >> | 1650 | rst_src = (value & pmc->soc->regs->rst_source_mask) >> |
| 1620 | pmc->soc->regs->rst_source_shift; | 1651 | pmc->soc->regs->rst_source_shift; |
| 1621 | 1652 | ||
| @@ -1629,7 +1660,7 @@ static ssize_t reset_level_show(struct device *dev, | |||
| 1629 | { | 1660 | { |
| 1630 | u32 value, rst_lvl; | 1661 | u32 value, rst_lvl; |
| 1631 | 1662 | ||
| 1632 | value = tegra_pmc_readl(pmc->soc->regs->rst_status); | 1663 | value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); |
| 1633 | rst_lvl = (value & pmc->soc->regs->rst_level_mask) >> | 1664 | rst_lvl = (value & pmc->soc->regs->rst_level_mask) >> |
| 1634 | pmc->soc->regs->rst_level_shift; | 1665 | pmc->soc->regs->rst_level_shift; |
| 1635 | 1666 | ||
| @@ -1926,6 +1957,8 @@ static int tegra_pmc_probe(struct platform_device *pdev) | |||
| 1926 | pmc->base = base; | 1957 | pmc->base = base; |
| 1927 | mutex_unlock(&pmc->powergates_lock); | 1958 | mutex_unlock(&pmc->powergates_lock); |
| 1928 | 1959 | ||
| 1960 | platform_set_drvdata(pdev, pmc); | ||
| 1961 | |||
| 1929 | return 0; | 1962 | return 0; |
| 1930 | 1963 | ||
| 1931 | cleanup_restart_handler: | 1964 | cleanup_restart_handler: |
| @@ -1938,14 +1971,18 @@ cleanup_debugfs: | |||
| 1938 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) | 1971 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) |
| 1939 | static int tegra_pmc_suspend(struct device *dev) | 1972 | static int tegra_pmc_suspend(struct device *dev) |
| 1940 | { | 1973 | { |
| 1941 | tegra_pmc_writel(virt_to_phys(tegra_resume), PMC_SCRATCH41); | 1974 | struct tegra_pmc *pmc = dev_get_drvdata(dev); |
| 1975 | |||
| 1976 | tegra_pmc_writel(pmc, virt_to_phys(tegra_resume), PMC_SCRATCH41); | ||
| 1942 | 1977 | ||
| 1943 | return 0; | 1978 | return 0; |
| 1944 | } | 1979 | } |
| 1945 | 1980 | ||
| 1946 | static int tegra_pmc_resume(struct device *dev) | 1981 | static int tegra_pmc_resume(struct device *dev) |
| 1947 | { | 1982 | { |
| 1948 | tegra_pmc_writel(0x0, PMC_SCRATCH41); | 1983 | struct tegra_pmc *pmc = dev_get_drvdata(dev); |
| 1984 | |||
| 1985 | tegra_pmc_writel(pmc, 0x0, PMC_SCRATCH41); | ||
| 1949 | 1986 | ||
| 1950 | return 0; | 1987 | return 0; |
| 1951 | } | 1988 | } |
| @@ -1982,11 +2019,11 @@ static void tegra20_pmc_init(struct tegra_pmc *pmc) | |||
| 1982 | u32 value; | 2019 | u32 value; |
| 1983 | 2020 | ||
| 1984 | /* Always enable CPU power request */ | 2021 | /* Always enable CPU power request */ |
| 1985 | value = tegra_pmc_readl(PMC_CNTRL); | 2022 | value = tegra_pmc_readl(pmc, PMC_CNTRL); |
| 1986 | value |= PMC_CNTRL_CPU_PWRREQ_OE; | 2023 | value |= PMC_CNTRL_CPU_PWRREQ_OE; |
| 1987 | tegra_pmc_writel(value, PMC_CNTRL); | 2024 | tegra_pmc_writel(pmc, value, PMC_CNTRL); |
| 1988 | 2025 | ||
| 1989 | value = tegra_pmc_readl(PMC_CNTRL); | 2026 | value = tegra_pmc_readl(pmc, PMC_CNTRL); |
| 1990 | 2027 | ||
| 1991 | if (pmc->sysclkreq_high) | 2028 | if (pmc->sysclkreq_high) |
| 1992 | value &= ~PMC_CNTRL_SYSCLK_POLARITY; | 2029 | value &= ~PMC_CNTRL_SYSCLK_POLARITY; |
| @@ -1994,12 +2031,12 @@ static void tegra20_pmc_init(struct tegra_pmc *pmc) | |||
| 1994 | value |= PMC_CNTRL_SYSCLK_POLARITY; | 2031 | value |= PMC_CNTRL_SYSCLK_POLARITY; |
| 1995 | 2032 | ||
| 1996 | /* configure the output polarity while the request is tristated */ | 2033 | /* configure the output polarity while the request is tristated */ |
| 1997 | tegra_pmc_writel(value, PMC_CNTRL); | 2034 | tegra_pmc_writel(pmc, value, PMC_CNTRL); |
| 1998 | 2035 | ||
| 1999 | /* now enable the request */ | 2036 | /* now enable the request */ |
| 2000 | value = tegra_pmc_readl(PMC_CNTRL); | 2037 | value = tegra_pmc_readl(pmc, PMC_CNTRL); |
| 2001 | value |= PMC_CNTRL_SYSCLK_OE; | 2038 | value |= PMC_CNTRL_SYSCLK_OE; |
| 2002 | tegra_pmc_writel(value, PMC_CNTRL); | 2039 | tegra_pmc_writel(pmc, value, PMC_CNTRL); |
| 2003 | } | 2040 | } |
| 2004 | 2041 | ||
| 2005 | static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc, | 2042 | static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc, |
| @@ -2008,14 +2045,14 @@ static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc, | |||
| 2008 | { | 2045 | { |
| 2009 | u32 value; | 2046 | u32 value; |
| 2010 | 2047 | ||
| 2011 | value = tegra_pmc_readl(PMC_CNTRL); | 2048 | value = tegra_pmc_readl(pmc, PMC_CNTRL); |
| 2012 | 2049 | ||
| 2013 | if (invert) | 2050 | if (invert) |
| 2014 | value |= PMC_CNTRL_INTR_POLARITY; | 2051 | value |= PMC_CNTRL_INTR_POLARITY; |
| 2015 | else | 2052 | else |
| 2016 | value &= ~PMC_CNTRL_INTR_POLARITY; | 2053 | value &= ~PMC_CNTRL_INTR_POLARITY; |
| 2017 | 2054 | ||
| 2018 | tegra_pmc_writel(value, PMC_CNTRL); | 2055 | tegra_pmc_writel(pmc, value, PMC_CNTRL); |
| 2019 | } | 2056 | } |
| 2020 | 2057 | ||
| 2021 | static const struct tegra_pmc_soc tegra20_pmc_soc = { | 2058 | static const struct tegra_pmc_soc tegra20_pmc_soc = { |
| @@ -2419,7 +2456,7 @@ static void tegra186_pmc_setup_irq_polarity(struct tegra_pmc *pmc, | |||
| 2419 | 2456 | ||
| 2420 | index = of_property_match_string(np, "reg-names", "wake"); | 2457 | index = of_property_match_string(np, "reg-names", "wake"); |
| 2421 | if (index < 0) { | 2458 | if (index < 0) { |
| 2422 | pr_err("failed to find PMC wake registers\n"); | 2459 | dev_err(pmc->dev, "failed to find PMC wake registers\n"); |
| 2423 | return; | 2460 | return; |
| 2424 | } | 2461 | } |
| 2425 | 2462 | ||
| @@ -2427,7 +2464,7 @@ static void tegra186_pmc_setup_irq_polarity(struct tegra_pmc *pmc, | |||
| 2427 | 2464 | ||
| 2428 | wake = ioremap_nocache(regs.start, resource_size(®s)); | 2465 | wake = ioremap_nocache(regs.start, resource_size(®s)); |
| 2429 | if (!wake) { | 2466 | if (!wake) { |
| 2430 | pr_err("failed to map PMC wake registers\n"); | 2467 | dev_err(pmc->dev, "failed to map PMC wake registers\n"); |
| 2431 | return; | 2468 | return; |
| 2432 | } | 2469 | } |
| 2433 | 2470 | ||
