diff options
author | Jianqun Xu <jay.xu@rock-chips.com> | 2019-05-29 20:08:48 -0400 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2019-06-26 18:22:45 -0400 |
commit | 587b4ee24fc7200fea5c630c5d981b2cca35149f (patch) | |
tree | 4a01f3794bcbbf9b855c82f33e1544317cca3394 | |
parent | 393f3875c385cc6ae3b6069c3a88fe8e24d681ae (diff) |
arm64: dts: rockchip: add core dtsi file for RK3399Pro SoCs
This patch adds core dtsi file for Rockchip RK3399Pro SoCs,
include rk3399.dtsi. Also enable pciei0/pcie_phy for AP to
talk to NPU part inside SoC.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399pro.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro.dtsi new file mode 100644 index 000000000000..bb5ebf6608b9 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399pro.dtsi | |||
@@ -0,0 +1,22 @@ | |||
1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
2 | // Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. | ||
3 | |||
4 | #include "rk3399.dtsi" | ||
5 | |||
6 | / { | ||
7 | compatible = "rockchip,rk3399pro"; | ||
8 | }; | ||
9 | |||
10 | /* Default to enabled since AP talk to NPU part over pcie */ | ||
11 | &pcie_phy { | ||
12 | status = "okay"; | ||
13 | }; | ||
14 | |||
15 | /* Default to enabled since AP talk to NPU part over pcie */ | ||
16 | &pcie0 { | ||
17 | ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; | ||
18 | num-lanes = <4>; | ||
19 | pinctrl-names = "default"; | ||
20 | pinctrl-0 = <&pcie_clkreqn_cpm>; | ||
21 | status = "okay"; | ||
22 | }; | ||