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authorLinus Torvalds <torvalds@linux-foundation.org>2015-09-14 15:24:10 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-09-14 15:24:10 -0400
commit57e6bbcb4beb4c87aa93e78a1db08fdaab9ee65f (patch)
treedc71e7f1d448f3e3dceaeabeee506d4328f50a65
parent6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff)
parentc2172ce2303051764829d4958bd50a11ada0590f (diff)
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "A number of fixes for the merge window, fixing a number of cases missed when testing the uaccess code, particularly cases which only show up with certain compiler versions" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8431/1: fix alignement of __bug_table section entries arm/xen: Enable user access to the kernel before issuing a privcmd call ARM: domains: add memory dependencies to get_domain/set_domain ARM: domains: thread_info.h no longer needs asm/domains.h ARM: uaccess: fix undefined instruction on ARMv7M/noMMU ARM: uaccess: remove unneeded uaccess_save_and_disable macro ARM: swpan: fix nwfpe for uaccess changes ARM: 8429/1: disable GCC SRA optimization
-rw-r--r--arch/arm/Makefile8
-rw-r--r--arch/arm/include/asm/assembler.h5
-rw-r--r--arch/arm/include/asm/bug.h1
-rw-r--r--arch/arm/include/asm/domain.h6
-rw-r--r--arch/arm/include/asm/thread_info.h1
-rw-r--r--arch/arm/kernel/process.c2
-rw-r--r--arch/arm/nwfpe/entry.S3
-rw-r--r--arch/arm/xen/hypercall.S15
8 files changed, 32 insertions, 9 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 7451b447cc2d..2c2b28ee4811 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -54,6 +54,14 @@ AS += -EL
54LD += -EL 54LD += -EL
55endif 55endif
56 56
57#
58# The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 and
59# later may result in code being generated that handles signed short and signed
60# char struct members incorrectly. So disable it.
61# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932)
62#
63KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
64
57# This selects which instruction set is used. 65# This selects which instruction set is used.
58# Note that GCC does not numerically define an architecture version 66# Note that GCC does not numerically define an architecture version
59# macro, but instead defines a whole series of macros which makes 67# macro, but instead defines a whole series of macros which makes
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 7bbf325a4f31..b2bc8e11471d 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -491,11 +491,6 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
491#endif 491#endif
492 .endm 492 .endm
493 493
494 .macro uaccess_save_and_disable, tmp
495 uaccess_save \tmp
496 uaccess_disable \tmp
497 .endm
498
499 .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo 494 .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
500 .macro ret\c, reg 495 .macro ret\c, reg
501#if __LINUX_ARM_ARCH__ < 6 496#if __LINUX_ARM_ARCH__ < 6
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index b274bde24905..e7335a92144e 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -40,6 +40,7 @@ do { \
40 "2:\t.asciz " #__file "\n" \ 40 "2:\t.asciz " #__file "\n" \
41 ".popsection\n" \ 41 ".popsection\n" \
42 ".pushsection __bug_table,\"a\"\n" \ 42 ".pushsection __bug_table,\"a\"\n" \
43 ".align 2\n" \
43 "3:\t.word 1b, 2b\n" \ 44 "3:\t.word 1b, 2b\n" \
44 "\t.hword " #__line ", 0\n" \ 45 "\t.hword " #__line ", 0\n" \
45 ".popsection"); \ 46 ".popsection"); \
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index e878129f2fee..fc8ba1663601 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -12,6 +12,7 @@
12 12
13#ifndef __ASSEMBLY__ 13#ifndef __ASSEMBLY__
14#include <asm/barrier.h> 14#include <asm/barrier.h>
15#include <asm/thread_info.h>
15#endif 16#endif
16 17
17/* 18/*
@@ -89,7 +90,8 @@ static inline unsigned int get_domain(void)
89 90
90 asm( 91 asm(
91 "mrc p15, 0, %0, c3, c0 @ get domain" 92 "mrc p15, 0, %0, c3, c0 @ get domain"
92 : "=r" (domain)); 93 : "=r" (domain)
94 : "m" (current_thread_info()->cpu_domain));
93 95
94 return domain; 96 return domain;
95} 97}
@@ -98,7 +100,7 @@ static inline void set_domain(unsigned val)
98{ 100{
99 asm volatile( 101 asm volatile(
100 "mcr p15, 0, %0, c3, c0 @ set domain" 102 "mcr p15, 0, %0, c3, c0 @ set domain"
101 : : "r" (val)); 103 : : "r" (val) : "memory");
102 isb(); 104 isb();
103} 105}
104 106
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index d0a1119dcaf3..776757d1604a 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -25,7 +25,6 @@
25struct task_struct; 25struct task_struct;
26 26
27#include <asm/types.h> 27#include <asm/types.h>
28#include <asm/domain.h>
29 28
30typedef unsigned long mm_segment_t; 29typedef unsigned long mm_segment_t;
31 30
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index a3089bacb8d8..7a7c4cea5523 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -226,6 +226,7 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
226 226
227 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save)); 227 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
228 228
229#ifdef CONFIG_CPU_USE_DOMAINS
229 /* 230 /*
230 * Copy the initial value of the domain access control register 231 * Copy the initial value of the domain access control register
231 * from the current thread: thread->addr_limit will have been 232 * from the current thread: thread->addr_limit will have been
@@ -233,6 +234,7 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
233 * kernel/fork.c 234 * kernel/fork.c
234 */ 235 */
235 thread->cpu_domain = get_domain(); 236 thread->cpu_domain = get_domain();
237#endif
236 238
237 if (likely(!(p->flags & PF_KTHREAD))) { 239 if (likely(!(p->flags & PF_KTHREAD))) {
238 *childregs = *current_pt_regs(); 240 *childregs = *current_pt_regs();
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index 71df43547659..39c20afad7ed 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -95,9 +95,10 @@ emulate:
95 reteq r4 @ no, return failure 95 reteq r4 @ no, return failure
96 96
97next: 97next:
98 uaccess_enable r3
98.Lx1: ldrt r6, [r5], #4 @ get the next instruction and 99.Lx1: ldrt r6, [r5], #4 @ get the next instruction and
99 @ increment PC 100 @ increment PC
100 101 uaccess_disable r3
101 and r2, r6, #0x0F000000 @ test for FP insns 102 and r2, r6, #0x0F000000 @ test for FP insns
102 teq r2, #0x0C000000 103 teq r2, #0x0C000000
103 teqne r2, #0x0D000000 104 teqne r2, #0x0D000000
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
index f00e08075938..10fd99c568c6 100644
--- a/arch/arm/xen/hypercall.S
+++ b/arch/arm/xen/hypercall.S
@@ -98,8 +98,23 @@ ENTRY(privcmd_call)
98 mov r1, r2 98 mov r1, r2
99 mov r2, r3 99 mov r2, r3
100 ldr r3, [sp, #8] 100 ldr r3, [sp, #8]
101 /*
102 * Privcmd calls are issued by the userspace. We need to allow the
103 * kernel to access the userspace memory before issuing the hypercall.
104 */
105 uaccess_enable r4
106
107 /* r4 is loaded now as we use it as scratch register before */
101 ldr r4, [sp, #4] 108 ldr r4, [sp, #4]
102 __HVC(XEN_IMM) 109 __HVC(XEN_IMM)
110
111 /*
112 * Disable userspace access from kernel. This is fine to do it
113 * unconditionally as no set_fs(KERNEL_DS)/set_fs(get_ds()) is
114 * called before.
115 */
116 uaccess_disable r4
117
103 ldm sp!, {r4} 118 ldm sp!, {r4}
104 ret lr 119 ret lr
105ENDPROC(privcmd_call); 120ENDPROC(privcmd_call);