diff options
| author | Minas Harutyunyan <minas.harutyunyan@synopsys.com> | 2019-03-05 06:08:55 -0500 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2019-05-03 02:13:48 -0400 |
| commit | 5799aecd64f2bb6c8175a2e86fbcb9e60d052221 (patch) | |
| tree | bc53400e05489d36f1ddf7d65dcc65d4d08f90b8 | |
| parent | c8006f67ae0371900e601112d9f9cd8fff1c8387 (diff) | |
usb: dwc2: Fix channel disable flow
Channel disabling/halting should performed for enabled only channels
to avoid warnings "Unable to clear enable on channel N" which seen
if host works in Slave mode.
Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
| -rw-r--r-- | drivers/usb/dwc2/hcd.c | 34 |
1 files changed, 20 insertions, 14 deletions
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c index 7ac7b524243d..b50ec3714fd8 100644 --- a/drivers/usb/dwc2/hcd.c +++ b/drivers/usb/dwc2/hcd.c | |||
| @@ -2247,25 +2247,31 @@ static void dwc2_core_host_init(struct dwc2_hsotg *hsotg) | |||
| 2247 | num_channels = hsotg->params.host_channels; | 2247 | num_channels = hsotg->params.host_channels; |
| 2248 | for (i = 0; i < num_channels; i++) { | 2248 | for (i = 0; i < num_channels; i++) { |
| 2249 | hcchar = dwc2_readl(hsotg, HCCHAR(i)); | 2249 | hcchar = dwc2_readl(hsotg, HCCHAR(i)); |
| 2250 | hcchar &= ~HCCHAR_CHENA; | 2250 | if (hcchar & HCCHAR_CHENA) { |
| 2251 | hcchar |= HCCHAR_CHDIS; | 2251 | hcchar &= ~HCCHAR_CHENA; |
| 2252 | hcchar &= ~HCCHAR_EPDIR; | 2252 | hcchar |= HCCHAR_CHDIS; |
| 2253 | dwc2_writel(hsotg, hcchar, HCCHAR(i)); | 2253 | hcchar &= ~HCCHAR_EPDIR; |
| 2254 | dwc2_writel(hsotg, hcchar, HCCHAR(i)); | ||
| 2255 | } | ||
| 2254 | } | 2256 | } |
| 2255 | 2257 | ||
| 2256 | /* Halt all channels to put them into a known state */ | 2258 | /* Halt all channels to put them into a known state */ |
| 2257 | for (i = 0; i < num_channels; i++) { | 2259 | for (i = 0; i < num_channels; i++) { |
| 2258 | hcchar = dwc2_readl(hsotg, HCCHAR(i)); | 2260 | hcchar = dwc2_readl(hsotg, HCCHAR(i)); |
| 2259 | hcchar |= HCCHAR_CHENA | HCCHAR_CHDIS; | 2261 | if (hcchar & HCCHAR_CHENA) { |
| 2260 | hcchar &= ~HCCHAR_EPDIR; | 2262 | hcchar |= HCCHAR_CHENA | HCCHAR_CHDIS; |
| 2261 | dwc2_writel(hsotg, hcchar, HCCHAR(i)); | 2263 | hcchar &= ~HCCHAR_EPDIR; |
| 2262 | dev_dbg(hsotg->dev, "%s: Halt channel %d\n", | 2264 | dwc2_writel(hsotg, hcchar, HCCHAR(i)); |
| 2263 | __func__, i); | 2265 | dev_dbg(hsotg->dev, "%s: Halt channel %d\n", |
| 2264 | 2266 | __func__, i); | |
| 2265 | if (dwc2_hsotg_wait_bit_clear(hsotg, HCCHAR(i), | 2267 | |
| 2266 | HCCHAR_CHENA, 1000)) { | 2268 | if (dwc2_hsotg_wait_bit_clear(hsotg, HCCHAR(i), |
| 2267 | dev_warn(hsotg->dev, "Unable to clear enable on channel %d\n", | 2269 | HCCHAR_CHENA, |
| 2268 | i); | 2270 | 1000)) { |
| 2271 | dev_warn(hsotg->dev, | ||
| 2272 | "Unable to clear enable on channel %d\n", | ||
| 2273 | i); | ||
| 2274 | } | ||
| 2269 | } | 2275 | } |
| 2270 | } | 2276 | } |
| 2271 | } | 2277 | } |
