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authorRobin Murphy <robin.murphy@arm.com>2017-03-31 07:03:33 -0400
committerWill Deacon <will.deacon@arm.com>2017-04-06 11:06:43 -0400
commit56fbf600dd8e2f32a5317437fe310b56719f7d2b (patch)
tree625b33270215c8ac908a8904cdb44d5573f731f3
parent8513c89300696a68963cc504c21d034c6369e183 (diff)
iommu/arm-smmu: Add global SMR masking property
The current SMR masking support using a 2-cell iommu-specifier is primarily intended to handle individual masters with large and/or complex Stream ID assignments; it quickly gets a bit clunky in other SMR use-cases where we just want to consistently mask out the same part of every Stream ID (e.g. for MMU-500 configurations where the appended TBU number gets in the way unnecessarily). Let's add a new property to allow a single global mask value to better fit the latter situation. Acked-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Nipun Gupta <nipun.gupta@nxp.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
-rw-r--r--Documentation/devicetree/bindings/iommu/arm,smmu.txt28
-rw-r--r--drivers/iommu/arm-smmu.c4
2 files changed, 31 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index 6cdf32d037fc..8a6ffce12af5 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -60,6 +60,17 @@ conditions.
60 aliases of secure registers have to be used during 60 aliases of secure registers have to be used during
61 SMMU configuration. 61 SMMU configuration.
62 62
63- stream-match-mask : For SMMUs supporting stream matching and using
64 #iommu-cells = <1>, specifies a mask of bits to ignore
65 when matching stream IDs (e.g. this may be programmed
66 into the SMRn.MASK field of every stream match register
67 used). For cases where it is desirable to ignore some
68 portion of every Stream ID (e.g. for certain MMU-500
69 configurations given globally unique input IDs). This
70 property is not valid for SMMUs using stream indexing,
71 or using stream matching with #iommu-cells = <2>, and
72 may be ignored if present in such cases.
73
63** Deprecated properties: 74** Deprecated properties:
64 75
65- mmu-masters (deprecated in favour of the generic "iommus" binding) : 76- mmu-masters (deprecated in favour of the generic "iommus" binding) :
@@ -109,3 +120,20 @@ conditions.
109 master3 { 120 master3 {
110 iommus = <&smmu2 1 0x30>; 121 iommus = <&smmu2 1 0x30>;
111 }; 122 };
123
124
125 /* ARM MMU-500 with 10-bit stream ID input configuration */
126 smmu3: iommu {
127 compatible = "arm,mmu-500", "arm,smmu-v2";
128 ...
129 #iommu-cells = <1>;
130 /* always ignore appended 5-bit TBU number */
131 stream-match-mask = 0x7c00;
132 };
133
134 bus {
135 /* bus whose child devices emit one unique 10-bit stream
136 ID each, but may master through multiple SMMU TBUs */
137 iommu-map = <0 &smmu3 0 0x400>;
138 ...
139 };
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 618e133f643a..6560c4a34b96 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1644,13 +1644,15 @@ out_unlock:
1644 1644
1645static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) 1645static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
1646{ 1646{
1647 u32 fwid = 0; 1647 u32 mask, fwid = 0;
1648 1648
1649 if (args->args_count > 0) 1649 if (args->args_count > 0)
1650 fwid |= (u16)args->args[0]; 1650 fwid |= (u16)args->args[0];
1651 1651
1652 if (args->args_count > 1) 1652 if (args->args_count > 1)
1653 fwid |= (u16)args->args[1] << SMR_MASK_SHIFT; 1653 fwid |= (u16)args->args[1] << SMR_MASK_SHIFT;
1654 else if (!of_property_read_u32(args->np, "stream-match-mask", &mask))
1655 fwid |= (u16)mask << SMR_MASK_SHIFT;
1654 1656
1655 return iommu_fwspec_add_ids(dev, &fwid, 1); 1657 return iommu_fwspec_add_ids(dev, &fwid, 1);
1656} 1658}