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authorFabio Estevam <fabio.estevam@nxp.com>2016-02-21 09:35:00 -0500
committerMark Brown <broonie@kernel.org>2016-02-21 22:00:03 -0500
commit56e5fd8feb286ab71f4ca7674505b0d17967376d (patch)
treedb07b94d6a16e05643c52d194eb690c2d03d83f0
parent81f70ba233d5f660e1ea5fe23260ee323af5d53a (diff)
ASoC: fsl_ssi: Go back to explicit register defaults
Commit 5c408fee2546 ("ASoC: fsl_ssi: remove explicit register defaults") causes the driver to fail to probe: fsl-ssi-dai 2028000.ssi: No cache defaults, reading back from HW fsl-ssi-dai 2028000.ssi: Failed to init register map fsl-ssi-dai: probe of 2028000.ssi failed with error -22 , so revert this commit. Reported-by: Mika Penttilä <mika.penttila@nextfour.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/fsl/fsl_ssi.c42
1 files changed, 20 insertions, 22 deletions
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index ed8de1035cda..40dfd8a36484 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -112,6 +112,20 @@ struct fsl_ssi_rxtx_reg_val {
112 struct fsl_ssi_reg_val tx; 112 struct fsl_ssi_reg_val tx;
113}; 113};
114 114
115static const struct reg_default fsl_ssi_reg_defaults[] = {
116 {CCSR_SSI_SCR, 0x00000000},
117 {CCSR_SSI_SIER, 0x00003003},
118 {CCSR_SSI_STCR, 0x00000200},
119 {CCSR_SSI_SRCR, 0x00000200},
120 {CCSR_SSI_STCCR, 0x00040000},
121 {CCSR_SSI_SRCCR, 0x00040000},
122 {CCSR_SSI_SACNT, 0x00000000},
123 {CCSR_SSI_STMSK, 0x00000000},
124 {CCSR_SSI_SRMSK, 0x00000000},
125 {CCSR_SSI_SACCEN, 0x00000000},
126 {CCSR_SSI_SACCDIS, 0x00000000},
127};
128
115static bool fsl_ssi_readable_reg(struct device *dev, unsigned int reg) 129static bool fsl_ssi_readable_reg(struct device *dev, unsigned int reg)
116{ 130{
117 switch (reg) { 131 switch (reg) {
@@ -176,7 +190,8 @@ static const struct regmap_config fsl_ssi_regconfig = {
176 .val_bits = 32, 190 .val_bits = 32,
177 .reg_stride = 4, 191 .reg_stride = 4,
178 .val_format_endian = REGMAP_ENDIAN_NATIVE, 192 .val_format_endian = REGMAP_ENDIAN_NATIVE,
179 .num_reg_defaults_raw = CCSR_SSI_SACCDIS / sizeof(uint32_t) + 1, 193 .reg_defaults = fsl_ssi_reg_defaults,
194 .num_reg_defaults = ARRAY_SIZE(fsl_ssi_reg_defaults),
180 .readable_reg = fsl_ssi_readable_reg, 195 .readable_reg = fsl_ssi_readable_reg,
181 .volatile_reg = fsl_ssi_volatile_reg, 196 .volatile_reg = fsl_ssi_volatile_reg,
182 .precious_reg = fsl_ssi_precious_reg, 197 .precious_reg = fsl_ssi_precious_reg,
@@ -186,7 +201,6 @@ static const struct regmap_config fsl_ssi_regconfig = {
186 201
187struct fsl_ssi_soc_data { 202struct fsl_ssi_soc_data {
188 bool imx; 203 bool imx;
189 bool imx21regs; /* imx21-class SSI - no SACC{ST,EN,DIS} regs */
190 bool offline_config; 204 bool offline_config;
191 u32 sisr_write_mask; 205 u32 sisr_write_mask;
192}; 206};
@@ -289,7 +303,6 @@ static struct fsl_ssi_soc_data fsl_ssi_mpc8610 = {
289 303
290static struct fsl_ssi_soc_data fsl_ssi_imx21 = { 304static struct fsl_ssi_soc_data fsl_ssi_imx21 = {
291 .imx = true, 305 .imx = true,
292 .imx21regs = true,
293 .offline_config = true, 306 .offline_config = true,
294 .sisr_write_mask = 0, 307 .sisr_write_mask = 0,
295}; 308};
@@ -573,12 +586,8 @@ static void fsl_ssi_setup_ac97(struct fsl_ssi_private *ssi_private)
573 */ 586 */
574 regmap_write(regs, CCSR_SSI_SACNT, 587 regmap_write(regs, CCSR_SSI_SACNT,
575 CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV); 588 CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV);
576 589 regmap_write(regs, CCSR_SSI_SACCDIS, 0xff);
577 /* no SACC{ST,EN,DIS} regs on imx21-class SSI */ 590 regmap_write(regs, CCSR_SSI_SACCEN, 0x300);
578 if (!ssi_private->soc->imx21regs) {
579 regmap_write(regs, CCSR_SSI_SACCDIS, 0xff);
580 regmap_write(regs, CCSR_SSI_SACCEN, 0x300);
581 }
582 591
583 /* 592 /*
584 * Enable SSI, Transmit and Receive. AC97 has to communicate with the 593 * Enable SSI, Transmit and Receive. AC97 has to communicate with the
@@ -1388,7 +1397,6 @@ static int fsl_ssi_probe(struct platform_device *pdev)
1388 struct resource *res; 1397 struct resource *res;
1389 void __iomem *iomem; 1398 void __iomem *iomem;
1390 char name[64]; 1399 char name[64];
1391 struct regmap_config regconfig = fsl_ssi_regconfig;
1392 1400
1393 of_id = of_match_device(fsl_ssi_ids, &pdev->dev); 1401 of_id = of_match_device(fsl_ssi_ids, &pdev->dev);
1394 if (!of_id || !of_id->data) 1402 if (!of_id || !of_id->data)
@@ -1436,25 +1444,15 @@ static int fsl_ssi_probe(struct platform_device *pdev)
1436 return PTR_ERR(iomem); 1444 return PTR_ERR(iomem);
1437 ssi_private->ssi_phys = res->start; 1445 ssi_private->ssi_phys = res->start;
1438 1446
1439 if (ssi_private->soc->imx21regs) {
1440 /*
1441 * According to datasheet imx21-class SSI
1442 * don't have SACC{ST,EN,DIS} regs.
1443 */
1444 regconfig.max_register = CCSR_SSI_SRMSK;
1445 regconfig.num_reg_defaults_raw =
1446 CCSR_SSI_SRMSK / sizeof(uint32_t) + 1;
1447 }
1448
1449 ret = of_property_match_string(np, "clock-names", "ipg"); 1447 ret = of_property_match_string(np, "clock-names", "ipg");
1450 if (ret < 0) { 1448 if (ret < 0) {
1451 ssi_private->has_ipg_clk_name = false; 1449 ssi_private->has_ipg_clk_name = false;
1452 ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem, 1450 ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
1453 &regconfig); 1451 &fsl_ssi_regconfig);
1454 } else { 1452 } else {
1455 ssi_private->has_ipg_clk_name = true; 1453 ssi_private->has_ipg_clk_name = true;
1456 ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev, 1454 ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev,
1457 "ipg", iomem, &regconfig); 1455 "ipg", iomem, &fsl_ssi_regconfig);
1458 } 1456 }
1459 if (IS_ERR(ssi_private->regs)) { 1457 if (IS_ERR(ssi_private->regs)) {
1460 dev_err(&pdev->dev, "Failed to init register map\n"); 1458 dev_err(&pdev->dev, "Failed to init register map\n");